Index: c/src/lib/libbsp/powerpc/score603e/ChangeLog
===================================================================
--- c/src/lib/libbsp/powerpc/score603e/ChangeLog	(revision 67c191b2682e1c47c96b886af11502076a55813b)
+++ c/src/lib/libbsp/powerpc/score603e/ChangeLog	(revision 978eba36bfbd8f82827e89db83196d3b7dfc9912)
@@ -1,2 +1,11 @@
+2008-09-30	Jennifer Averett <jennifer.averett@oarcorp.com>
+
+	* Makefile.am, preinstall.am, PCI_bus/universe.c, console/console.c,
+	include/bsp.h, irq/FPGA.c, irq/irq.c, startup/Hwr_init.c,
+	startup/bspstart.c, startup/vmeintr.c: Modifications required to run
+	on hardware. Some cleanup.
+	* include/irq-config.h: New file.
+	* startup/spurious.c: Removed.
+
 2008-09-29	Ralf CorsÃ©pius <ralf.corsepius@rtems.org>
 
Index: c/src/lib/libbsp/powerpc/score603e/Makefile.am
===================================================================
--- c/src/lib/libbsp/powerpc/score603e/Makefile.am	(revision 67c191b2682e1c47c96b886af11502076a55813b)
+++ c/src/lib/libbsp/powerpc/score603e/Makefile.am	(revision 978eba36bfbd8f82827e89db83196d3b7dfc9912)
@@ -35,17 +35,23 @@
 
 include_bsp_HEADERS = ../../powerpc/shared/pci/pci.h \
-    PCI_bus/PCI.h \
-    ../../powerpc/shared/residual/residual.h \
-    ../../powerpc/shared/residual/pnp.h \
-    ../../powerpc/shared/openpic/openpic.h \
-    ../../powerpc/shared/console/consoleIo.h
+	PCI_bus/PCI.h \
+	../../powerpc/shared/residual/residual.h \
+	../../powerpc/shared/residual/pnp.h \
+	../../powerpc/shared/openpic/openpic.h \
+	../../powerpc/shared/console/consoleIo.h \
+	../../shared/include/irq-generic.h \
+	include/irq-config.h 
+
 pci_SOURCES = pci/no_host_bridge.c ../../powerpc/shared/pci/pci.c \
     ../../powerpc/shared/pci/pcifinddevice.c  PCI_bus/PCI.c  PCI_bus/universe.c
 
 include_bsp_HEADERS += irq/irq.h \
-    ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h \
-    ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h \
-    ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h
-irq_SOURCES = irq/FPGA.c irq/irq.c ../../powerpc/shared/irq/irq_asm.S
+	../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h \
+	../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h \
+	../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h
+irq_SOURCES = include/irq-config.h \
+    irq/FPGA.c irq/irq.c       \
+    ../../shared/src/irq-generic.c       \
+    ../../powerpc/shared/irq/irq_asm.S
 
 include_bsp_HEADERS += ../../powerpc/shared/vectors/vectors.h
@@ -54,4 +60,5 @@
 
 include_bsp_HEADERS += ../../shared/vmeUniverse/vmeUniverse.h \
+    ../../shared/include/irq-generic.h \
     ../../shared/vmeUniverse/vme_am_defs.h \
     ../../shared/vmeUniverse/VME.h \
Index: c/src/lib/libbsp/powerpc/score603e/PCI_bus/universe.c
===================================================================
--- c/src/lib/libbsp/powerpc/score603e/PCI_bus/universe.c	(revision 67c191b2682e1c47c96b886af11502076a55813b)
+++ c/src/lib/libbsp/powerpc/score603e/PCI_bus/universe.c	(revision 978eba36bfbd8f82827e89db83196d3b7dfc9912)
@@ -158,7 +158,4 @@
   uint32_t         jumper_selection;
   uint32_t         pci_id;
-#if (SCORE603E_USE_SDS) | (SCORE603E_USE_OPEN_FIRMWARE) | (SCORE603E_USE_NONE)
-  volatile uint32_t         universe_temp_value;
-#endif
 
   /*
@@ -167,4 +164,6 @@
   jumper_selection = PCI_bus_read(
                      (volatile uint32_t*)SCORE603E_VME_JUMPER_ADDR );
+  printk("initialize_universe: Read 0x%x = 0x%x\n", 
+          SCORE603E_VME_JUMPER_ADDR, jumper_selection);
   jumper_selection = (jumper_selection >> 3) & 0x1f;
 
@@ -180,65 +179,12 @@
      printk ("Invalid SCORE603E_UNIVERSE_CHIP_ID: 0x08%" PRId32 "\n", pci_id);
      rtems_fatal_error_occurred( 0x603e0bad );
+   } else {
+     printk("initialize_universe: Reg 0x%x read 0x%x\n", 
+     SCORE603E_IO_VME_UNIVERSE_BASE, pci_id );
    }
 
-#if (SCORE603E_USE_SDS) | (SCORE603E_USE_OPEN_FIRMWARE) | (SCORE603E_USE_NONE)
-
-   /*
-    * Set the UNIVERSE PCI Configuration Base Address Register with 0x30001
-    * to specifies the 64 Kbyte aligned base address of the UNIVERSE register
-    * space on PCI to be 0x30000 + 0x80000000 (IO_BASE)
-    */
-   Write_pci_device_register( SCORE603E_IO_VME_UNIVERSE_BASE+0x10,0x30001 );
-
-   /*
-    * Set the UNIVERSE PCI Configuration Space Control and Status Register to
-    * medium speed device, Target Back to Back Capable, Master Enable, Target
-    * Memory Enable and Target IO Enable
-    */
-   Write_pci_device_register( SCORE603E_IO_VME_UNIVERSE_BASE+0x4, 0x2800007 );
-
-   /*
-    * Turn off the sysfail by setting SYSFAIL bit to 1 on the VCSR_CLR register
-    */
-   PCI_bus_write( &UNIVERSE->VCSR_CLR, 0x40000000 );
-
-   /*
-    * Set the VMEbus Master Control register with retry forever, 256 bytes
-    * posted write transfer count, VMEbus request level 3, RWD, PCI 32 bytes
-    * aligned burst size and PCI bus number to be zero
-    */
-   PCI_bus_write( &UNIVERSE->MAST_CTL, 0x01C00000 );
-
-   /*
-    * VMEbus DMA Transfer Control register with 32 bit VMEbus Maximum Data
-    * width, A32 VMEbus Address Space, AM code to be data, none-privilleged,
-    * single and BLT cycles on VME bus and 64-bit PCI Bus Transactions enable
-    PCI_bus_write( &UNIVERSE->DCTL, 0x00820180 );
-    */
-
-   PCI_bus_write( &UNIVERSE->LSI0_CTL, 0x80700040 );
-   PCI_bus_write( &UNIVERSE->LSI0_BS,  0x04000000 );
-   PCI_bus_write( &UNIVERSE->LSI0_BD,  0x05000000 );
-   PCI_bus_write( &UNIVERSE->LSI0_TO,  0x7C000000 );
-
-   /*
-    * Remove the Universe from VMEbus BI-Mode (bus-isolation).  Once out of
-    * BI-Mode VMEbus accesses can be made.
-    */
-
-   universe_temp_value = PCI_bus_read( &UNIVERSE->MISC_CTL );
-
-   if (universe_temp_value & 0x100000)
-     PCI_bus_write( &UNIVERSE->MISC_CTL,(universe_temp_value | ~0xFF0FFFFF));
-
-#elif (SCORE603E_USE_DINK)
    /*
     * Do not modify the DINK setup of the universe chip.
     */
-
-#else
-#error "SCORE603E BSPSTART.C -- what ROM monitor are you using"
-#endif
-
 }
 
Index: c/src/lib/libbsp/powerpc/score603e/console/console.c
===================================================================
--- c/src/lib/libbsp/powerpc/score603e/console/console.c	(revision 67c191b2682e1c47c96b886af11502076a55813b)
+++ c/src/lib/libbsp/powerpc/score603e/console/console.c	(revision 978eba36bfbd8f82827e89db83196d3b7dfc9912)
@@ -24,5 +24,4 @@
 #include <rtems/bspIo.h>
 
-#if (1)
 /*
  * The Port Used for the Console interface is based upon which
@@ -32,26 +31,5 @@
  */
 
-#if (SCORE603E_USE_SDS)
-#define USE_FOR_CONSOLE_DEF  1
-
-#elif (SCORE603E_USE_OPEN_FIRMWARE)
 #define USE_FOR_CONSOLE_DEF  0
-
-#elif (SCORE603E_USE_NONE)
-#define USE_FOR_CONSOLE_DEF  0
-
-#elif (SCORE603E_USE_DINK)
-#define USE_FOR_CONSOLE_DEF  0
-
-#else
-#error "SCORE603E CONSOLE.C -- what ROM monitor are you using"
-#endif
-
-#endif
-
-#if (0)
-extern int USE_FOR_CONSOLE;
-#endif
-
 int USE_FOR_CONSOLE = USE_FOR_CONSOLE_DEF;
 
@@ -135,10 +113,4 @@
   for (i=0; i < NUM_Z85C30_PORTS; i++){
       ISR_85c30_Async( &Ports_85C30[i] );
-
-#if (0) /* XXX - TO TEST LOOP BACKS comment this out. */
-    if ( Ports_85C30[i].Chip->vector == vector ) {
-      ISR_85c30_Async( &Ports_85C30[i] );
-    }
-#endif
   }
 }
@@ -192,5 +164,4 @@
 );
 
-/* XXXXXX */
 #endif
 
Index: c/src/lib/libbsp/powerpc/score603e/include/bsp.h
===================================================================
--- c/src/lib/libbsp/powerpc/score603e/include/bsp.h	(revision 67c191b2682e1c47c96b886af11502076a55813b)
+++ c/src/lib/libbsp/powerpc/score603e/include/bsp.h	(revision 978eba36bfbd8f82827e89db83196d3b7dfc9912)
@@ -36,4 +36,6 @@
 #define CONFIGURE_NUMBER_OF_TERMIOS_PORTS (4 + 4)
 #else
+/* XXXXX FIX THIS */
+#error "MUST HAVE PSC8 SET FOR BOEING CODE"
 #define CONFIGURE_NUMBER_OF_TERMIOS_PORTS (4)
 #endif
@@ -77,5 +79,5 @@
 
 #define Processor_Synchronize() \
-  asm(" eieio ")
+  asm volatile(" eieio ")
 
 
@@ -130,15 +132,4 @@
 
 /*
- * spurious.c
- */
-rtems_isr bsp_stub_handler(
-   rtems_vector_number trap
-);
-rtems_isr bsp_spurious_handler(
-   rtems_vector_number trap
-);
-void bsp_spurious_initialize();
-
-/*
  * genvec.c
  */
Index: c/src/lib/libbsp/powerpc/score603e/include/irq-config.h
===================================================================
--- c/src/lib/libbsp/powerpc/score603e/include/irq-config.h	(revision 978eba36bfbd8f82827e89db83196d3b7dfc9912)
+++ c/src/lib/libbsp/powerpc/score603e/include/irq-config.h	(revision 978eba36bfbd8f82827e89db83196d3b7dfc9912)
@@ -0,0 +1,44 @@
+/**
+ * @file
+ *
+ * @ingroup bsp_interrupt
+ *
+ * @brief BSP interrupt support configuration.
+ */
+
+/*
+ * Copyright (c) 2008
+ * Embedded Brains GmbH
+ * Obere Lagerstr. 30
+ * D-82178 Puchheim
+ * Germany
+ * rtems@embedded-brains.de
+ *
+ * The license and distribution terms for this file may be found in the file
+ * LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
+ */
+
+#ifndef LIBBSP_POWERPC_SCORE603E_IRQ_CONFIG_H
+#define LIBBSP_POWERPC_SCORE603E_IRQ_CONFIG_H
+
+#include <bsp/irq.h>
+
+/**
+ * @addtogroup bsp_interrupt
+ *
+ * @{
+ */
+
+/**
+ * @brief Minimum vector number.
+ */
+#define BSP_INTERRUPT_VECTOR_MIN BSP_LOWEST_OFFSET
+
+/**
+ * @brief Maximum vector number.
+ */
+#define BSP_INTERRUPT_VECTOR_MAX BSP_MAX_OFFSET
+
+/** @} */
+
+#endif /* LIBBSP_POWERPC_SCORE603E_IRQ_CONFIG_H */
Index: c/src/lib/libbsp/powerpc/score603e/irq/FPGA.c
===================================================================
--- c/src/lib/libbsp/powerpc/score603e/irq/FPGA.c	(revision 67c191b2682e1c47c96b886af11502076a55813b)
+++ c/src/lib/libbsp/powerpc/score603e/irq/FPGA.c	(revision 978eba36bfbd8f82827e89db83196d3b7dfc9912)
@@ -25,19 +25,8 @@
 void initialize_PCI_bridge (void)
 {
-#if (!SCORE603E_USE_DINK)
-  uint16_t         mask, shift, data;
-
-  shift = SCORE603E_85C30_0_IRQ - Score_IRQ_First;
-  mask = 1 << shift;
-
-  shift = SCORE603E_85C30_1_IRQ - Score_IRQ_First;
-  mask  = mask & (1 << shift);
-
-  data = *SCORE603E_FPGA_MASK_DATA;
-  data = ~mask;
-
-  *SCORE603E_FPGA_MASK_DATA = data;
-#endif
-
+  /* Note: Accept DINKs setup of the PCI Bridge and don't 
+   *       change anything.
+   */
+  printk("initialize_PCI_bridge: \n");
 }
 
@@ -96,7 +85,5 @@
   uint32_t         i;
 
-#if (SCORE603E_USE_DINK)
   set_irq_mask( 0xffff );
-#endif
 
   /*
Index: c/src/lib/libbsp/powerpc/score603e/irq/irq.c
===================================================================
--- c/src/lib/libbsp/powerpc/score603e/irq/irq.c	(revision 67c191b2682e1c47c96b886af11502076a55813b)
+++ c/src/lib/libbsp/powerpc/score603e/irq/irq.c	(revision 978eba36bfbd8f82827e89db83196d3b7dfc9912)
@@ -141,4 +141,25 @@
 
 /*
+ * This function disables a given XXX interrupt
+ */
+rtems_status_code bsp_interrupt_vector_disable( rtems_vector_number irqLine)
+{
+  /* XXX FIX ME!!!! */
+
+  printk("bsp_interrupt_vector_disable: 0x%x\n", irqLine );
+  return RTEMS_SUCCESSFUL;
+}
+
+rtems_status_code bsp_interrupt_vector_enable( rtems_vector_number irqLine)
+{
+  /* XXX FIX ME!!!! */
+  printk("bsp_interrupt_vector_enable: 0x%x\n", irqLine );
+
+  return RTEMS_SUCCESSFUL;
+}
+
+
+
+/*
  * ------------------------ RTEMS Single Irq Handler Mngt Routines ----------------
  */
@@ -179,4 +200,5 @@
        * Enable interrupt 
        */
+      printk("is_pci_irq = TRUE - FIX THIS!\n");
     }
 
@@ -185,10 +207,14 @@
        * Enable exception at processor level
        */
-    }
+      printk("is_processor_irq = TRUE : Fix This\n");
+    }
+
     /*
      * Enable interrupt on device
      */
-	if (irq->on)
+    if (irq->on) {
+        printk("Call 0x%x\n", irq->on );
     	irq->on(irq);
+    }
 
     rtems_interrupt_enable(level);
@@ -416,5 +442,4 @@
   register unsigned new_msr;
 
-printk(" C_dispatch_irq_handler %d\n", excNum);
   if (excNum == ASM_DEC_VECTOR) {
     _CPU_MSR_GET(msr);
@@ -469,2 +494,20 @@
    */
 }
+
+rtems_status_code bsp_interrupt_facility_initialize( void)
+{
+  /* Install exception handler */
+  if (ppc_exc_set_handler( ASM_EXT_VECTOR, C_dispatch_irq_handler)) {
+    return RTEMS_IO_ERROR;
+  }
+  if (ppc_exc_set_handler( ASM_DEC_VECTOR, C_dispatch_irq_handler)) {
+    return RTEMS_IO_ERROR;
+  }
+  if (ppc_exc_set_handler( ASM_E300_SYSMGMT_VECTOR, C_dispatch_irq_handler)) {
+    return RTEMS_IO_ERROR;
+  }
+
+  return RTEMS_SUCCESSFUL;
+}
+
+
Index: c/src/lib/libbsp/powerpc/score603e/preinstall.am
===================================================================
--- c/src/lib/libbsp/powerpc/score603e/preinstall.am	(revision 67c191b2682e1c47c96b886af11502076a55813b)
+++ c/src/lib/libbsp/powerpc/score603e/preinstall.am	(revision 978eba36bfbd8f82827e89db83196d3b7dfc9912)
@@ -90,4 +90,12 @@
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/consoleIo.h
 
+$(PROJECT_INCLUDE)/bsp/irq-generic.h: ../../shared/include/irq-generic.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-generic.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-generic.h
+
+$(PROJECT_INCLUDE)/bsp/irq-config.h: include/irq-config.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-config.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-config.h
+
 $(PROJECT_INCLUDE)/bsp/irq.h: irq/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h
@@ -113,4 +121,8 @@
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vmeUniverse.h
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vmeUniverse.h
+
+$(PROJECT_INCLUDE)/bsp/irq-generic.h: ../../shared/include/irq-generic.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-generic.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-generic.h
 
 $(PROJECT_INCLUDE)/bsp/vme_am_defs.h: ../../shared/vmeUniverse/vme_am_defs.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
Index: c/src/lib/libbsp/powerpc/score603e/startup/Hwr_init.c
===================================================================
--- c/src/lib/libbsp/powerpc/score603e/startup/Hwr_init.c	(revision 67c191b2682e1c47c96b886af11502076a55813b)
+++ c/src/lib/libbsp/powerpc/score603e/startup/Hwr_init.c	(revision 978eba36bfbd8f82827e89db83196d3b7dfc9912)
@@ -81,68 +81,8 @@
 void init_PCI(void)
 {
-#if (SCORE603E_USE_SDS) | (SCORE603E_USE_OPEN_FIRMWARE) | (SCORE603E_USE_NONE)
-  uint32_t         value;
-
- /*
-  * NOTE:  Accessing any memory location not mapped by the BAT
-  * registers will cause a TLB miss exception.
-  * Set the DBAT1 to be configured for 256M of PCI MEM
-  * at 0xC0000000 with Write-through and Guarded Attributed and
-  * read/write access allowed
-  */
-
- /* load DBAT1U (spr538) - 256Mbytes, User, Super */
-  value = SCORE603E_PCI_MEM_BASE | 0x1FFF;
-  asm volatile(
-    "isync;"
-    "mtspr 538, %0"
-    : "=r" (value)
-    : "0" (value)
-  );
-
-  /* load DBAT1L (spr539) - Write-through, Guarded and Read/Write */
-  value = SCORE603E_PCI_MEM_BASE | 0x0002;
-  asm volatile (
-      "mtspr 539, %0;"
-      "isync"
-      : "=r" (value)
-      : "0" (value)
-  );
-
-#elif (SCORE603E_USE_DINK)
   /* DINK Monitor setsup and uses all 4 BAT registers.  */
   /* The fourth BAT register can be modified to access this area */
 
-#if (0)
- /*
-  * NOTE:  Accessing any memory location not mapped by the BAT
-  * registers will cause a TLB miss exception.
-  * Set the DBAT3 to be configured for 256M of PCI MEM
-  * at 0xC0000000 with Write-through and Guarded Attributed and
-  * read/write access allowed
-  */
-
- /* load DBAT3U (spr542) - 256Mbytes, User, Super */
-  value = SCORE603E_PCI_MEM_BASE | 0x1FFF;
-  asm volatile(
-    "isync;"
-    "mtspr 542, %0"
-    : "=r" (value)
-    : "0" (value)
-  );
-
-  /* load DBAT3L (spr543) - Write-through, Guarded and Read/Write */
-  value = SCORE603E_PCI_MEM_BASE | 0x0002;
-  asm volatile (
-      "mtspr 543, %0;"
-      "isync"
-      : "=r" (value)
-      : "0" (value)
-  );
-#endif
-
-#else
-#error "SCORE603E BSPSTART.C -- what ROM monitor are you using"
-#endif
+  printk("init_PCI:\n");
 }
 
Index: c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c
===================================================================
--- c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c	(revision 67c191b2682e1c47c96b886af11502076a55813b)
+++ c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c	(revision 978eba36bfbd8f82827e89db83196d3b7dfc9912)
@@ -43,5 +43,5 @@
  * Time base divisior (how many tick for 1 second).
  */
-unsigned int BSP_time_base_divisor = 1000;  /* XXX - Just a guess */
+unsigned int BSP_time_base_divisor = 4000;
 
 /*
@@ -122,15 +122,4 @@
 void bsp_predriver_hook(void)
 {
-  #if DEBUG
-    printk("bsp_predriver_hook: init_RTC\n");
-  #endif
-  init_RTC();
-  init_PCI();
-  initialize_universe();
-
-  #if DEBUG
-    printk("bsp_predriver_hook: initialize_PCI_bridge\n");
-  #endif
-  initialize_PCI_bridge ();
 
 #if (HAS_PMC_PSC8)
@@ -141,27 +130,4 @@
 #endif
 
-#if 0
- /*
-  * Initialize Bsp General purpose vector table.
-  */
-  #if DEBUG
-    printk("bsp_predriver_hook: initialize_external_exception_vector\n");
-  #endif
- initialize_external_exception_vector();
-#endif
-
-#if (0)
-  /*
-   * XXX - Modify this to write a 48000000 (loop to self) command
-   *       to each interrupt location.  This is better for debug.
-   */
-  #if DEBUG
-    printk("bsp_predriver_hook: bsp_spurious_initialize\n");
-  #endif
- bsp_spurious_initialize();
-#endif
-
-  ShowBATS();
-
   #if DEBUG
     printk("bsp_predriver_hook: End of routine\n");
@@ -176,8 +142,16 @@
 
 void initialize_PMC() {
-  volatile uint32_t         *PMC_addr;
-  uint8_t          data;
-
-#if (0) /* First Values sent */
+  volatile uint32_t     *PMC_addr;
+  uint32_t               data;
+
+  /*
+   * Clear status, enable SERR and memory space only.
+   */
+  PMC_addr = BSP_PCI_DEVICE_ADDRESS( 0x4 );
+  *PMC_addr = 0x020080cc;
+  #if DEBUG
+    printk("initialize_PMC: 0x%x = 0x%x\n", PMC_addr, 0x020080cc);
+  #endif
+
   /*
    * set PMC base address.
@@ -185,53 +159,16 @@
   PMC_addr  = BSP_PCI_DEVICE_ADDRESS( 0x14 );
   *PMC_addr = (BSP_PCI_REGISTER_BASE >> 24) & 0x3f;
-
-  /*
-   * Clear status, enable SERR and memory space only.
-   */
-  PMC_addr = BSP_PCI_DEVICE_ADDRESS( 0x4 );
-  *PMC_addr = 0x0201ff37;
-
-  /*
-   * Bit 0 and 1 HI cause Medium Loopback to occur.
-   */
-  PMC_addr = (volatile uint32_t*)
-        BSP_PMC_SERIAL_ADDRESS( 0x100000 );
-  data = *PMC_addr;
-  /*   *PMC_addr = data | 0x3;  */
-  *PMC_addr = data & 0xfc;
-
-#endif
-
-#if (1)
-
-  /*
-   * Clear status, enable SERR and memory space only.
-   */
-  #if DEBUG
-    printk("initialize_PMC: set Device Address 0x4 \n");
-  ShowBATS();
-  #endif
-  PMC_addr = BSP_PCI_DEVICE_ADDRESS( 0x4 );
-  *PMC_addr = 0x020080cc;
-
-  /*
-   * set PMC base address.
-   */
-  #if DEBUG
-    printk("initialize_PMC: set Device Address 0x14 \n");
-  ShowBATS();
-  #endif
-  PMC_addr  = BSP_PCI_DEVICE_ADDRESS( 0x14 );
-  *PMC_addr = (BSP_PCI_REGISTER_BASE >> 24) & 0x3f;
-
-  #if DEBUG
-    printk("initialize_PMC: set PMC Serial Address 0x100000\n");
-  #endif
+  #if DEBUG
+    printk("initialize_PMC: 0x%x = 0x%x\n", PMC_addr, ((BSP_PCI_REGISTER_BASE >> 24) & 0x3f));
+  #endif
+
    PMC_addr = (volatile uint32_t*)
       BSP_PMC_SERIAL_ADDRESS( 0x100000 );
   data = *PMC_addr;
+  #if DEBUG
+    printk("initialize_PMC: Read 0x%x (0x%x)\n", PMC_addr, data );
+    printk("initialize_PMC: Read 0x%x (0x%x)\n", PMC_addr, data & 0xfc );
+  #endif
   *PMC_addr = data & 0xfc;
-
-#endif
 }
 
@@ -247,10 +184,8 @@
   extern void Init_EE_mask_init(void);
   extern void open_dev_console(void);
-
   #if DEBUG
     printk("bsp_postdriver_hook: open_dev_console\n");
   #endif
   open_dev_console();
-  ShowBATS();
 
   #if DEBUG
@@ -258,5 +193,4 @@
   #endif
   Init_EE_mask_init();
-  ShowBATS();
   #if DEBUG
     printk("bsp_postdriver_hook: Finished procedure\n");
@@ -282,5 +216,5 @@
   ppc_cpu_id_t myCpu;
   ppc_cpu_revision_t myCpuRevision;
- 
+
   rtems_bsp_delay( 1000 );
 
@@ -290,5 +224,4 @@
   #if DEBUG
     printk("bsp_start: Zero out lots of memory\n");
-    ShowBATS();
   #endif
 
@@ -309,4 +242,6 @@
   myCpu         = get_ppc_cpu_type();
   myCpuRevision = get_ppc_cpu_revision();
+  printk("Cpu: 0x%x  Revision: %d\n", myCpu, myCpuRevision);
+  printk("Cpu %s\n", get_ppc_cpu_type_name(myCpu) );
 
   /*
@@ -320,5 +255,4 @@
    * Initialize default raw exception handlers.
    */
-printk("ppc_exc_initialize\n");
   ppc_exc_initialize(
     PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
@@ -326,67 +260,20 @@
     intrStackSize
   );
-
-  /*
-   *  There are multiple ROM monitors available for this board.
-   */
-#if (SCORE603E_USE_SDS)
-  #if DEBUG
-    printk("bsp_start: USE SDS\n");
-  #endif
-
-
-  /*
-   * Write instruction for Unconditional Branch to ROM vector.
-   */
-
-   Code = 0x4bf00002;
-   for (Address = 0x100; Address <= 0xe00; Address += 0x100) {
-     A_Vector = (uint32_t*)Address;
-     Code = 0x4bf00002 + Address;
-     *A_Vector = Code;
-   }
-
-   for (Address = 0x1000; Address <= 0x1400; Address += 0x100) {
-     A_Vector = (uint32_t*)Address;
-     Code = 0x4bf00002 + Address;
-     *A_Vector = Code;
-   }
-
-  msr_value = 0x2030;
-
-#elif (SCORE603E_USE_OPEN_FIRMWARE)
-  #if DEBUG
-    printk("bsp_start: USE OPEN FIRMWARE\n");
-  #endif
-  msr_value = 0x2030;
-
-#elif (SCORE603E_USE_NONE)
-  #if DEBUG
-    printk("bsp_start: USE NONE\n");
-  #endif
+  #if DEBUG
+    printk("bsp_predriver_hook: init_RTC\n");
+  #endif
+
+/*   init_RTC(); */
+  init_PCI();
+  initialize_universe();
+
+  #if DEBUG
+    printk("bsp_predriver_hook: initialize_PCI_bridge\n");
+  #endif
+  initialize_PCI_bridge ();
+
   msr_value = 0x2030;
   _CPU_MSR_SET( msr_value );
-  bsp_set_trap_vectors();
-
-#elif (SCORE603E_USE_DINK)
-  #if DEBUG
-    printk("bsp_start: USE DINK\n");
-  #endif
-  msr_value = 0x2030;
-  _CPU_MSR_SET( msr_value );
-
-  /*
-   * Override the DINK error on a Decrementor interrupt.
-   */
-  /* org    dec_vector  - rfi */
-  ptr = (uint32_t*)0x900;
-  *ptr = 0x4c000064;
-
-#else
-  #if DEBUG
-    printk("bsp_start: ERROR unknow ROM Monitor\n");
-  #endif
-#error "SCORE603E BSPSTART.C -- what ROM monitor are you using"
-#endif
+
 
   _CPU_MSR_SET( msr_value );
@@ -429,4 +316,10 @@
   #endif
 #endif
+
+  /* Initalize interrupt support */
+  if (bsp_interrupt_initialize() != RTEMS_SUCCESSFUL) {
+    BSP_panic( "Cannot intitialize interrupt support\n");
+  }
+
   #if DEBUG
     printk("bsp_start: end BSPSTART\n");
Index: c/src/lib/libbsp/powerpc/score603e/startup/spurious.c
===================================================================
--- c/src/lib/libbsp/powerpc/score603e/startup/spurious.c	(revision 67c191b2682e1c47c96b886af11502076a55813b)
+++ 	(revision )
@@ -1,235 +1,0 @@
-/*
- *  Score603e Spurious Trap Handler
- *
- *  This is just enough of a trap handler to let us know what
- *  the likely source of the trap was.
- *
- *  Developed as part of the port of RTEMS to the ERC32 implementation
- *  of the SPARC by On-Line Applications Research Corporation (OAR)
- *  under contract to the European Space Agency (ESA).
- *
- *  COPYRIGHT (c) 1995. European Space Agency.
- *
- *  This terms of the RTEMS license apply to this file.
- *
- *  $Id$
- */
-
-#include <bsp.h>
-#include <rtems/bspIo.h>
-
-#include <string.h>
-
-rtems_isr bsp_stub_handler(
-   rtems_vector_number trap
-)
-{
-}
-
-/*
- *  bsp_spurious_handler
- *
- *  Print a message on the debug console and then die
- */
-rtems_isr bsp_spurious_handler(
-   rtems_vector_number trap
-)
-{
-
-  switch ( trap ) {
-    case PPC_IRQ_SYSTEM_RESET:
-      printk( "\nTrap: System reset\n" );
-      break;
-    case PPC_IRQ_MCHECK:
-      printk( "\nTrap: Machine check\n" );
-      break;
-    case PPC_IRQ_PROTECT:
-      printk( "\nTrap: DSI\n" );
-      break;
-    case PPC_IRQ_ISI:
-      printk( "ISI\n" );
-      break;
-    case PPC_IRQ_EXTERNAL:
-      printk( "\nTrap: External interupt\n" );
-      break;
-    case PPC_IRQ_ALIGNMENT:
-      printk( "\nTrap: Alignment Exception\n" );
-      break;
-    case PPC_IRQ_PROGRAM:
-      printk( "\nTrap: Program\n" );
-      break;
-    case PPC_IRQ_NOFP:
-      printk( "\nTrap: Floating point unavailable\n" );
-      break;
-    case PPC_IRQ_DECREMENTER:
-      printk( "\nTrap: Decrementer\n" );
-      break;
-    case PPC_IRQ_RESERVED_A:
-      printk( "\nTrap: Reserved 0x00a00\n" );
-      break;
-    case PPC_IRQ_RESERVED_B:
-      printk( "\nTrap: Reserved 0x00b00\n" );
-      break;
-    case PPC_IRQ_SCALL:
-      printk( "\nTrap: System call\n" );
-      break;
-    case PPC_IRQ_TRACE:
-      printk( "\nTrap: Trace\n" );
-      break;
-    case PPC_IRQ_FP_ASST:
-      printk( "\nTrap: Floating point Assist\n" );
-      break;
-
-#if defined(ppc403)
-#error "Please fill in names. "
-    case PPC_IRQ_CRIT :
-      printk( "\nTrap: Critical Error\n ");
-      break;
-    case PPC_IRQ_PIT:
-      printk( "\nTrap: 0x01000\n" );
-      break;
-    case PPC_IRQ_FIT:
-      printk( "\nTrap: 0x01010\n" );
-      break;
-    case PPC_IRQ_WATCHDOG :
-      printk( "\nTrap: 0x01020\n" );
-      break;
-    case PPC_IRQ_DEBUG	 :
-      printk( "\nTrap: 0x02000\n" );
-      break;
-
-#elif defined(ppc601)
-#error "Please fill in names. "
-    case PPC_IRQ_TRACE    :
-      printk( "\nTrap: 0x02000\n" );
-      break;
-
-#elif defined(ppc603) || defined(ppc603e)
-    case PPC_IRQ_TRANS_MISS:
-      printk( "\nTrap: Instruction Translation Miss\n" );
-      break;
-    case PPC_IRQ_DATA_LOAD:
-      printk( "\nTrap: Data Load Translation Miss\n" );
-      break;
-    case PPC_IRQ_DATA_STORE:
-      printk( "\nTrap: Data store Translation Mis\ns");
-      break;
-    case PPC_IRQ_ADDR_BRK:
-      printk( "\nTrap: Instruction address break point\n" );
-      break;
-    case PPC_IRQ_SYS_MGT:
-      printk( "\nTrap: System management interrupt\n" );
-      break;
-
-#elif defined(mpc604)
-#error "Please fill in names. "
-    case PPC_IRQ_ADDR_BRK:
-      printk( "0x1300\n" );
-      break;
-    case PPC_IRQ_SYS_MGT:
-      printk( "0x1400\n" );
-      break;
-#endif
-
-  default:
-     printk( "\nTrap: Undefined exception\n" );
-     break;
-  }
-
-  /*
-   *  What else can we do but stop ...
-   */
-  /*
-   asm volatile( "" );
-   */
-   while (1);
-}
-
-/*
- *  bsp_spurious_initialize
- *
- *  Install the spurious handler for most traps.
- */
-
-void bsp_spurious_initialize()
-{
-  uint32_t         trap;
-
-  for ( trap=0 ; trap < PPC_IRQ_LAST ; trap++ ) {
-    if (trap == PPC_IRQ_DECREMENTER)
-      ;
-      /* set_vector( bsp_stub_handler, trap, 1 ); */
-    else
-      set_vector( bsp_spurious_handler, trap,  1 );
-  }
-}
-
-void bsp_set_trap_vectors( void )
-{
-  volatile uint32_t         *ptr;
-
-  /* reset_vector  */
-  ptr = (uint32_t*)0x00100  ;
-  *ptr = 0x48000000;
-
-  /* org    mach_vector  */
-  ptr = (uint32_t*)0x00200;
-  *ptr = 0x48000000;
-
-  /* org    prot_vector  */
-  ptr = (uint32_t*)0x00300;
-  *ptr = 0x48000000;
-
-  /* org    isi_vector  */
-  ptr = (uint32_t*)0x00400;
-  *ptr = 0x48000000;
-
-  /* org    ext_vector  */
-  ptr = (uint32_t*)0x0500  ;
-  *ptr = 0x48000000;
-
-  /* org    align_vector  */
-  ptr = (uint32_t*)0x00600  ;
-  *ptr = 0x48000000;
-
-  /* org    prog_vector  */
-  ptr = (uint32_t*)0x00700  ;
-  *ptr = 0x48000000;
-
-  /* org    float_vector  */
-  ptr = (uint32_t*)0x00800;
-  *ptr = 0x48000000;
-
-  /* org    dec_vector  - rfi */
-  ptr = (uint32_t*)0x900;
-  *ptr = 0x4c000064;
-
-  /* org    sys_vector  */
-  ptr = (uint32_t*)0x0c00  ;
-  *ptr = 0x48000000;
-
-  /* org    trace_vector  */
-  ptr = (uint32_t*)0x0d00  ;
-  *ptr = 0x48000000;
-
-  /* org    itm_vector  */
-  ptr = (uint32_t*)0x01000  ;
-  *ptr = 0x48000000;
-
-  /* org    dltm_vector  */
-  ptr = (uint32_t*)0x01100  ;
-  *ptr = 0x48000000;
-
-  /* org    dstm_vector  */
-  ptr = (uint32_t*)0x1200  ;
-  *ptr = 0x48000000;
-
-  /* org    addr_vector  */
-  ptr = (uint32_t*)0x1300  ;
-  *ptr = 0x48000000;
-
-  /* org    sysmgmt_vector  */
-  ptr = (uint32_t*)0x1400  ;
-  *ptr = 0x48000000;
-
-}
Index: c/src/lib/libbsp/powerpc/score603e/startup/vmeintr.c
===================================================================
--- c/src/lib/libbsp/powerpc/score603e/startup/vmeintr.c	(revision 67c191b2682e1c47c96b886af11502076a55813b)
+++ c/src/lib/libbsp/powerpc/score603e/startup/vmeintr.c	(revision 978eba36bfbd8f82827e89db83196d3b7dfc9912)
@@ -27,16 +27,10 @@
 )
 {
-  volatile uint8_t          *VME_interrupt_enable;
-  uint8_t          value;
+  volatile uint8_t  *VME_interrupt_enable;
+  uint8_t           value;
 
-#if 0
-  VME_interrupt_enable = ACC_VIE;
-#else
   VME_interrupt_enable = 0;
-#endif
   value = *VME_interrupt_enable;
-
   value &= ~mask;  /* turn off interrupts for all levels in mask */
-
   *VME_interrupt_enable = value;
 }
@@ -55,13 +49,7 @@
   uint8_t          value;
 
-#if 0
-  VME_interrupt_enable = ACC_VIE;
-#else
   VME_interrupt_enable = 0;
-#endif
   value = *VME_interrupt_enable;
-
   value |= mask;  /* turn on interrupts for all levels in mask */
-
   *VME_interrupt_enable = value;
 }
