Changeset 9751c913 in rtems


Ignore:
Timestamp:
Dec 5, 2000, 4:37:38 PM (20 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
7220103f
Parents:
eb33fa54
Message:

2000-12-01 Joel Sherrill <joel@…>

  • pc386/console/console.c, pc386/console/serial_mouse.c, pc386/console/vgainit.c, shared/comm/tty_drv.c: Remove warnings.
Location:
c/src/lib/libbsp/i386
Files:
5 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/i386/ChangeLog

    reb33fa54 r9751c913  
     12000-12-01      Joel Sherrill <joel@OARcorp.com>
     2
     3        * pc386/console/console.c, pc386/console/serial_mouse.c,
     4        pc386/console/vgainit.c, shared/comm/tty_drv.c: Remove warnings.
     5
    162000-11-09      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
    27
  • c/src/lib/libbsp/i386/pc386/console/console.c

    reb33fa54 r9751c913  
    535535    case CS6: databits = CHR_6_BITS; break;
    536536    case CS7: databits = CHR_7_BITS; break;
     537    default: /* just to avoid warnings -- all cases are covered. */
    537538    case CS8: databits = CHR_8_BITS; break;
    538539   }
  • c/src/lib/libbsp/i386/pc386/console/serial_mouse.c

    reb33fa54 r9751c913  
    1919 *
    2020 * $Log$
     21 * Revision 1.4  2000/10/23 14:10:25  joel
     22 * 2000-10-23   Joel Sherrill <joel@OARcorp.com>
     23 *
     24 *      * console/serial_mouse.c: Fixed typos introduced by removal of CR/LF.
     25 *
    2126 * Revision 1.3  2000/10/20 16:01:13  joel
    2227 * 2000-10-20   Rosimildo da Silva <rdasilva@connecttel.com>
     
    361366    case CS6: databits = CHR_6_BITS; break;
    362367    case CS7: databits = CHR_7_BITS; break;
     368    default: /* just to avoid warnings -- all cases are covered. */
    363369    case CS8: databits = CHR_8_BITS; break;
    364370   }
  • c/src/lib/libbsp/i386/pc386/console/vgainit.c

    reb33fa54 r9751c913  
    376376static REGIO graphics_on[] = {
    377377  /* Reset attr F/F */
    378   IN, ATTRREG, 0, 0, 0,
     378  { IN, ATTRREG, 0, 0, 0 },
    379379
    380380  /* Disable palette */
    381   OUT, PALREG, 0, 0, 0,
     381  { OUT, PALREG, 0, 0, 0 },
    382382
    383383  /* Reset sequencer regs */
    384   OUT, SEQREG, 0, SEQVAL, 0,
    385   OUT, SEQREG, 1, SEQVAL, 1,
    386   OUT, SEQREG, 2, SEQVAL, 0x0f,
    387   OUT, SEQREG, 3, SEQVAL, 0,
    388   OUT, SEQREG, 4, SEQVAL, 6,
     384  { OUT, SEQREG, 0, SEQVAL, 0 },
     385  { OUT, SEQREG, 1, SEQVAL, 1 },
     386  { OUT, SEQREG, 2, SEQVAL, 0x0f },
     387  { OUT, SEQREG, 3, SEQVAL, 0 },
     388  { OUT, SEQREG, 4, SEQVAL, 6 },
    389389
    390390  /* Misc out reg */
    391   OUT, GENREG1, 0xe3, 0, 0,
     391  { OUT, GENREG1, 0xe3, 0, 0 },
    392392
    393393  /* Sequencer enable */
    394   OUT, SEQREG, 0, SEQVAL, 0x03,
     394  { OUT, SEQREG, 0, SEQVAL, 0x03 },
    395395
    396396  /* Unprotect crtc regs 0-7 */
    397   OUT, CRTCREG, 0x11, CRTCVAL, 0,
     397  { OUT, CRTCREG, 0x11, CRTCVAL, 0 },
    398398
    399399  /* Crtc */
    400   OUT, CRTCREG, 0, CRTCVAL, 0x5f,
    401   OUT, CRTCREG, 1, CRTCVAL, 0x4f,
    402   OUT, CRTCREG, 2, CRTCVAL, 0x50,
    403   OUT, CRTCREG, 3, CRTCVAL, 0x82,
    404   OUT, CRTCREG, 4, CRTCVAL, 0x54,
    405   OUT, CRTCREG, 5, CRTCVAL, 0x80,
    406   OUT, CRTCREG, 6, CRTCVAL, 0x0b,
    407   OUT, CRTCREG, 7, CRTCVAL, 0x3e,
    408   OUT, CRTCREG, 8, CRTCVAL, 0x00,
    409   OUT, CRTCREG, 9, CRTCVAL, 0x40,
    410   OUT, CRTCREG, 10, CRTCVAL, 0x00,
    411   OUT, CRTCREG, 11, CRTCVAL, 0x00,
    412   OUT, CRTCREG, 12, CRTCVAL, 0x00,
    413   OUT, CRTCREG, 13, CRTCVAL, 0x00,
    414   OUT, CRTCREG, 14, CRTCVAL, 0x00,
    415   OUT, CRTCREG, 15, CRTCVAL, 0x59,
    416   OUT, CRTCREG, 16, CRTCVAL, 0xea,
    417   OUT, CRTCREG, 17, CRTCVAL, 0x8c,
    418   OUT, CRTCREG, 18, CRTCVAL, 0xdf,
    419   OUT, CRTCREG, 19, CRTCVAL, 0x28,
    420   OUT, CRTCREG, 20, CRTCVAL, 0x00,
    421   OUT, CRTCREG, 21, CRTCVAL, 0xe7,
    422   OUT, CRTCREG, 22, CRTCVAL, 0x04,
    423   OUT, CRTCREG, 23, CRTCVAL, 0xe3,
    424   OUT, CRTCREG, 24, CRTCVAL, 0xff,
     400  { OUT, CRTCREG, 0, CRTCVAL, 0x5f },
     401  { OUT, CRTCREG, 1, CRTCVAL, 0x4f },
     402  { OUT, CRTCREG, 2, CRTCVAL, 0x50 },
     403  { OUT, CRTCREG, 3, CRTCVAL, 0x82 },
     404  { OUT, CRTCREG, 4, CRTCVAL, 0x54 },
     405  { OUT, CRTCREG, 5, CRTCVAL, 0x80 },
     406  { OUT, CRTCREG, 6, CRTCVAL, 0x0b },
     407  { OUT, CRTCREG, 7, CRTCVAL, 0x3e },
     408  { OUT, CRTCREG, 8, CRTCVAL, 0x00 },
     409  { OUT, CRTCREG, 9, CRTCVAL, 0x40 },
     410  { OUT, CRTCREG, 10, CRTCVAL, 0x00 },
     411  { OUT, CRTCREG, 11, CRTCVAL, 0x00 },
     412  { OUT, CRTCREG, 12, CRTCVAL, 0x00 },
     413  { OUT, CRTCREG, 13, CRTCVAL, 0x00 },
     414  { OUT, CRTCREG, 14, CRTCVAL, 0x00 },
     415  { OUT, CRTCREG, 15, CRTCVAL, 0x59 },
     416  { OUT, CRTCREG, 16, CRTCVAL, 0xea },
     417  { OUT, CRTCREG, 17, CRTCVAL, 0x8c },
     418  { OUT, CRTCREG, 18, CRTCVAL, 0xdf },
     419  { OUT, CRTCREG, 19, CRTCVAL, 0x28 },
     420  { OUT, CRTCREG, 20, CRTCVAL, 0x00 },
     421  { OUT, CRTCREG, 21, CRTCVAL, 0xe7 },
     422  { OUT, CRTCREG, 22, CRTCVAL, 0x04 },
     423  { OUT, CRTCREG, 23, CRTCVAL, 0xe3 },
     424  { OUT, CRTCREG, 24, CRTCVAL, 0xff },
    425425
    426426  /* Graphics controller */
    427   OUT, GENREG2, 0x00, 0, 0,
    428   OUT, GENREG3, 0x01, 0, 0,
    429   OUT, GRREG, 0, GRVAL, 0x00,
    430   OUT, GRREG, 1, GRVAL, 0x00,
    431   OUT, GRREG, 2, GRVAL, 0x00,
    432   OUT, GRREG, 3, GRVAL, 0x00,
    433   OUT, GRREG, 4, GRVAL, 0x00,
    434   OUT, GRREG, 5, GRVAL, 0x00,
    435   OUT, GRREG, 6, GRVAL, 0x05,
    436   OUT, GRREG, 7, GRVAL, 0x0f,
    437   OUT, GRREG, 8, GRVAL, 0xff,
     427  { OUT, GENREG2, 0x00, 0, 0 },
     428  { OUT, GENREG3, 0x01, 0, 0 },
     429  { OUT, GRREG, 0, GRVAL, 0x00 },
     430  { OUT, GRREG, 1, GRVAL, 0x00 },
     431  { OUT, GRREG, 2, GRVAL, 0x00 },
     432  { OUT, GRREG, 3, GRVAL, 0x00 },
     433  { OUT, GRREG, 4, GRVAL, 0x00 },
     434  { OUT, GRREG, 5, GRVAL, 0x00 },
     435  { OUT, GRREG, 6, GRVAL, 0x05 },
     436  { OUT, GRREG, 7, GRVAL, 0x0f },
     437  { OUT, GRREG, 8, GRVAL, 0xff },
    438438
    439439  /* Reset attribute flip/flop */
    440   IN, ATTRREG, 0, 0, 0,
     440  { IN, ATTRREG, 0, 0, 0 },
    441441
    442442  /* Palette */
    443   OUT, PALREG, 0, PALREG, 0x00,
    444   OUT, PALREG, 1, PALREG, 0x01,
    445   OUT, PALREG, 2, PALREG, 0x02,
    446   OUT, PALREG, 3, PALREG, 0x03,
    447   OUT, PALREG, 4, PALREG, 0x04,
    448   OUT, PALREG, 5, PALREG, 0x05,
    449   OUT, PALREG, 6, PALREG, 0x06,
    450   OUT, PALREG, 7, PALREG, 0x07,
    451   OUT, PALREG, 8, PALREG, 0x38,
    452   OUT, PALREG, 9, PALREG, 0x39,
    453   OUT, PALREG, 10, PALREG, 0x3a,
    454   OUT, PALREG, 11, PALREG, 0x3b,
    455   OUT, PALREG, 12, PALREG, 0x3c,
    456   OUT, PALREG, 13, PALREG, 0x3d,
    457   OUT, PALREG, 14, PALREG, 0x3e,
    458   OUT, PALREG, 15, PALREG, 0x3f,
    459   OUT, PALREG, 16, PALREG, 0x01,
    460   OUT, PALREG, 17, PALREG, 0x00,
    461   OUT, PALREG, 18, PALREG, 0x0f,
    462   OUT, PALREG, 19, PALREG, 0x00,
     443  { OUT, PALREG, 0, PALREG, 0x00 },
     444  { OUT, PALREG, 1, PALREG, 0x01 },
     445  { OUT, PALREG, 2, PALREG, 0x02 },
     446  { OUT, PALREG, 3, PALREG, 0x03 },
     447  { OUT, PALREG, 4, PALREG, 0x04 },
     448  { OUT, PALREG, 5, PALREG, 0x05 },
     449  { OUT, PALREG, 6, PALREG, 0x06 },
     450  { OUT, PALREG, 7, PALREG, 0x07 },
     451  { OUT, PALREG, 8, PALREG, 0x38 },
     452  { OUT, PALREG, 9, PALREG, 0x39 },
     453  { OUT, PALREG, 10, PALREG, 0x3a },
     454  { OUT, PALREG, 11, PALREG, 0x3b },
     455  { OUT, PALREG, 12, PALREG, 0x3c },
     456  { OUT, PALREG, 13, PALREG, 0x3d },
     457  { OUT, PALREG, 14, PALREG, 0x3e },
     458  { OUT, PALREG, 15, PALREG, 0x3f },
     459  { OUT, PALREG, 16, PALREG, 0x01 },
     460  { OUT, PALREG, 17, PALREG, 0x00 },
     461  { OUT, PALREG, 18, PALREG, 0x0f },
     462  { OUT, PALREG, 19, PALREG, 0x00 },
    463463
    464464  /* Enable palette */
    465   OUT, PALREG, 0x20, 0, 0,
     465  { OUT, PALREG, 0x20, 0, 0 },
    466466
    467467  /* End of table */
    468   DONE, 0, 0, 0, 0
     468  { DONE, 0, 0, 0, 0 }
    469469};
    470470
     
    474474static REGIO graph_off[] = {
    475475  /* Reset attr F/F */
    476   IN, ATTRREG, 0, 0, 0,
     476  { IN, ATTRREG, 0, 0, 0 },
    477477
    478478  /* Disable palette */
    479   OUT, PALREG, 0, 0, 0,
     479  { OUT, PALREG, 0, 0, 0 },
    480480
    481481  /* Reset sequencer regs */
    482   OUT, SEQREG, 0, SEQVAL, 1,
    483   OUT, SEQREG, 1, SEQVAL, 1,
    484   OUT, SEQREG, 2, SEQVAL, 3,
    485   OUT, SEQREG, 3, SEQVAL, 0,
    486   OUT, SEQREG, 4, SEQVAL, 2,
     482  { OUT, SEQREG, 0, SEQVAL, 1 },
     483  { OUT, SEQREG, 1, SEQVAL, 1 },
     484  { OUT, SEQREG, 2, SEQVAL, 3 },
     485  { OUT, SEQREG, 3, SEQVAL, 0 },
     486  { OUT, SEQREG, 4, SEQVAL, 2 },
    487487
    488488  /* Misc out reg */
    489   OUT, GENREG1, 0x63, 0, 0,
     489  { OUT, GENREG1, 0x63, 0, 0 },
    490490
    491491  /* Sequencer enable */
    492   OUT, SEQREG, 0, SEQVAL, 3,
     492  { OUT, SEQREG, 0, SEQVAL, 3 },
    493493
    494494  /* Unprotect crtc regs 0-7 */
    495   OUT, CRTCREG, 0x11, CRTCVAL, 0,
     495  { OUT, CRTCREG, 0x11, CRTCVAL, 0 },
    496496
    497497  /* Crtc */
    498   OUT, CRTCREG, 0, CRTCVAL, 0x5f,       /* horiz total */
    499   OUT, CRTCREG, 1, CRTCVAL, 0x4f,       /* horiz end */
    500   OUT, CRTCREG, 2, CRTCVAL, 0x50,       /* horiz blank */
    501   OUT, CRTCREG, 3, CRTCVAL, 0x82,       /* end blank */
    502   OUT, CRTCREG, 4, CRTCVAL, 0x55,       /* horiz retrace */
    503   OUT, CRTCREG, 5, CRTCVAL, 0x81,       /* end retrace */
    504   OUT, CRTCREG, 6, CRTCVAL, 0xbf,       /* vert total */
    505   OUT, CRTCREG, 7, CRTCVAL, 0x1f,       /* overflows */
    506   OUT, CRTCREG, 8, CRTCVAL, 0x00,       /* row scan */
    507   OUT, CRTCREG, 9, CRTCVAL, 0x4f,       /* max scan line */
    508   OUT, CRTCREG, 10, CRTCVAL, 0x00,      /* cursor start */
    509   OUT, CRTCREG, 11, CRTCVAL, 0x0f,      /* cursor end */
    510   OUT, CRTCREG, 12, CRTCVAL, 0x0e,      /* start high addr */
    511   OUT, CRTCREG, 13, CRTCVAL, 0xb0,      /* low addr */
    512   OUT, CRTCREG, 14, CRTCVAL, 0x16,      /* cursor high */
    513   OUT, CRTCREG, 15, CRTCVAL, 0x30,      /* cursor low */
    514   OUT, CRTCREG, 16, CRTCVAL, 0x9c,      /* vert retrace */
    515   OUT, CRTCREG, 17, CRTCVAL, 0x8e,      /* retrace end */
    516   OUT, CRTCREG, 18, CRTCVAL, 0x8f,      /* vert end */
    517   OUT, CRTCREG, 19, CRTCVAL, 0x28,      /* offset */
    518   OUT, CRTCREG, 20, CRTCVAL, 0x1f,      /* underline */
    519   OUT, CRTCREG, 21, CRTCVAL, 0x96,      /* vert blank */
    520   OUT, CRTCREG, 22, CRTCVAL, 0xb9,      /* end blank */
    521   OUT, CRTCREG, 23, CRTCVAL, 0xa3,      /* crt mode */
    522   OUT, CRTCREG, 24, CRTCVAL, 0xff,      /* line compare */
     498  { OUT, CRTCREG, 0, CRTCVAL, 0x5f },   /* horiz total */
     499  { OUT, CRTCREG, 1, CRTCVAL, 0x4f },   /* horiz end */
     500  { OUT, CRTCREG, 2, CRTCVAL, 0x50 },   /* horiz blank */
     501  { OUT, CRTCREG, 3, CRTCVAL, 0x82 },   /* end blank */
     502  { OUT, CRTCREG, 4, CRTCVAL, 0x55 },   /* horiz retrace */
     503  { OUT, CRTCREG, 5, CRTCVAL, 0x81 },   /* end retrace */
     504  { OUT, CRTCREG, 6, CRTCVAL, 0xbf },   /* vert total */
     505  { OUT, CRTCREG, 7, CRTCVAL, 0x1f },   /* overflows */
     506  { OUT, CRTCREG, 8, CRTCVAL, 0x00 },   /* row scan */
     507  { OUT, CRTCREG, 9, CRTCVAL, 0x4f },   /* max scan line */
     508  { OUT, CRTCREG, 10, CRTCVAL, 0x00 },  /* cursor start */
     509  { OUT, CRTCREG, 11, CRTCVAL, 0x0f },  /* cursor end */
     510  { OUT, CRTCREG, 12, CRTCVAL, 0x0e },  /* start high addr */
     511  { OUT, CRTCREG, 13, CRTCVAL, 0xb0 },  /* low addr */
     512  { OUT, CRTCREG, 14, CRTCVAL, 0x16 },  /* cursor high */
     513  { OUT, CRTCREG, 15, CRTCVAL, 0x30 },  /* cursor low */
     514  { OUT, CRTCREG, 16, CRTCVAL, 0x9c },  /* vert retrace */
     515  { OUT, CRTCREG, 17, CRTCVAL, 0x8e },  /* retrace end */
     516  { OUT, CRTCREG, 18, CRTCVAL, 0x8f },  /* vert end */
     517  { OUT, CRTCREG, 19, CRTCVAL, 0x28 },  /* offset */
     518  { OUT, CRTCREG, 20, CRTCVAL, 0x1f },  /* underline */
     519  { OUT, CRTCREG, 21, CRTCVAL, 0x96 },  /* vert blank */
     520  { OUT, CRTCREG, 22, CRTCVAL, 0xb9 },  /* end blank */
     521  { OUT, CRTCREG, 23, CRTCVAL, 0xa3 },  /* crt mode */
     522  { OUT, CRTCREG, 24, CRTCVAL, 0xff },  /* line compare */
    523523
    524524  /* Graphics controller */
    525   OUT, GENREG2, 0x00, 0, 0,
    526   OUT, GENREG3, 0x01, 0, 0,
    527   OUT, GRREG, 0, GRVAL, 0x00,
    528   OUT, GRREG, 1, GRVAL, 0x00,
    529   OUT, GRREG, 2, GRVAL, 0x00,
    530   OUT, GRREG, 3, GRVAL, 0x00,
    531   OUT, GRREG, 4, GRVAL, 0x00,
    532   OUT, GRREG, 5, GRVAL, 0x10,
    533   OUT, GRREG, 6, GRVAL, 0x0e,
    534   OUT, GRREG, 7, GRVAL, 0x00,
    535   OUT, GRREG, 8, GRVAL, 0xff,
     525  { OUT, GENREG2, 0x00, 0, 0 },
     526  { OUT, GENREG3, 0x01, 0, 0 },
     527  { OUT, GRREG, 0, GRVAL, 0x00 },
     528  { OUT, GRREG, 1, GRVAL, 0x00 },
     529  { OUT, GRREG, 2, GRVAL, 0x00 },
     530  { OUT, GRREG, 3, GRVAL, 0x00 },
     531  { OUT, GRREG, 4, GRVAL, 0x00 },
     532  { OUT, GRREG, 5, GRVAL, 0x10 },
     533  { OUT, GRREG, 6, GRVAL, 0x0e },
     534  { OUT, GRREG, 7, GRVAL, 0x00 },
     535  { OUT, GRREG, 8, GRVAL, 0xff },
    536536
    537537  /* Reset attribute flip/flop */
    538   IN, ATTRREG, 0, 0, 0,
     538  { IN, ATTRREG, 0, 0, 0 },
    539539
    540540  /* Palette */
    541   OUT, PALREG, 0, PALREG, 0x00,
    542   OUT, PALREG, 1, PALREG, 0x01,
    543   OUT, PALREG, 2, PALREG, 0x02,
    544   OUT, PALREG, 3, PALREG, 0x03,
    545   OUT, PALREG, 4, PALREG, 0x04,
    546   OUT, PALREG, 5, PALREG, 0x05,
    547   OUT, PALREG, 6, PALREG, 0x06,
    548   OUT, PALREG, 7, PALREG, 0x07,
    549   OUT, PALREG, 8, PALREG, 0x10,
    550   OUT, PALREG, 9, PALREG, 0x11,
    551   OUT, PALREG, 10, PALREG, 0x12,
    552   OUT, PALREG, 11, PALREG, 0x13,
    553   OUT, PALREG, 12, PALREG, 0x14,
    554   OUT, PALREG, 13, PALREG, 0x15,
    555   OUT, PALREG, 14, PALREG, 0x16,
    556   OUT, PALREG, 15, PALREG, 0x17,
    557   OUT, PALREG, 16, PALREG, 0x08,
    558   OUT, PALREG, 17, PALREG, 0x00,
    559   OUT, PALREG, 18, PALREG, 0x0f,
    560   OUT, PALREG, 19, PALREG, 0x00,
     541  { OUT, PALREG, 0, PALREG, 0x00 },
     542  { OUT, PALREG, 1, PALREG, 0x01 },
     543  { OUT, PALREG, 2, PALREG, 0x02 },
     544  { OUT, PALREG, 3, PALREG, 0x03 },
     545  { OUT, PALREG, 4, PALREG, 0x04 },
     546  { OUT, PALREG, 5, PALREG, 0x05 },
     547  { OUT, PALREG, 6, PALREG, 0x06 },
     548  { OUT, PALREG, 7, PALREG, 0x07 },
     549  { OUT, PALREG, 8, PALREG, 0x10 },
     550  { OUT, PALREG, 9, PALREG, 0x11 },
     551  { OUT, PALREG, 10, PALREG, 0x12 },
     552  { OUT, PALREG, 11, PALREG, 0x13 },
     553  { OUT, PALREG, 12, PALREG, 0x14 },
     554  { OUT, PALREG, 13, PALREG, 0x15 },
     555  { OUT, PALREG, 14, PALREG, 0x16 },
     556  { OUT, PALREG, 15, PALREG, 0x17 },
     557  { OUT, PALREG, 16, PALREG, 0x08 },
     558  { OUT, PALREG, 17, PALREG, 0x00 },
     559  { OUT, PALREG, 18, PALREG, 0x0f },
     560  { OUT, PALREG, 19, PALREG, 0x00 },
    561561
    562562  /* Enable palette */
    563   OUT, PALREG, 0x20, 0, 0,
     563  { OUT, PALREG, 0x20, 0, 0 },
    564564
    565565  /* End of table */
    566   DONE, 0, 0, 0, 0
     566  { DONE, 0, 0, 0, 0 }
    567567};
    568568
  • c/src/lib/libbsp/i386/shared/comm/tty_drv.c

    reb33fa54 r9751c913  
    1919 *
    2020 * $Log$
     21 * Revision 1.2  2000/10/18 16:10:50  joel
     22 * 2000-10-18    Charles-Antoine Gauthier <charles.gauthier@nrc.ca>
     23 *
     24 *      * comm/i386-stub-glue.c, comm/tty_drv.c, comm/uart.c, comm/uart.h:
     25 *      Add the ability to set parity, number of data bits and
     26 *      number of stop bits to the existing i386 serial drivers.
     27 *
    2128 * Revision 1.1  2000/08/30 08:18:56  joel
    2229 * 2000-08-26  Rosimildo da Silva  <rdasilva@connecttel.com>
     
    353360    case CS6: databits = CHR_6_BITS; break;
    354361    case CS7: databits = CHR_7_BITS; break;
     362    default:  /* just to avoid warnings -- all cases are covered */
    355363    case CS8: databits = CHR_8_BITS; break;
    356364  }
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