Changeset 9374e9b0 in rtems
- Timestamp:
- 06/19/08 05:46:19 (16 years ago)
- Branches:
- 4.10, 4.11, 4.9, 5, master
- Children:
- eaaade2
- Parents:
- 8f25cec
- Location:
- c/src/lib/libbsp/m68k/mcf52235
- Files:
-
- 12 edited
Legend:
- Unmodified
- Added
- Removed
-
c/src/lib/libbsp/m68k/mcf52235/ChangeLog
r8f25cec r9374e9b0 1 2008-06-19 Matthew Riek <matthew.riek@ibiscomputer.com.au> 2 3 * mcf52235/README, mcf52235/gdb-init, mcf52235/clock/clock.c, 4 mcf52235/console/console.c, mcf52235/include/bsp.h, 5 mcf52235/include/coverhd.h, mcf52235/start/start.S, 6 mcf52235/startup/bspclean.c, mcf52235/startup/bspstart.c, 7 mcf52235/startup/linkcmds, mcf52235/timer/timer.c: Cleaned up 8 white space and code formmated to adhere to RTEMS standards. Fixed 9 a bug in the nano seconds since last tick support. Fixed a bug 10 with the location of the start stack (no longer within 11 .bss). Removed double definition of IPSBAR and some type defs 12 etc.. Added timing test overhead results. 13 1 14 2008-06-10 Matthew Riek <matthew.riek@ibiscomputer.com.au> 2 15 -
c/src/lib/libbsp/m68k/mcf52235/README
r8f25cec r9374e9b0 4 4 5 5 Description: Motorola MCF52235EVB 6 ============ 6 ============================================================================ 7 7 CPU: MCF52235, 60MHz 8 8 SRAM: 32K … … 12 12 This board is running at 60MHz scaled from a 25MHz oscillator. 13 13 14 ============================================================================ 14 15 NOTES: 15 ======16 16 17 Currently this BSP must be configured with most (all?)RTEMS features turned17 Currently this BSP must be configured with most RTEMS features turned 18 18 off as RAM usage is too high. 19 19 … … 23 23 --disable-tests 24 24 25 To get the tests to compile (but not run) change the linkcmds to specify 26 a larger sram memory region (256K works). This of course will let you 27 compile all tests, but many or most of them wont run. 28 29 See testsuites/samples/minumum for an example of what type of config flags 30 you need for this BSP! 31 32 In you project before you include confdefs.h, define some or all of the 33 following: 34 35 #define CONFIGURE_DISABLE_CLASSIC_API_NOTEPADS 36 #define CONFIGURE_DISABLE_CLASSIC_NOTEPADS 37 #define CONFIGURE_INIT_TASK_STACK_SIZE x 38 #define CONFIGURE_MINIMUM_TASK_STACK_SIZE x 39 #define CONFIGURE_INTERRUPT_STACK_SIZE x 40 41 Note that the default stack size is 1K 42 Note that the default number of priorities is 15 43 44 ============================================================================ 25 45 TODO: 26 =====27 46 28 *) Work with TINY RTEMS to get the ram usage down.29 47 *) Add drivers for I2C, ADC, FEC 30 48 *) Support for LWIP 31 49 *) Update the coverhd.h (calling overheads) page 21 of the BSP guide 32 *) Adjust initial stack so that it's space is not forever unusable after init 33 *) Fix up constants used by cfinit such as clockspeed, rambase, flashbase etc. 50 *) Recover the 1K stack space reserved in linkcmds used for board startup. 34 51 35 52 ============================================================================ 53 36 54 Interrupt map 37 55 … … 47 65 | 5 | | | | | | | | | 48 66 +-----+--------+--------+--------+--------+--------+--------+--------+--------+ 49 | 4 | FEC RX | FEC TX| | | | | | PIT |67 | 4 | | | | | | | | PIT | 50 68 +-----+--------+--------+--------+--------+--------+--------+--------+--------+ 51 69 | 3 | UART 0 | UART 1 | UART 2 | | | | | | … … 55 73 | 1 | | | | | | | | | 56 74 +-----+--------+--------+--------+--------+--------+--------+--------+--------+ 75 76 ============================================================================ 77 78 *** TIME TEST 1 *** 79 rtems_semaphore_create 8 80 rtems_semaphore_delete 10 81 rtems_semaphore_obtain: available 3 82 rtems_semaphore_obtain: not available -- NO_WAIT 3 83 rtems_semaphore_release: no waiting tasks 7 84 *** END OF TEST 1 *** 85 86 87 *** TIME TEST OVERHEAD *** 88 rtems_shutdown_executive 0 89 rtems_task_create 0 90 rtems_task_ident 0 91 rtems_task_start 0 92 rtems_task_restart 0 93 rtems_task_delete 0 94 rtems_task_suspend 0 95 rtems_task_resume 0 96 rtems_task_set_priority 0 97 rtems_task_mode 0 98 rtems_task_get_note 0 99 rtems_task_set_note 0 100 rtems_task_wake_when 0 101 rtems_task_wake_after 0 102 rtems_interrupt_catch 0 103 rtems_clock_get 0 104 rtems_clock_set 0 105 rtems_clock_tick 0 106 <pause> 107 rtems_timer_create 0 108 rtems_timer_delete 0 109 rtems_timer_ident 0 110 rtems_timer_fire_after 0 111 rtems_timer_fire_when 1 112 rtems_timer_reset 0 113 rtems_timer_cancel 0 114 rtems_semaphore_create 0 115 rtems_semaphore_delete 0 116 rtems_semaphore_ident 0 117 rtems_semaphore_obtain 0 118 rtems_semaphore_release 0 119 rtems_message_queue_create 0 120 rtems_message_queue_ident 0 121 rtems_message_queue_delete 0 122 rtems_message_queue_send 0 123 rtems_message_queue_urgent 0 124 rtems_message_queue_broadcast 0 125 rtems_message_queue_receive 0 126 rtems_message_queue_flush 0 127 <pause> 128 rtems_event_send 0 129 rtems_event_receive 0 130 rtems_signal_catch 0 131 rtems_signal_send 0 132 rtems_partition_create 0 133 rtems_partition_ident 0 134 rtems_partition_delete 0 135 rtems_partition_get_buffer 0 136 rtems_partition_return_buffer 0 137 rtems_region_create 0 138 rtems_region_ident 0 139 rtems_region_delete 0 140 rtems_region_get_segment 0 141 rtems_region_return_segment 0 142 rtems_port_create 0 143 rtems_port_ident 0 144 rtems_port_delete 0 145 rtems_port_external_to_internal 0 146 rtems_port_internal_to_external 0 147 <pause> 148 rtems_io_initialize 0 149 rtems_io_open 0 150 rtems_io_close 0 151 rtems_io_read 0 152 rtems_io_write 0 153 rtems_io_control 0 154 rtems_fatal_error_occurred 0 155 rtems_rate_monotonic_create 0 156 rtems_rate_monotonic_ident 0 157 rtems_rate_monotonic_delete 0 158 rtems_rate_monotonic_cancel 0 159 rtems_rate_monotonic_period 0 160 rtems_multiprocessing_announce 0 161 *** END OF TIME OVERHEAD *** 162 163 -
c/src/lib/libbsp/m68k/mcf52235/clock/clock.c
r8f25cec r9374e9b0 18 18 /* 19 19 * Provide nanosecond extension 20 * Interrupts are disabled when this is called 20 21 */ 21 22 static uint32_t bsp_clock_nanoseconds_since_last_tick(void) 22 23 { 23 uint32_t i = MCF_PIT1_PCNTR; 24 if(MCF_PIT1_PCSR & MCF_PIT_PCSR_PIF) 25 { 26 i = MCF_PIT1_PCNTR + MCF_PIT1_PMR; 27 } 28 return (i - s_pcntrAtTick) * s_nanoScale; 24 uint32_t i; 25 26 if (MCF_PIT1_PCSR & MCF_PIT_PCSR_PIF) { 27 i = s_pcntrAtTick + (MCF_PIT1_PMR - MCF_PIT1_PCNTR); 28 } 29 else { 30 i = s_pcntrAtTick - MCF_PIT1_PCNTR; 31 } 32 return i * s_nanoScale; 29 33 } 30 34 … … 51 55 * Turn off the clock 52 56 */ 53 static void Clock_driver_support_shutdown_hardware() 57 static void Clock_driver_support_shutdown_hardware() 54 58 { 55 59 MCF_PIT1_PCSR &= ~MCF_PIT_PCSR_EN; 56 60 } 57 61 … … 63 67 static void Clock_driver_support_initialize_hardware() 64 68 { 65 int level; 66 uint32_t pmr; 67 uint32_t preScaleCode = 0; 68 uint32_t clk = bsp_get_CPU_clock_speed() >> 1; 69 uint32_t tps = 1000000 / Configuration.microseconds_per_tick; 70 while (preScaleCode < 15) { 71 pmr = (clk >> preScaleCode) / tps; 72 if(pmr < (1 << 15)) break; 73 preScaleCode++; 74 } 75 s_nanoScale = 1000000000 / (clk >> preScaleCode); 69 int level; 70 uint32_t pmr; 71 uint32_t preScaleCode = 0; 72 uint32_t clk = bsp_get_CPU_clock_speed() >> 1; 73 uint32_t tps = 1000000 / Configuration.microseconds_per_tick; 76 74 77 MCF_INTC0_ICR56 = MCF_INTC_ICR_IL(PIT3_IRQ_LEVEL) | 78 MCF_INTC_ICR_IP(PIT3_IRQ_PRIORITY); 79 rtems_interrupt_disable( level ); 80 MCF_INTC0_IMRH &= ~MCF_INTC_IMRH_MASK56; 81 MCF_PIT1_PCSR &= ~MCF_PIT_PCSR_EN; 82 rtems_interrupt_enable( level ); 75 while (preScaleCode < 15) { 76 pmr = (clk >> preScaleCode) / tps; 77 if (pmr < (1 << 15)) 78 break; 79 preScaleCode++; 80 } 81 s_nanoScale = 1000000000 / (clk >> preScaleCode); 83 82 84 MCF_PIT1_PCSR = MCF_PIT_PCSR_PRE(preScaleCode) | 85 MCF_PIT_PCSR_OVW | 86 MCF_PIT_PCSR_PIE | 87 MCF_PIT_PCSR_RLD; 88 MCF_PIT1_PMR = pmr; 89 MCF_PIT1_PCSR = MCF_PIT_PCSR_PRE(preScaleCode) | 90 MCF_PIT_PCSR_PIE | 91 MCF_PIT_PCSR_RLD | 92 MCF_PIT_PCSR_EN; 93 s_pcntrAtTick = MCF_PIT1_PCNTR; 83 MCF_INTC0_ICR56 = MCF_INTC_ICR_IL(PIT3_IRQ_LEVEL) | 84 MCF_INTC_ICR_IP(PIT3_IRQ_PRIORITY); 85 rtems_interrupt_disable(level); 86 MCF_INTC0_IMRH &= ~MCF_INTC_IMRH_MASK56; 87 MCF_PIT1_PCSR &= ~MCF_PIT_PCSR_EN; 88 rtems_interrupt_enable(level); 89 90 MCF_PIT1_PCSR = MCF_PIT_PCSR_PRE(preScaleCode) | 91 MCF_PIT_PCSR_OVW | MCF_PIT_PCSR_PIE | MCF_PIT_PCSR_RLD; 92 MCF_PIT1_PMR = pmr; 93 MCF_PIT1_PCSR = MCF_PIT_PCSR_PRE(preScaleCode) | 94 MCF_PIT_PCSR_PIE | MCF_PIT_PCSR_RLD | MCF_PIT_PCSR_EN; 95 s_pcntrAtTick = MCF_PIT1_PCNTR; 94 96 } 95 97 -
c/src/lib/libbsp/m68k/mcf52235/console/console.c
r8f25cec r9374e9b0 24 24 25 25 static int IntUartPollWrite(int minor, const char *buf, int len); 26 static int IntUartInterruptWrite 27 28 static void 29 _BSP_null_char( char c ) 30 { 31 int level; 32 33 if (c == '\n')34 _BSP_null_char('\r');35 rtems_interrupt_disable(level); 36 while ( (MCF_UART_USR(CONSOLE_PORT) & MCF_UART_USR_TXRDY) == 0 )37 continue;38 MCF_UART_UTB(CONSOLE_PORT) = c;39 while ( (MCF_UART_USR(CONSOLE_PORT) & MCF_UART_USR_TXRDY) == 0 )40 continue;41 rtems_interrupt_enable(level); 42 } 26 static int IntUartInterruptWrite(int minor, const char *buf, int len); 27 28 static void _BSP_null_char(char c) 29 { 30 int level; 31 32 if (c == '\n') 33 _BSP_null_char('\r'); 34 rtems_interrupt_disable(level); 35 while ((MCF_UART_USR(CONSOLE_PORT) & MCF_UART_USR_TXRDY) == 0) 36 continue; 37 MCF_UART_UTB(CONSOLE_PORT) = c; 38 while ((MCF_UART_USR(CONSOLE_PORT) & MCF_UART_USR_TXRDY) == 0) 39 continue; 40 rtems_interrupt_enable(level); 41 } 42 43 43 BSP_output_char_function_type BSP_output_char = _BSP_null_char; 44 44 … … 48 48 struct IntUartInfoStruct 49 49 { 50 intiomode;51 volatile intuimr;52 intbaud;53 intdatabits;54 intparity;55 intstopbits;56 inthwflow;57 intrx_in;58 intrx_out;59 charrx_buffer[RX_BUFFER_SIZE];60 void*ttyp;50 int iomode; 51 volatile int uimr; 52 int baud; 53 int databits; 54 int parity; 55 int stopbits; 56 int hwflow; 57 int rx_in; 58 int rx_out; 59 char rx_buffer[RX_BUFFER_SIZE]; 60 void *ttyp; 61 61 }; 62 62 … … 69 69 ***************************************************************************/ 70 70 static void 71 IntUartSet(int minor, int baud, int databits, int parity, int stopbits, int hwflow) 72 { 73 int divisor; 74 uint32_t clock_speed; 75 uint8_t umr1 = 0; 76 uint8_t umr2 = 0; 77 struct IntUartInfoStruct *info = &IntUartInfo[minor]; 78 int level; 79 80 rtems_interrupt_disable(level); 81 82 83 /* disable interrupts, clear RTS line, and disable the UARTS */ 84 MCF_UART_UIMR(minor) = 0; 85 MCF_UART_UOP0(minor) = 1; 86 MCF_UART_UCR(minor) = (MCF_UART_UCR_TX_DISABLED | MCF_UART_UCR_RX_DISABLED); 87 88 /* save the current values */ 89 info->uimr = 0; 90 info->baud = baud; 91 info->databits = databits; 92 info->parity = parity; 93 info->stopbits = stopbits; 94 info->hwflow = hwflow; 95 96 clock_speed = bsp_get_CPU_clock_speed(); 97 /* determine the baud divisor value */ 98 // MRTODO 99 //divisor = ((clock_speed/2) / ( 32 * baud )); 100 divisor = ((clock_speed) / ( 32 * baud )); 101 if ( divisor < 2 ) 102 divisor = 2; 103 104 /* check to see if doing hardware flow control */ 105 if ( hwflow ) 106 { 107 /* set hardware flow options */ 108 umr1 |= MCF_UART_UMR_RXRTS; 109 umr2 |= MCF_UART_UMR_TXCTS; 110 } 111 112 /* determine the new umr values */ 113 umr1 |= (parity | databits); 114 umr2 |= (stopbits); 115 116 /* reset the uart */ 117 MCF_UART_UCR(minor) = MCF_UART_UCR_RESET_ERROR; 118 MCF_UART_UCR(minor) = MCF_UART_UCR_RESET_RX; 119 MCF_UART_UCR(minor) = MCF_UART_UCR_RESET_TX; 120 121 /* reset the uart mode register and update values */ 122 MCF_UART_UCR(minor) = MCF_UART_UCR_RESET_MR; 123 MCF_UART_UMR(minor) = umr1; 124 MCF_UART_UMR(minor) = umr2; 125 126 /* set the baud rate values */ 127 MCF_UART_UCSR(minor) = (MCF_UART_UCSR_RCS_SYS_CLK | MCF_UART_UCSR_TCS_SYS_CLK); 128 MCF_UART_UBG1(minor) = (divisor & 0xff00) >> 8; 129 MCF_UART_UBG2(minor) = (divisor & 0x00ff); 130 131 /* enable the uart */ 132 MCF_UART_UCR(minor) = (MCF_UART_UCR_TX_ENABLED | MCF_UART_UCR_RX_ENABLED); 133 134 /* check to see if interrupts need to be enabled */ 135 if ( info->iomode != TERMIOS_POLLED ) 136 { 137 /* enable rx interrupts */ 138 info->uimr |= MCF_UART_UIMR_RXRDY_FU; 139 MCF_UART_UIMR(minor) = info->uimr; 140 } 141 142 /* check to see if doing hardware flow control */ 143 if ( hwflow ) 144 { 145 /* assert the RTS line */ 146 MCF_UART_UOP1(minor) = 1; 147 } 148 149 rtems_interrupt_enable(level); 150 151 } 152 71 IntUartSet(int minor, int baud, int databits, int parity, int stopbits, 72 int hwflow) 73 { 74 int divisor; 75 uint32_t clock_speed; 76 uint8_t umr1 = 0; 77 uint8_t umr2 = 0; 78 struct IntUartInfoStruct *info = &IntUartInfo[minor]; 79 int level; 80 81 rtems_interrupt_disable(level); 82 83 /* disable interrupts, clear RTS line, and disable the UARTS */ 84 MCF_UART_UIMR(minor) = 0; 85 MCF_UART_UOP0(minor) = 1; 86 MCF_UART_UCR(minor) = (MCF_UART_UCR_TX_DISABLED | MCF_UART_UCR_RX_DISABLED); 87 88 /* save the current values */ 89 info->uimr = 0; 90 info->baud = baud; 91 info->databits = databits; 92 info->parity = parity; 93 info->stopbits = stopbits; 94 info->hwflow = hwflow; 95 96 clock_speed = bsp_get_CPU_clock_speed(); 97 /* determine the baud divisor value */ 98 divisor = ((clock_speed) / (32 * baud)); 99 if (divisor < 2) 100 divisor = 2; 101 102 /* check to see if doing hardware flow control */ 103 if (hwflow) { 104 /* set hardware flow options */ 105 umr1 |= MCF_UART_UMR_RXRTS; 106 umr2 |= MCF_UART_UMR_TXCTS; 107 } 108 109 /* determine the new umr values */ 110 umr1 |= (parity | databits); 111 umr2 |= (stopbits); 112 113 /* reset the uart */ 114 MCF_UART_UCR(minor) = MCF_UART_UCR_RESET_ERROR; 115 MCF_UART_UCR(minor) = MCF_UART_UCR_RESET_RX; 116 MCF_UART_UCR(minor) = MCF_UART_UCR_RESET_TX; 117 118 /* reset the uart mode register and update values */ 119 MCF_UART_UCR(minor) = MCF_UART_UCR_RESET_MR; 120 MCF_UART_UMR(minor) = umr1; 121 MCF_UART_UMR(minor) = umr2; 122 123 /* set the baud rate values */ 124 MCF_UART_UCSR(minor) = 125 (MCF_UART_UCSR_RCS_SYS_CLK | MCF_UART_UCSR_TCS_SYS_CLK); 126 MCF_UART_UBG1(minor) = (divisor & 0xff00) >> 8; 127 MCF_UART_UBG2(minor) = (divisor & 0x00ff); 128 129 /* enable the uart */ 130 MCF_UART_UCR(minor) = (MCF_UART_UCR_TX_ENABLED | MCF_UART_UCR_RX_ENABLED); 131 132 /* check to see if interrupts need to be enabled */ 133 if (info->iomode != TERMIOS_POLLED) { 134 /* enable rx interrupts */ 135 info->uimr |= MCF_UART_UIMR_RXRDY_FU; 136 MCF_UART_UIMR(minor) = info->uimr; 137 } 138 139 /* check to see if doing hardware flow control */ 140 if (hwflow) { 141 /* assert the RTS line */ 142 MCF_UART_UOP1(minor) = 1; 143 } 144 145 rtems_interrupt_enable(level); 146 147 } 153 148 154 149 /*************************************************************************** … … 161 156 an error of +/- 5% at 25MHz processor clock 162 157 ***************************************************************************/ 163 static int 164 IntUartSetAttributes(int minor, const struct termios *t) 165 { 166 /* set default index values */ 167 int baud = (int)19200; 168 int databits = (int)MCF_UART_UMR_BC_8; 169 int parity = (int)MCF_UART_UMR_PM_NONE; 170 int stopbits = (int)MCF_UART_UMR_SB_STOP_BITS_1; 171 int hwflow = (int)0; 172 struct IntUartInfoStruct *info = &IntUartInfo[minor]; 173 174 /* check to see if input is valid */ 175 if ( t != (const struct termios *)0 ) 176 { 177 /* determine baud rate index */ 178 baud = termios_baud_to_number(t->c_cflag & CBAUD); 179 180 /* determine data bits */ 181 switch ( t->c_cflag & CSIZE ) 182 { 183 case CS5: 184 databits = (int)MCF_UART_UMR_BC_5; 185 break; 186 case CS6: 187 databits = (int)MCF_UART_UMR_BC_6; 188 break; 189 case CS7: 190 databits = (int)MCF_UART_UMR_BC_7; 191 break; 192 case CS8: 193 databits = (int)MCF_UART_UMR_BC_8; 194 break; 195 } 196 197 /* determine if parity is enabled */ 198 if ( t->c_cflag & PARENB ) 199 { 200 if ( t->c_cflag & PARODD ) 201 { 202 /* odd parity */ 203 parity = (int)MCF_UART_UMR_PM_ODD; 204 } 205 else 206 { 207 /* even parity */ 208 parity = (int)MCF_UART_UMR_PM_EVEN; 209 } 210 } 211 212 /* determine stop bits */ 213 if ( t->c_cflag & CSTOPB ) 214 { 215 /* two stop bits */ 216 stopbits = (int)MCF_UART_UMR_SB_STOP_BITS_2; 217 } 218 219 /* check to see if hardware flow control */ 220 if ( t->c_cflag & CRTSCTS ) 221 { 222 hwflow = 1; 223 } 224 } 225 226 /* check to see if values have changed */ 227 if ( ( baud != info->baud ) || 228 ( databits != info->databits ) || 229 ( parity != info->parity ) || 230 ( stopbits != info->stopbits ) || 231 ( hwflow != info->hwflow ) ) 232 { 233 234 /* call function to set values */ 235 IntUartSet(minor, baud, databits, parity, stopbits, hwflow); 236 } 237 238 return( RTEMS_SUCCESSFUL ); 158 static int IntUartSetAttributes(int minor, const struct termios *t) 159 { 160 /* set default index values */ 161 int baud = (int) 19200; 162 int databits = (int) MCF_UART_UMR_BC_8; 163 int parity = (int) MCF_UART_UMR_PM_NONE; 164 int stopbits = (int) MCF_UART_UMR_SB_STOP_BITS_1; 165 int hwflow = (int) 0; 166 struct IntUartInfoStruct *info = &IntUartInfo[minor]; 167 168 /* check to see if input is valid */ 169 if (t != (const struct termios *) 0) { 170 /* determine baud rate index */ 171 baud = termios_baud_to_number(t->c_cflag & CBAUD); 172 173 /* determine data bits */ 174 switch (t->c_cflag & CSIZE) { 175 case CS5: 176 databits = (int) MCF_UART_UMR_BC_5; 177 break; 178 case CS6: 179 databits = (int) MCF_UART_UMR_BC_6; 180 break; 181 case CS7: 182 databits = (int) MCF_UART_UMR_BC_7; 183 break; 184 case CS8: 185 databits = (int) MCF_UART_UMR_BC_8; 186 break; 187 } 188 189 /* determine if parity is enabled */ 190 if (t->c_cflag & PARENB) { 191 if (t->c_cflag & PARODD) { 192 /* odd parity */ 193 parity = (int) MCF_UART_UMR_PM_ODD; 194 } else { 195 /* even parity */ 196 parity = (int) MCF_UART_UMR_PM_EVEN; 197 } 198 } 199 200 /* determine stop bits */ 201 if (t->c_cflag & CSTOPB) { 202 /* two stop bits */ 203 stopbits = (int) MCF_UART_UMR_SB_STOP_BITS_2; 204 } 205 206 /* check to see if hardware flow control */ 207 if (t->c_cflag & CRTSCTS) { 208 hwflow = 1; 209 } 210 } 211 212 /* check to see if values have changed */ 213 if ((baud != info->baud) || 214 (databits != info->databits) || 215 (parity != info->parity) || 216 (stopbits != info->stopbits) || (hwflow != info->hwflow)) { 217 218 /* call function to set values */ 219 IntUartSet(minor, baud, databits, parity, stopbits, hwflow); 220 } 221 222 return (RTEMS_SUCCESSFUL); 239 223 240 224 } … … 247 231 chars and dequeueing chars waiting for transmission. 248 232 ***************************************************************************/ 249 static rtems_isr 250 IntUartInterruptHandler(rtems_vector_number v) 251 { 252 unsigned int chan = v - UART_INTC0_IRQ_VECTOR(0); 253 struct IntUartInfoStruct *info = &IntUartInfo[chan]; 254 255 /* check to see if received data */ 256 if ( MCF_UART_UISR(chan) & MCF_UART_UISR_RXRDY_FU ) 257 { 258 /* read data and put into the receive buffer */ 259 while ( MCF_UART_USR(chan) & MCF_UART_USR_RXRDY ) 260 { 261 262 if ( MCF_UART_USR(chan) & MCF_UART_USR_ERROR ) 263 { 264 /* clear the error */ 265 MCF_UART_UCR(chan) = MCF_UART_UCR_RESET_ERROR; 266 } 267 /* put data in rx buffer and check for errors */ 268 info->rx_buffer[info->rx_in] = MCF_UART_URB(chan); 269 270 /* update buffer values */ 271 info->rx_in++; 272 273 if ( info->rx_in >= RX_BUFFER_SIZE ) 274 { 275 info->rx_in = 0; 276 } 277 } 278 /* Make sure the port has been opened */ 279 if ( info->ttyp ) 280 { 281 282 /* check to see if task driven */ 283 if ( info->iomode == TERMIOS_TASK_DRIVEN ) 284 { 285 /* notify rx task that rx buffer has data */ 286 rtems_termios_rxirq_occured(info->ttyp); 287 } 288 else 289 { 290 /* Push up the received data */ 291 rtems_termios_enqueue_raw_characters(info->ttyp, info->rx_buffer, info->rx_in); 292 info->rx_in = 0; 293 } 294 } 295 } 296 297 /* check to see if data needs to be transmitted */ 298 if ( ( info->uimr & MCF_UART_UIMR_TXRDY ) && 299 ( MCF_UART_UISR(chan) & MCF_UART_UISR_TXRDY ) ) 300 { 301 302 /* disable tx interrupts */ 303 info->uimr &= ~MCF_UART_UIMR_TXRDY; 304 MCF_UART_UIMR(chan) = info->uimr; 305 306 /* tell upper level that character has been sent */ 307 if ( info->ttyp ) 308 rtems_termios_dequeue_characters(info->ttyp, 1); 309 } 310 } 311 312 233 static rtems_isr IntUartInterruptHandler(rtems_vector_number v) 234 { 235 unsigned int chan = v - UART_INTC0_IRQ_VECTOR(0); 236 struct IntUartInfoStruct *info = &IntUartInfo[chan]; 237 238 /* check to see if received data */ 239 if (MCF_UART_UISR(chan) & MCF_UART_UISR_RXRDY_FU) { 240 /* read data and put into the receive buffer */ 241 while (MCF_UART_USR(chan) & MCF_UART_USR_RXRDY) { 242 243 if (MCF_UART_USR(chan) & MCF_UART_USR_ERROR) { 244 /* clear the error */ 245 MCF_UART_UCR(chan) = MCF_UART_UCR_RESET_ERROR; 246 } 247 /* put data in rx buffer and check for errors */ 248 info->rx_buffer[info->rx_in] = MCF_UART_URB(chan); 249 250 /* update buffer values */ 251 info->rx_in++; 252 253 if (info->rx_in >= RX_BUFFER_SIZE) { 254 info->rx_in = 0; 255 } 256 } 257 /* Make sure the port has been opened */ 258 if (info->ttyp) { 259 260 /* check to see if task driven */ 261 if (info->iomode == TERMIOS_TASK_DRIVEN) { 262 /* notify rx task that rx buffer has data */ 263 rtems_termios_rxirq_occured(info->ttyp); 264 } else { 265 /* Push up the received data */ 266 rtems_termios_enqueue_raw_characters(info->ttyp, info->rx_buffer, 267 info->rx_in); 268 info->rx_in = 0; 269 } 270 } 271 } 272 273 /* check to see if data needs to be transmitted */ 274 if ((info->uimr & MCF_UART_UIMR_TXRDY) && 275 (MCF_UART_UISR(chan) & MCF_UART_UISR_TXRDY)) { 276 277 /* disable tx interrupts */ 278 info->uimr &= ~MCF_UART_UIMR_TXRDY; 279 MCF_UART_UIMR(chan) = info->uimr; 280 281 /* tell upper level that character has been sent */ 282 if (info->ttyp) 283 rtems_termios_dequeue_characters(info->ttyp, 1); 284 } 285 } 313 286 314 287 /*************************************************************************** … … 319 292 interrupt vectors are hooked. 320 293 ***************************************************************************/ 321 static void 322 IntUartInitialize(void) 323 { 324 unsigned int chan; 325 struct IntUartInfoStruct *info; 326 rtems_isr_entry old_handler; 327 int level; 328 329 for ( chan = 0; chan < MAX_UART_INFO; chan++ ) 330 { 331 info = &IntUartInfo[chan]; 332 333 info->ttyp = NULL; 334 info->rx_in = 0; 335 info->rx_out = 0; 336 info->baud = -1; 337 info->databits = -1; 338 info->parity = -1; 339 info->stopbits = -1; 340 info->hwflow = -1; 341 info->iomode = TERMIOS_POLLED; /*polled console io */ 342 343 MCF_UART_UACR(chan) = 0; 344 MCF_UART_UIMR(chan) = 0; 345 if ( info->iomode != TERMIOS_POLLED ) 346 { 347 rtems_interrupt_catch (IntUartInterruptHandler, 348 UART_INTC0_IRQ_VECTOR(chan), 349 &old_handler); 350 } 351 352 /* set uart default values */ 353 IntUartSetAttributes(chan, NULL); 354 355 /* unmask interrupt */ 356 rtems_interrupt_disable(level); 357 switch(chan) { 358 case 0: 359 MCF_INTC0_ICR13 = MCF_INTC_ICR_IL(UART0_IRQ_LEVEL) | 360 MCF_INTC_ICR_IP(UART0_IRQ_PRIORITY); 361 MCF_INTC0_IMRL &= ~(MCF_INTC_IMRL_MASK13 | 362 MCF_INTC_IMRL_MASKALL); 363 break; 364 365 case 1: 366 MCF_INTC0_ICR14 = MCF_INTC_ICR_IL(UART1_IRQ_LEVEL) | 367 MCF_INTC_ICR_IP(UART1_IRQ_PRIORITY); 368 MCF_INTC0_IMRL &= ~(MCF_INTC_IMRL_MASK14 | 369 MCF_INTC_IMRL_MASKALL); 370 break; 371 372 case 2: 373 MCF_INTC0_ICR15 = MCF_INTC_ICR_IL(UART2_IRQ_LEVEL) | 374 MCF_INTC_ICR_IP(UART2_IRQ_PRIORITY); 375 MCF_INTC0_IMRL &= ~(MCF_INTC_IMRL_MASK15 | 376 MCF_INTC_IMRL_MASKALL); 377 break; 378 } 379 rtems_interrupt_enable(level); 380 381 } /* of chan loop */ 382 383 384 } /* IntUartInitialise */ 385 294 static void IntUartInitialize(void) 295 { 296 unsigned int chan; 297 struct IntUartInfoStruct *info; 298 rtems_isr_entry old_handler; 299 int level; 300 301 for (chan = 0; chan < MAX_UART_INFO; chan++) { 302 info = &IntUartInfo[chan]; 303 304 info->ttyp = NULL; 305 info->rx_in = 0; 306 info->rx_out = 0; 307 info->baud = -1; 308 info->databits = -1; 309 info->parity = -1; 310 info->stopbits = -1; 311 info->hwflow = -1; 312 info->iomode = TERMIOS_POLLED; /*polled console io */ 313 314 MCF_UART_UACR(chan) = 0; 315 MCF_UART_UIMR(chan) = 0; 316 if (info->iomode != TERMIOS_POLLED) { 317 rtems_interrupt_catch(IntUartInterruptHandler, 318 UART_INTC0_IRQ_VECTOR(chan), &old_handler); 319 } 320 321 /* set uart default values */ 322 IntUartSetAttributes(chan, NULL); 323 324 /* unmask interrupt */ 325 rtems_interrupt_disable(level); 326 switch (chan) { 327 case 0: 328 MCF_INTC0_ICR13 = MCF_INTC_ICR_IL(UART0_IRQ_LEVEL) | 329 MCF_INTC_ICR_IP(UART0_IRQ_PRIORITY); 330 MCF_INTC0_IMRL &= ~(MCF_INTC_IMRL_MASK13 | MCF_INTC_IMRL_MASKALL); 331 break; 332 333 case 1: 334 MCF_INTC0_ICR14 = MCF_INTC_ICR_IL(UART1_IRQ_LEVEL) | 335 MCF_INTC_ICR_IP(UART1_IRQ_PRIORITY); 336 MCF_INTC0_IMRL &= ~(MCF_INTC_IMRL_MASK14 | MCF_INTC_IMRL_MASKALL); 337 break; 338 339 case 2: 340 MCF_INTC0_ICR15 = MCF_INTC_ICR_IL(UART2_IRQ_LEVEL) | 341 MCF_INTC_ICR_IP(UART2_IRQ_PRIORITY); 342 MCF_INTC0_IMRL &= ~(MCF_INTC_IMRL_MASK15 | MCF_INTC_IMRL_MASKALL); 343 break; 344 } 345 rtems_interrupt_enable(level); 346 347 } /* of chan loop */ 348 349 } /* IntUartInitialise */ 386 350 387 351 /*************************************************************************** … … 393 357 interrupts. 394 358 ***************************************************************************/ 395 static int 396 IntUartInterruptWrite (int minor, const char *buf, int len) 397 { 398 int level; 399 400 rtems_interrupt_disable(level); 401 402 /* write out character */ 403 MCF_UART_UTB(minor) = *buf; 404 405 /* enable tx interrupt */ 406 IntUartInfo[minor].uimr |= MCF_UART_UIMR_TXRDY; 407 MCF_UART_UIMR(minor) = IntUartInfo[minor].uimr; 408 409 rtems_interrupt_enable(level); 410 return( 0 ); 359 static int IntUartInterruptWrite(int minor, const char *buf, int len) 360 { 361 int level; 362 363 rtems_interrupt_disable(level); 364 365 /* write out character */ 366 MCF_UART_UTB(minor) = *buf; 367 368 /* enable tx interrupt */ 369 IntUartInfo[minor].uimr |= MCF_UART_UIMR_TXRDY; 370 MCF_UART_UIMR(minor) = IntUartInfo[minor].uimr; 371 372 rtems_interrupt_enable(level); 373 return (0); 411 374 } 412 375 … … 416 379 Description : This enables interrupts when the tty is opened. 417 380 ***************************************************************************/ 418 static int 419 IntUartInterruptOpen(int major, int minor, void *arg) 420 { 421 struct IntUartInfoStruct *info = &IntUartInfo[minor]; 422 423 /* enable the uart */ 424 MCF_UART_UCR(minor) = (MCF_UART_UCR_TX_ENABLED | MCF_UART_UCR_RX_ENABLED); 425 426 /* check to see if interrupts need to be enabled */ 427 if ( info->iomode != TERMIOS_POLLED ) 428 { 429 /* enable rx interrupts */ 430 info->uimr |= MCF_UART_UIMR_RXRDY_FU; 431 MCF_UART_UIMR(minor) = info->uimr; 432 } 433 434 /* check to see if doing hardware flow control */ 435 if ( info->hwflow ) 436 { 437 /* assert the RTS line */ 438 MCF_UART_UOP1(minor) = 1; 439 } 440 441 return( 0 ); 442 } 443 444 381 static int IntUartInterruptOpen(int major, int minor, void *arg) 382 { 383 struct IntUartInfoStruct *info = &IntUartInfo[minor]; 384 385 /* enable the uart */ 386 MCF_UART_UCR(minor) = (MCF_UART_UCR_TX_ENABLED | MCF_UART_UCR_RX_ENABLED); 387 388 /* check to see if interrupts need to be enabled */ 389 if (info->iomode != TERMIOS_POLLED) { 390 /* enable rx interrupts */ 391 info->uimr |= MCF_UART_UIMR_RXRDY_FU; 392 MCF_UART_UIMR(minor) = info->uimr; 393 } 394 395 /* check to see if doing hardware flow control */ 396 if (info->hwflow) { 397 /* assert the RTS line */ 398 MCF_UART_UOP1(minor) = 1; 399 } 400 401 return (0); 402 } 445 403 446 404 /*************************************************************************** … … 449 407 Description : This disables interrupts when the tty is closed. 450 408 ***************************************************************************/ 451 static int 452 IntUartInterruptClose(int major, int minor, void *arg) 453 { 454 struct IntUartInfoStruct *info = &IntUartInfo[minor]; 455 456 /* disable the interrupts and the uart */ 457 MCF_UART_UIMR(minor) = 0; 458 MCF_UART_UCR(minor) = (MCF_UART_UCR_TX_DISABLED | MCF_UART_UCR_RX_DISABLED); 459 460 /* reset values */ 461 info->ttyp = NULL; 462 info->uimr = 0; 463 info->rx_in = 0; 464 info->rx_out = 0; 465 466 return( 0 ); 409 static int IntUartInterruptClose(int major, int minor, void *arg) 410 { 411 struct IntUartInfoStruct *info = &IntUartInfo[minor]; 412 413 /* disable the interrupts and the uart */ 414 MCF_UART_UIMR(minor) = 0; 415 MCF_UART_UCR(minor) = (MCF_UART_UCR_TX_DISABLED | MCF_UART_UCR_RX_DISABLED); 416 417 /* reset values */ 418 info->ttyp = NULL; 419 info->uimr = 0; 420 info->rx_in = 0; 421 info->rx_out = 0; 422 423 return (0); 467 424 } 468 425 … … 474 431 re-enabled after all data has been read. 475 432 ***************************************************************************/ 476 static int 477 IntUartTaskRead(int minor) 478 { 479 char buffer[RX_BUFFER_SIZE]; 480 int count; 481 int rx_in; 482 int index = 0; 483 struct IntUartInfoStruct *info = &IntUartInfo[minor]; 484 485 /* determine number of values to copy out */ 486 rx_in = info->rx_in; 487 if ( info->rx_out <= rx_in ) 488 { 489 count = rx_in - info->rx_out; 490 } 491 else 492 { 493 count = (RX_BUFFER_SIZE - info->rx_out) + rx_in; 494 } 495 496 /* copy data into local buffer from rx buffer */ 497 while ( ( index < count ) && ( index < RX_BUFFER_SIZE ) ) 498 { 499 /* copy data byte */ 500 buffer[index] = info->rx_buffer[info->rx_out]; 501 index++; 502 503 /* increment rx buffer values */ 504 info->rx_out++; 505 if ( info->rx_out >= RX_BUFFER_SIZE ) 506 { 507 info->rx_out = 0; 508 } 509 } 510 511 /* check to see if buffer is not empty */ 512 if ( count > 0 ) 513 { 514 /* set characters into termios buffer */ 515 rtems_termios_enqueue_raw_characters(info->ttyp, buffer, count); 516 } 517 518 return( EOF ); 519 } 520 521 433 static int IntUartTaskRead(int minor) 434 { 435 char buffer[RX_BUFFER_SIZE]; 436 int count; 437 int rx_in; 438 int index = 0; 439 struct IntUartInfoStruct *info = &IntUartInfo[minor]; 440 441 /* determine number of values to copy out */ 442 rx_in = info->rx_in; 443 if (info->rx_out <= rx_in) { 444 count = rx_in - info->rx_out; 445 } else { 446 count = (RX_BUFFER_SIZE - info->rx_out) + rx_in; 447 } 448 449 /* copy data into local buffer from rx buffer */ 450 while ((index < count) && (index < RX_BUFFER_SIZE)) { 451 /* copy data byte */ 452 buffer[index] = info->rx_buffer[info->rx_out]; 453 index++; 454 455 /* increment rx buffer values */ 456 info->rx_out++; 457 if (info->rx_out >= RX_BUFFER_SIZE) { 458 info->rx_out = 0; 459 } 460 } 461 462 /* check to see if buffer is not empty */ 463 if (count > 0) { 464 /* set characters into termios buffer */ 465 rtems_termios_enqueue_raw_characters(info->ttyp, buffer, count); 466 } 467 468 return (EOF); 469 } 522 470 523 471 /*************************************************************************** … … 527 475 to the caller without blocking if not character is waiting. 528 476 ***************************************************************************/ 529 static int 530 IntUartPollRead (int minor) 531 { 532 if ( (MCF_UART_USR(minor) & MCF_UART_USR_RXRDY) == 0 ) 533 return(-1); 534 535 return(MCF_UART_URB(minor)); 536 } 537 477 static int IntUartPollRead(int minor) 478 { 479 if ((MCF_UART_USR(minor) & MCF_UART_USR_RXRDY) == 0) 480 return (-1); 481 482 return (MCF_UART_URB(minor)); 483 } 538 484 539 485 /*************************************************************************** … … 544 490 transmitted. 545 491 ***************************************************************************/ 546 static int 547 IntUartPollWrite (int minor, const char *buf, int len) 548 { 549 /* loop over buffer */ 550 while ( len-- ) 551 { 552 /* block until we can transmit */ 553 while ( (MCF_UART_USR(minor) & MCF_UART_USR_TXRDY) == 0 ) 554 continue; 555 /* transmit data byte */ 556 MCF_UART_UTB(minor) = *buf++; 557 } 558 return(0); 559 } 560 492 static int IntUartPollWrite(int minor, const char *buf, int len) 493 { 494 /* loop over buffer */ 495 while (len--) { 496 /* block until we can transmit */ 497 while ((MCF_UART_USR(minor) & MCF_UART_USR_TXRDY) == 0) 498 continue; 499 /* transmit data byte */ 500 MCF_UART_UTB(minor) = *buf++; 501 } 502 return (0); 503 } 561 504 562 505 /*************************************************************************** … … 566 509 registering /dev/tty devices for each channel and the system /dev/console. 567 510 ***************************************************************************/ 568 rtems_device_driver console_initialize( 569 rtems_device_major_number major, 570 rtems_device_minor_number minor, 571 void *arg ) 572 { 573 rtems_status_code status; 574 575 576 /* Set up TERMIOS */ 577 rtems_termios_initialize (); 578 579 /* set io modes for the different channels and initialize device */ 580 IntUartInfo[minor].iomode = TERMIOS_IRQ_DRIVEN; 581 IntUartInitialize(); 582 583 /* Register the console port */ 584 status = rtems_io_register_name ("/dev/console", major, CONSOLE_PORT); 585 if ( status != RTEMS_SUCCESSFUL ) 586 { 587 rtems_fatal_error_occurred (status); 588 } 589 590 /* Register the other port */ 591 if ( CONSOLE_PORT != 0 ) 592 { 593 status = rtems_io_register_name ("/dev/tty00", major, 0); 594 if ( status != RTEMS_SUCCESSFUL ) 595 { 596 rtems_fatal_error_occurred (status); 597 } 598 } 599 if ( CONSOLE_PORT != 1 ) 600 { 601 status = rtems_io_register_name ("/dev/tty01", major, 1); 602 if ( status != RTEMS_SUCCESSFUL ) 603 { 604 rtems_fatal_error_occurred (status); 605 } 606 } 607 608 return(RTEMS_SUCCESSFUL); 511 rtems_device_driver console_initialize(rtems_device_major_number major, 512 rtems_device_minor_number minor, 513 void *arg) 514 { 515 rtems_status_code status; 516 517 /* Set up TERMIOS */ 518 rtems_termios_initialize(); 519 520 /* set io modes for the different channels and initialize device */ 521 IntUartInfo[minor].iomode = TERMIOS_IRQ_DRIVEN; 522 IntUartInitialize(); 523 524 /* Register the console port */ 525 status = rtems_io_register_name("/dev/console", major, CONSOLE_PORT); 526 if (status != RTEMS_SUCCESSFUL) { 527 rtems_fatal_error_occurred(status); 528 } 529 530 /* Register the other port */ 531 if (CONSOLE_PORT != 0) { 532 status = rtems_io_register_name("/dev/tty00", major, 0); 533 if (status != RTEMS_SUCCESSFUL) { 534 rtems_fatal_error_occurred(status); 535 } 536 } 537 if (CONSOLE_PORT != 1) { 538 status = rtems_io_register_name("/dev/tty01", major, 1); 539 if (status != RTEMS_SUCCESSFUL) { 540 rtems_fatal_error_occurred(status); 541 } 542 } 543 544 return (RTEMS_SUCCESSFUL); 609 545 } 610 546 … … 617 553 polled or not. 618 554 ***************************************************************************/ 619 rtems_device_driver console_open( 620 rtems_device_major_number major, 621 rtems_device_minor_number minor, 622 void * arg) 623 { 624 rtems_status_code status = RTEMS_INVALID_NUMBER; 625 rtems_libio_open_close_args_t *args = (rtems_libio_open_close_args_t *)arg; 626 struct IntUartInfoStruct *info; 627 628 static const rtems_termios_callbacks IntUartPollCallbacks = { 629 NULL, /* firstOpen */ 630 NULL, /* lastClose */ 631 IntUartPollRead, /* pollRead */ 632 IntUartPollWrite, /* write */ 633 IntUartSetAttributes, /* setAttributes */ 634 NULL, /* stopRemoteTx */ 635 NULL, /* startRemoteTx */ 636 TERMIOS_POLLED /* mode */ 637 }; 638 static const rtems_termios_callbacks IntUartIntrCallbacks = { 639 IntUartInterruptOpen, /* firstOpen */ 640 IntUartInterruptClose, /* lastClose */ 641 NULL, /* pollRead */ 642 IntUartInterruptWrite, /* write */ 643 IntUartSetAttributes, /* setAttributes */ 644 NULL, /* stopRemoteTx */ 645 NULL, /* startRemoteTx */ 646 TERMIOS_IRQ_DRIVEN /* mode */ 647 }; 648 649 static const rtems_termios_callbacks IntUartTaskCallbacks = { 650 IntUartInterruptOpen, /* firstOpen */ 651 IntUartInterruptClose, /* lastClose */ 652 IntUartTaskRead, /* pollRead */ 653 IntUartInterruptWrite, /* write */ 654 IntUartSetAttributes, /* setAttributes */ 655 NULL, /* stopRemoteTx */ 656 NULL, /* startRemoteTx */ 657 TERMIOS_TASK_DRIVEN /* mode */ 658 }; 659 660 /* open the port depending on the minor device number */ 661 if ( ( minor >= 0 ) && ( minor < MAX_UART_INFO ) ) 662 { 663 info = &IntUartInfo[minor]; 664 switch ( info->iomode ) 665 { 666 case TERMIOS_POLLED: 667 status = rtems_termios_open(major, minor, arg, &IntUartPollCallbacks); 668 break; 669 case TERMIOS_IRQ_DRIVEN: 670 status = rtems_termios_open(major, minor, arg, &IntUartIntrCallbacks); 671 info->ttyp = args->iop->data1; 672 break; 673 case TERMIOS_TASK_DRIVEN: 674 status = rtems_termios_open(major, minor, arg, &IntUartTaskCallbacks); 675 info->ttyp = args->iop->data1; 676 break; 677 } 678 } 679 680 if (status == RTEMS_SUCCESSFUL) 681 { 682 /* 683 * Reset the default baudrate. 684 */ 685 struct termios term; 686 if (tcgetattr (STDIN_FILENO, &term) >= 0) 687 { 688 term.c_cflag &= ~(CBAUD | CSIZE); 689 term.c_cflag |= CS8 | B19200; 690 tcsetattr (STDIN_FILENO, TCSANOW, &term); 691 } 692 } 693 694 return( status ); 555 rtems_device_driver console_open(rtems_device_major_number major, 556 rtems_device_minor_number minor, void *arg) 557 { 558 rtems_status_code status = RTEMS_INVALID_NUMBER; 559 rtems_libio_open_close_args_t *args = (rtems_libio_open_close_args_t *) arg; 560 struct IntUartInfoStruct *info; 561 562 static const rtems_termios_callbacks IntUartPollCallbacks = { 563 NULL, /* firstOpen */ 564 NULL, /* lastClose */ 565 IntUartPollRead, /* pollRead */ 566 IntUartPollWrite, /* write */ 567 IntUartSetAttributes, /* setAttributes */ 568 NULL, /* stopRemoteTx */ 569 NULL, /* startRemoteTx */ 570 TERMIOS_POLLED /* mode */ 571 }; 572 static const rtems_termios_callbacks IntUartIntrCallbacks = { 573 IntUartInterruptOpen, /* firstOpen */ 574 IntUartInterruptClose, /* lastClose */ 575 NULL, /* pollRead */ 576 IntUartInterruptWrite, /* write */ 577 IntUartSetAttributes, /* setAttributes */ 578 NULL, /* stopRemoteTx */ 579 NULL, /* startRemoteTx */ 580 TERMIOS_IRQ_DRIVEN /* mode */ 581 }; 582 583 static const rtems_termios_callbacks IntUartTaskCallbacks = { 584 IntUartInterruptOpen, /* firstOpen */ 585 IntUartInterruptClose, /* lastClose */ 586 IntUartTaskRead, /* pollRead */ 587 IntUartInterruptWrite, /* write */ 588 IntUartSetAttributes, /* setAttributes */ 589 NULL, /* stopRemoteTx */ 590 NULL, /* startRemoteTx */ 591 TERMIOS_TASK_DRIVEN /* mode */ 592 }; 593 594 /* open the port depending on the minor device number */ 595 if ((minor >= 0) && (minor < MAX_UART_INFO)) { 596 info = &IntUartInfo[minor]; 597 switch (info->iomode) { 598 case TERMIOS_POLLED: 599 status = rtems_termios_open(major, minor, arg, &IntUartPollCallbacks); 600 break; 601 case TERMIOS_IRQ_DRIVEN: 602 status = rtems_termios_open(major, minor, arg, &IntUartIntrCallbacks); 603 info->ttyp = args->iop->data1; 604 break; 605 case TERMIOS_TASK_DRIVEN: 606 status = rtems_termios_open(major, minor, arg, &IntUartTaskCallbacks); 607 info->ttyp = args->iop->data1; 608 break; 609 } 610 } 611 612 if (status == RTEMS_SUCCESSFUL) { 613 /* 614 * Reset the default baudrate. 615 */ 616 struct termios term; 617 618 if (tcgetattr(STDIN_FILENO, &term) >= 0) { 619 term.c_cflag &= ~(CBAUD | CSIZE); 620 term.c_cflag |= CS8 | B19200; 621 tcsetattr(STDIN_FILENO, TCSANOW, &term); 622 } 623 } 624 625 return (status); 695 626 } 696 627 … … 700 631 Description : This closes the device via termios 701 632 ***************************************************************************/ 702 rtems_device_driver console_close( 703 rtems_device_major_number major, 704 rtems_device_minor_number minor, 705 void * arg) 706 { 707 return(rtems_termios_close (arg)); 633 rtems_device_driver console_close(rtems_device_major_number major, 634 rtems_device_minor_number minor, void *arg) 635 { 636 return (rtems_termios_close(arg)); 708 637 } 709 638 … … 714 643 Description : Read from the device via termios 715 644 ***************************************************************************/ 716 rtems_device_driver console_read( 717 rtems_device_major_number major, 718 rtems_device_minor_number minor, 719 void * arg) 720 { 721 return(rtems_termios_read (arg)); 645 rtems_device_driver console_read(rtems_device_major_number major, 646 rtems_device_minor_number minor, void *arg) 647 { 648 return (rtems_termios_read(arg)); 722 649 } 723 650 … … 727 654 Description : Write to the device via termios 728 655 ***************************************************************************/ 729 rtems_device_driver console_write( 730 rtems_device_major_number major, 731 rtems_device_minor_number minor, 732 void * arg) 733 { 734 return(rtems_termios_write (arg)); 656 rtems_device_driver console_write(rtems_device_major_number major, 657 rtems_device_minor_number minor, void *arg) 658 { 659 return (rtems_termios_write(arg)); 735 660 } 736 661 … … 740 665 Description : Pass the IOCtl call to termios 741 666 ***************************************************************************/ 742 rtems_device_driver console_control( 743 rtems_device_major_number major, 744 rtems_device_minor_number minor, 745 void * arg) 746 { 747 return( rtems_termios_ioctl (arg) ); 667 rtems_device_driver console_control(rtems_device_major_number major, 668 rtems_device_minor_number minor, 669 void *arg) 670 { 671 return (rtems_termios_ioctl(arg)); 748 672 } 749 673 int DEBUG_OUTCHAR(int c) 750 674 { 751 if(c == '\n')752 753 754 675 if (c == '\n') 676 DEBUG_OUTCHAR('\r'); 677 _BSP_null_char(c); 678 return c; 755 679 } 756 680 void DEBUG_OUTSTR(const char *msg) 757 681 { 758 759 682 while (*msg) 683 DEBUG_OUTCHAR(*msg++); 760 684 } 761 685 void DEBUG_OUTNUM(int i) 762 686 { 763 int n; 764 static const char map[] = "0123456789ABCDEF"; 765 DEBUG_OUTCHAR(' '); 766 for (n = 28 ; n >= 0 ; n -= 4) 767 DEBUG_OUTCHAR(map[(i >> n) & 0xF]); 768 } 687 int n; 688 static const char map[] = "0123456789ABCDEF"; 689 690 DEBUG_OUTCHAR(' '); 691 for (n = 28; n >= 0; n -= 4) 692 DEBUG_OUTCHAR(map[(i >> n) & 0xF]); 693 } -
c/src/lib/libbsp/m68k/mcf52235/gdb-init
r8f25cec r9374e9b0 25 25 26 26 # Add -v and -d flags for bdm info 27 # Add -B flags to utilize hardware breakpoints when they are availiable 28 27 29 #target remote | m68k-bdm-gdbserver pipe /dev/bdmcf0 28 30 target remote | m68k-bdm-gdbserver pipe /dev/tblcf2 -B 31 #monitor set remote-debug 1 29 32 30 #monitor set remote-debug 131 33 monitor bdm-reset 32 34 … … 43 45 set *((char*) 0x40100074) = 0x0F 44 46 45 # Add the load when debugging from ram , should never happen with rtems47 # Add the load when debugging from ram which won't happen with rtems! 46 48 #load -
c/src/lib/libbsp/m68k/mcf52235/include/bsp.h
r8f25cec r9374e9b0 20 20 /***************************************************************************/ 21 21 /** Hardware data structure headers **/ 22 #include <mcf52235/mcf52235.h> /* internal MCF52235 modules */ 22 #include <mcf5223x/mcf5223x.h> 23 24 /* Declare base address of peripherals area */ 25 #define __IPSBAR ((vuint8 *) 0x40000000) 23 26 24 27 /***************************************************************************/ 25 28 /** Network driver configuration **/ 26 #if 027 struct rtems_bsdnet_ifconfig;28 extern int rtems_fec_driver_attach (struct rtems_bsdnet_ifconfig *config, int attaching );29 #define RTEMS_BSP_NETWORK_DRIVER_NAME "fs1"30 #define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_fec_driver_attach31 #endif32 29 33 30 /***************************************************************************/ … … 59 56 60 57 uint32_t bsp_get_CPU_clock_speed(void); 58 61 59 void bsp_cleanup(void); 60 62 61 m68k_isr_entry set_vector( 63 62 rtems_isr_entry handler, … … 70 69 * Highest-priority listed first 71 70 */ 72 #define FEC_IRQ_LEVEL 473 #define FEC_IRQ_RX_PRIORITY 774 #define FEC_IRQ_TX_PRIORITY 675 71 76 72 #define PIT3_IRQ_LEVEL 4 -
c/src/lib/libbsp/m68k/mcf52235/include/coverhd.h
r8f25cec r9374e9b0 41 41 #define CALLING_OVERHEAD_TASK_GET_NOTE 0 42 42 #define CALLING_OVERHEAD_TASK_SET_NOTE 0 43 #define CALLING_OVERHEAD_TASK_WAKE_WHEN 143 #define CALLING_OVERHEAD_TASK_WAKE_WHEN 0 44 44 #define CALLING_OVERHEAD_TASK_WAKE_AFTER 0 45 45 #define CALLING_OVERHEAD_INTERRUPT_CATCH 0 46 #define CALLING_OVERHEAD_CLOCK_GET 147 #define CALLING_OVERHEAD_CLOCK_SET 146 #define CALLING_OVERHEAD_CLOCK_GET 0 47 #define CALLING_OVERHEAD_CLOCK_SET 0 48 48 #define CALLING_OVERHEAD_CLOCK_TICK 0 49 49 … … 51 51 #define CALLING_OVERHEAD_TIMER_IDENT 0 52 52 #define CALLING_OVERHEAD_TIMER_DELETE 0 53 #define CALLING_OVERHEAD_TIMER_FIRE_AFTER 153 #define CALLING_OVERHEAD_TIMER_FIRE_AFTER 0 54 54 #define CALLING_OVERHEAD_TIMER_FIRE_WHEN 1 55 55 #define CALLING_OVERHEAD_TIMER_RESET 0 -
c/src/lib/libbsp/m68k/mcf52235/start/start.S
r8f25cec r9374e9b0 32 32 .long SYM(_uhoh) /* 03 Address Error */ 33 33 .long SYM(_uhoh) /* 04 Illegal Instruction */ 34 .long SYM(_uhoh) /* 05 Reserved*/34 .long SYM(_uhoh) /* 05 Divide by Zero */ 35 35 .long SYM(_uhoh) /* 06 Reserved */ 36 36 .long SYM(_uhoh) /* 07 Reserved */ … … 42 42 .long SYM(_uhoh) /* 13 Reserved */ 43 43 .long SYM(_uhoh) /* 14 Format Error */ 44 .long SYM(_uhoh) /* 15 Unitialized Int.*/44 .long SYM(_uhoh) /* 15 Reserved */ 45 45 .long SYM(_uhoh) /* 16 Reserved */ 46 46 .long SYM(_uhoh) /* 17 Reserved */ … … 52 52 .long SYM(_uhoh) /* 23 Reserved */ 53 53 .long SYM(_spuriousInterrupt) /* 24 Spurious Interrupt */ 54 .long SYM(_uhoh) /* 25 Autovector Level 1*/55 .long SYM(_uhoh) /* 26 Autovector Level 2*/56 .long SYM(_uhoh) /* 27 Autovector Level 3*/57 .long SYM(_uhoh) /* 28 Autovector Level 4*/58 .long SYM(_uhoh) /* 29 Autovector Level 5*/59 .long SYM(_uhoh) /* 30 Autovector Level 6*/60 .long SYM(_uhoh) /* 31 Autovector Level 7*/54 .long SYM(_uhoh) /* 25 Reserved */ 55 .long SYM(_uhoh) /* 26 Reserved */ 56 .long SYM(_uhoh) /* 27 Reserved */ 57 .long SYM(_uhoh) /* 28 Reserved */ 58 .long SYM(_uhoh) /* 29 Reserved */ 59 .long SYM(_uhoh) /* 30 Reserved */ 60 .long SYM(_uhoh) /* 31 Reserved */ 61 61 .long SYM(_uhoh) /* 32 TRAP #0 */ 62 62 .long SYM(_uhoh) /* 33 TRAP #1 */ … … 315 315 PUBLIC (_uhoh) 316 316 SYM(_uhoh): 317 /*318 link a6,#0319 lea -20(sp), sp320 movem.l d0-d2/a0-a1, (sp)321 pea.l 20(sp) | push exception frame address322 jsr mcf5xxx_exception_handler323 movem.l 4(sp), d0-d2/a0-a1324 lea 24(sp), sp325 unlk a6326 rte327 */328 317 nop | Leave spot for breakpoint 329 318 stop #0x2700 | Stop with interrupts disabled -
c/src/lib/libbsp/m68k/mcf52235/startup/bspclean.c
r8f25cec r9374e9b0 23 23 #include <rtems/bspIo.h> 24 24 25 void bsp_cleanup( void)25 void bsp_cleanup(void) 26 26 { 27 printk("\nRTEMS exited!\n"); 28 for ( ;; ) 29 { 30 asm volatile ( " nop " ); 31 asm volatile ( " nop " ); 32 } 33 27 printk("\nRTEMS exited!\n"); 28 for (;;) { 29 asm volatile (" nop "); 30 asm volatile (" nop "); 31 } 34 32 } -
c/src/lib/libbsp/m68k/mcf52235/startup/bspstart.c
r8f25cec r9374e9b0 55 55 * This routine does the bulk of the system initialisation. 56 56 */ 57 void bsp_start( void)57 void bsp_start(void) 58 58 { 59 59 } … … 61 61 uint32_t bsp_get_CPU_clock_speed(void) 62 62 { 63 63 return 60000000; 64 64 } -
c/src/lib/libbsp/m68k/mcf52235/startup/linkcmds
r8f25cec r9374e9b0 22 22 _FlashBase = DEFINED(_FlashBase) ? _FlashBase : 0x00000000; 23 23 24 __IPSBAR = DEFINED(__IPSBAR) ? __IPSBAR : 0x40000000;25 24 _VBR = 0x20000000; 26 25 … … 144 143 .bss : 145 144 { 146 _clear_start = .;145 PROVIDE (_clear_start = .); 147 146 *(.bss*) 148 147 *(COMMON) 149 148 . = ALIGN (16); 150 149 PROVIDE (_end = .); 150 PROVIDE (_clear_end = .); 151 } >sram 151 152 153 .stack : 154 { 152 155 /* 153 156 * Starting Stack … … 156 159 . = ALIGN (16); 157 160 PROVIDE(_StackInit = .); 158 159 _clear_end = .; 160 _WorkspaceBase = .; 161 PROVIDE(_WorkspaceBase = .); 161 162 } >sram 162 163 -
c/src/lib/libbsp/m68k/mcf52235/timer/timer.c
r8f25cec r9374e9b0 17 17 #include <bsp.h> 18 18 19 typedef volatile unsigned char vuint8; 20 typedef volatile unsigned short vuint16; 21 typedef volatile unsigned long vuint32;19 void Timer_initialize(void) 20 { 21 uint32_t preScaleDivisor = bsp_get_CPU_clock_speed() / 1000000; 22 22 23 /* Declare base address of peripherals area */ 24 #define __IPSBAR ((vuint8 *) 0x40000000) 25 26 void 27 Timer_initialize(void) 28 { 29 uint32_t preScaleDivisor = bsp_get_CPU_clock_speed() / 1000000; 30 MCF_DTIM3_DTMR = 0; 31 MCF_DTIM3_DTMR = MCF_DTIM_DTMR_PS(preScaleDivisor - 1) | 32 MCF_DTIM_DTMR_CLK_DIV1 | 33 MCF_DTIM_DTMR_RST; 23 MCF_DTIM3_DTMR = 0; 24 MCF_DTIM3_DTMR = MCF_DTIM_DTMR_PS(preScaleDivisor - 1) | 25 MCF_DTIM_DTMR_CLK_DIV1 | MCF_DTIM_DTMR_RST; 34 26 } 35 27 … … 37 29 * Return timer value in microsecond units 38 30 */ 39 int 40 Read_timer(void) 31 int Read_timer(void) 41 32 { 42 33 return MCF_DTIM3_DTCN; 43 34 } 44 35 … … 47 38 * in Timing Test Suite. 48 39 */ 49 rtems_status_code 50 Empty_function(void) 40 rtems_status_code Empty_function(void) 51 41 { 52 42 return RTEMS_SUCCESSFUL; 53 43 } 54 44 55 void 56 Set_find_average_overhead(rtems_boolean find_flag) 45 void Set_find_average_overhead(rtems_boolean find_flag) 57 46 { 58 47 }
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