Changeset 9099a85 in rtems
- Timestamp:
- 02/08/02 23:04:03 (22 years ago)
- Branches:
- 4.10, 4.11, 4.8, 4.9, 5, master
- Children:
- d88661c
- Parents:
- 14c2084
- Files:
-
- 7 edited
Legend:
- Unmodified
- Added
- Removed
-
c/src/exec/score/cpu/mips/ChangeLog
r14c2084 r9099a85 1 2002-02-08 Joel Sherrill <joel@OARcorp.com> 2 3 * iregdef.h, rtems/score/cpu.h: Reordered register in the 4 exception stack frame to better match gdb's expectations. 5 1 6 2001-02-05 Joel Sherrill <joel@OARcorp.com> 2 7 -
c/src/exec/score/cpu/mips/iregdef.h
r14c2084 r9099a85 149 149 150 150 /* 151 ** relative position of registers in save reg area151 ** relative position of registers in interrupt/exception frame 152 152 */ 153 153 #define R_R0 0 … … 183 183 #define R_R30 30 184 184 #define R_R31 31 185 #define R_F0 32 186 #define R_F1 33 187 #define R_F2 34 188 #define R_F3 35 189 #define R_F4 36 190 #define R_F5 37 191 #define R_F6 38 192 #define R_F7 39 193 #define R_F8 40 194 #define R_F9 41 195 #define R_F10 42 196 #define R_F11 43 197 #define R_F12 44 198 #define R_F13 45 199 #define R_F14 46 200 #define R_F15 47 201 #define R_F16 48 202 #define R_F17 49 203 #define R_F18 50 204 #define R_F19 51 205 #define R_F20 52 206 #define R_F21 53 207 #define R_F22 54 208 #define R_F23 55 209 #define R_F24 56 210 #define R_F25 57 211 #define R_F26 58 212 #define R_F27 59 213 #define R_F28 60 214 #define R_F29 61 215 #define R_F30 62 216 #define R_F31 63 217 #define NCLIENTREGS 64 218 #define R_EPC 64 219 #define R_MDHI 65 220 #define R_MDLO 66 221 #define R_SR 67 222 #define R_CAUSE 68 223 #define R_TLBHI 69 185 186 #define R_SR 32 187 #define R_MDLO 33 188 #define R_MDHI 34 189 #define R_BADVADDR 35 190 #define R_CAUSE 36 191 #define R_EPC 37 192 193 #define R_F0 38 194 #define R_F1 39 195 #define R_F2 40 196 #define R_F3 41 197 #define R_F4 42 198 #define R_F5 43 199 #define R_F6 44 200 #define R_F7 45 201 #define R_F8 46 202 #define R_F9 47 203 #define R_F10 48 204 #define R_F11 49 205 #define R_F12 50 206 #define R_F13 41 207 #define R_F14 42 208 #define R_F15 43 209 #define R_F16 44 210 #define R_F17 45 211 #define R_F18 56 212 #define R_F19 57 213 #define R_F20 58 214 #define R_F21 59 215 #define R_F22 60 216 #define R_F23 61 217 #define R_F24 62 218 #define R_F25 63 219 #define R_F26 64 220 #define R_F27 65 221 #define R_F28 66 222 #define R_F29 67 223 #define R_F30 68 224 #define R_F31 69 225 #define R_FCSR 70 226 #define R_FEIR 71 227 #define R_TLBHI 72 224 228 #if __mips == 1 225 #define R_TLBLO 7 0229 #define R_TLBLO 73 226 230 #endif 227 231 #if __mips == 3 228 #define R_TLBLO0 70 229 #endif 230 #define R_BADVADDR 71 231 #define R_INX 72 232 #define R_RAND 73 233 #define R_CTXT 74 234 #define R_EXCTYPE 75 235 #define R_MODE 76 236 #define R_PRID 77 237 #define R_FCSR 78 238 #define R_FEIR 79 232 #define R_TLBLO0 74 233 #endif 234 #define R_INX 74 235 #define R_RAND 75 236 #define R_CTXT 76 237 #define R_EXCTYPE 77 238 #define R_MODE 78 239 #define R_PRID 79 239 240 #if __mips == 1 240 241 #define NREGS 80 … … 255 256 #define R_TAGHI 92 256 257 #define R_ERRPC 93 257 #define R_XCTXT 94 /* Ketan added from SIM64bit */258 #define R_XCTXT 94 /* Ketan added from SIM64bit */ 258 259 259 260 #define NREGS 95 -
c/src/exec/score/cpu/mips/rtems/score/cpu.h
r14c2084 r9099a85 444 444 * processing routines so be careful when changing the format. 445 445 * 446 * NOTE: The comments with this structure and cpu_asm.S should be kep 446 * NOTE: The comments with this structure and cpu_asm.S should be kept 447 447 * in sync. When in doubt, look in the code to see if the 448 448 * registers you're interested in are actually treated as expected. 449 * The order of the first portion of this structure follows the 450 * order of registers expected by gdb. 449 451 */ 450 452 451 453 typedef struct 452 454 { 453 __MIPS_REGISTER_TYPE r0; /* r0 -- NOT FILLED IN */ 454 __MIPS_REGISTER_TYPE at; /* r1 -- saved always */ 455 __MIPS_REGISTER_TYPE v0; /* r2 -- saved always */ 456 __MIPS_REGISTER_TYPE v1; /* r3 -- saved always */ 457 __MIPS_REGISTER_TYPE a0; /* r4 -- saved always */ 458 __MIPS_REGISTER_TYPE a1; /* r5 -- saved always */ 459 __MIPS_REGISTER_TYPE a2; /* r6 -- saved always */ 460 __MIPS_REGISTER_TYPE a3; /* r7 -- saved always */ 461 __MIPS_REGISTER_TYPE t0; /* r8 -- saved always */ 462 __MIPS_REGISTER_TYPE t1; /* r9 -- saved always */ 463 __MIPS_REGISTER_TYPE t2; /* r10 -- saved always */ 464 __MIPS_REGISTER_TYPE t3; /* r11 -- saved always */ 465 __MIPS_REGISTER_TYPE t4; /* r12 -- saved always */ 466 __MIPS_REGISTER_TYPE t5; /* r13 -- saved always */ 467 __MIPS_REGISTER_TYPE t6; /* r14 -- saved always */ 468 __MIPS_REGISTER_TYPE t7; /* r15 -- saved always */ 469 __MIPS_REGISTER_TYPE s0; /* r16 -- saved on exceptions */ 470 __MIPS_REGISTER_TYPE s1; /* r17 -- saved on exceptions */ 471 __MIPS_REGISTER_TYPE s2; /* r18 -- saved on exceptions */ 472 __MIPS_REGISTER_TYPE s3; /* r19 -- saved on exceptions */ 473 __MIPS_REGISTER_TYPE s4; /* r20 -- saved on exceptions */ 474 __MIPS_REGISTER_TYPE s5; /* r21 -- saved on exceptions */ 475 __MIPS_REGISTER_TYPE s6; /* r22 -- saved on exceptions */ 476 __MIPS_REGISTER_TYPE s7; /* r23 -- saved on exceptions */ 477 __MIPS_REGISTER_TYPE t8; /* r24 -- saved always */ 478 __MIPS_REGISTER_TYPE t9; /* r25 -- saved always */ 479 __MIPS_REGISTER_TYPE k0; /* r26 -- NOT FILLED IN, kernel tmp reg */ 480 __MIPS_REGISTER_TYPE k1; /* r27 -- NOT FILLED IN, kernel tmp reg */ 481 __MIPS_REGISTER_TYPE gp; /* r28 -- saved always */ 482 __MIPS_REGISTER_TYPE sp; /* r29 -- saved on exceptions NOT RESTORED */ 483 __MIPS_REGISTER_TYPE fp; /* r30 -- saved always */ 484 __MIPS_REGISTER_TYPE ra; /* r31 -- saved always */ 485 __MIPS_FPU_REGISTER_TYPE f0; /* r32 -- saved if FP enabled */ 486 __MIPS_FPU_REGISTER_TYPE f1; /* r33 -- saved if FP enabled */ 487 __MIPS_FPU_REGISTER_TYPE f2; /* r34 -- saved if FP enabled */ 488 __MIPS_FPU_REGISTER_TYPE f3; /* r35 -- saved if FP enabled */ 489 __MIPS_FPU_REGISTER_TYPE f4; /* r36 -- saved if FP enabled */ 490 __MIPS_FPU_REGISTER_TYPE f5; /* r37 -- saved if FP enabled */ 491 __MIPS_FPU_REGISTER_TYPE f6; /* r38 -- saved if FP enabled */ 492 __MIPS_FPU_REGISTER_TYPE f7; /* r39 -- saved if FP enabled */ 493 __MIPS_FPU_REGISTER_TYPE f8; /* r40 -- saved if FP enabled */ 494 __MIPS_FPU_REGISTER_TYPE f9; /* r41 -- saved if FP enabled */ 495 __MIPS_FPU_REGISTER_TYPE f10; /* r42 -- saved if FP enabled */ 496 __MIPS_FPU_REGISTER_TYPE f11; /* r43 -- saved if FP enabled */ 497 __MIPS_FPU_REGISTER_TYPE f12; /* r44 -- saved if FP enabled */ 498 __MIPS_FPU_REGISTER_TYPE f13; /* r45 -- saved if FP enabled */ 499 __MIPS_FPU_REGISTER_TYPE f14; /* r46 -- saved if FP enabled */ 500 __MIPS_FPU_REGISTER_TYPE f15; /* r47 -- saved if FP enabled */ 501 __MIPS_FPU_REGISTER_TYPE f16; /* r48 -- saved if FP enabled */ 502 __MIPS_FPU_REGISTER_TYPE f17; /* r49 -- saved if FP enabled */ 503 __MIPS_FPU_REGISTER_TYPE f18; /* r50 -- saved if FP enabled */ 504 __MIPS_FPU_REGISTER_TYPE f19; /* r51 -- saved if FP enabled */ 505 __MIPS_FPU_REGISTER_TYPE f20; /* r52 -- saved if FP enabled */ 506 __MIPS_FPU_REGISTER_TYPE f21; /* r53 -- saved if FP enabled */ 507 __MIPS_FPU_REGISTER_TYPE f22; /* r54 -- saved if FP enabled */ 508 __MIPS_FPU_REGISTER_TYPE f23; /* r55 -- saved if FP enabled */ 509 __MIPS_FPU_REGISTER_TYPE f24; /* r56 -- saved if FP enabled */ 510 __MIPS_FPU_REGISTER_TYPE f25; /* r57 -- saved if FP enabled */ 511 __MIPS_FPU_REGISTER_TYPE f26; /* r58 -- saved if FP enabled */ 512 __MIPS_FPU_REGISTER_TYPE f27; /* r59 -- saved if FP enabled */ 513 __MIPS_FPU_REGISTER_TYPE f28; /* r60 -- saved if FP enabled */ 514 __MIPS_FPU_REGISTER_TYPE f29; /* r61 -- saved if FP enabled */ 515 __MIPS_FPU_REGISTER_TYPE f30; /* r62 -- saved if FP enabled */ 516 __MIPS_FPU_REGISTER_TYPE f31; /* r63 -- saved if FP enabled */ 517 __MIPS_REGISTER_TYPE epc; /* r64 -- saved always, read-only register */ 455 __MIPS_REGISTER_TYPE r0; /* 0 -- NOT FILLED IN */ 456 __MIPS_REGISTER_TYPE at; /* 1 -- saved always */ 457 __MIPS_REGISTER_TYPE v0; /* 2 -- saved always */ 458 __MIPS_REGISTER_TYPE v1; /* 3 -- saved always */ 459 __MIPS_REGISTER_TYPE a0; /* 4 -- saved always */ 460 __MIPS_REGISTER_TYPE a1; /* 5 -- saved always */ 461 __MIPS_REGISTER_TYPE a2; /* 6 -- saved always */ 462 __MIPS_REGISTER_TYPE a3; /* 7 -- saved always */ 463 __MIPS_REGISTER_TYPE t0; /* 8 -- saved always */ 464 __MIPS_REGISTER_TYPE t1; /* 9 -- saved always */ 465 __MIPS_REGISTER_TYPE t2; /* 10 -- saved always */ 466 __MIPS_REGISTER_TYPE t3; /* 11 -- saved always */ 467 __MIPS_REGISTER_TYPE t4; /* 12 -- saved always */ 468 __MIPS_REGISTER_TYPE t5; /* 13 -- saved always */ 469 __MIPS_REGISTER_TYPE t6; /* 14 -- saved always */ 470 __MIPS_REGISTER_TYPE t7; /* 15 -- saved always */ 471 __MIPS_REGISTER_TYPE s0; /* 16 -- saved on exceptions */ 472 __MIPS_REGISTER_TYPE s1; /* 17 -- saved on exceptions */ 473 __MIPS_REGISTER_TYPE s2; /* 18 -- saved on exceptions */ 474 __MIPS_REGISTER_TYPE s3; /* 19 -- saved on exceptions */ 475 __MIPS_REGISTER_TYPE s4; /* 20 -- saved on exceptions */ 476 __MIPS_REGISTER_TYPE s5; /* 21 -- saved on exceptions */ 477 __MIPS_REGISTER_TYPE s6; /* 22 -- saved on exceptions */ 478 __MIPS_REGISTER_TYPE s7; /* 23 -- saved on exceptions */ 479 __MIPS_REGISTER_TYPE t8; /* 24 -- saved always */ 480 __MIPS_REGISTER_TYPE t9; /* 25 -- saved always */ 481 __MIPS_REGISTER_TYPE k0; /* 26 -- NOT FILLED IN, kernel tmp reg */ 482 __MIPS_REGISTER_TYPE k1; /* 27 -- NOT FILLED IN, kernel tmp reg */ 483 __MIPS_REGISTER_TYPE gp; /* 28 -- saved always */ 484 __MIPS_REGISTER_TYPE sp; /* 29 -- saved on exceptions NOT RESTORED */ 485 __MIPS_REGISTER_TYPE fp; /* 30 -- saved always */ 486 __MIPS_REGISTER_TYPE ra; /* 31 -- saved always */ 487 __MIPS_REGISTER_TYPE c0_sr; /* 32 -- saved always, some bits are */ 488 /* manipulated per-thread */ 489 __MIPS_REGISTER_TYPE mdlo; /* 33 -- saved always */ 490 __MIPS_REGISTER_TYPE mdhi; /* 34 -- saved always */ 491 __MIPS_REGISTER_TYPE badvaddr; /* 35 -- saved on exceptions, read-only */ 492 __MIPS_REGISTER_TYPE cause; /* 36 -- saved on exceptions NOT restored */ 493 __MIPS_REGISTER_TYPE epc; /* 37 -- saved always, read-only register */ 518 494 /* but logically restored */ 519 __MIPS_REGISTER_TYPE mdhi; /* r65 -- saved always */ 520 __MIPS_REGISTER_TYPE mdlo; /* r66 -- saved always */ 521 __MIPS_REGISTER_TYPE sr; /* r67 -- saved always, some bits are */ 522 /* manipulated per-thread */ 523 __MIPS_REGISTER_TYPE cause; /* r68 -- saved on exceptions NOT restored */ 524 525 __MIPS_REGISTER_TYPE tlbhi; /* r69 - NOT FILLED IN, doesn't exist on */ 495 __MIPS_FPU_REGISTER_TYPE f0; /* 38 -- saved if FP enabled */ 496 __MIPS_FPU_REGISTER_TYPE f1; /* 39 -- saved if FP enabled */ 497 __MIPS_FPU_REGISTER_TYPE f2; /* 40 -- saved if FP enabled */ 498 __MIPS_FPU_REGISTER_TYPE f3; /* 41 -- saved if FP enabled */ 499 __MIPS_FPU_REGISTER_TYPE f4; /* 42 -- saved if FP enabled */ 500 __MIPS_FPU_REGISTER_TYPE f5; /* 43 -- saved if FP enabled */ 501 __MIPS_FPU_REGISTER_TYPE f6; /* 44 -- saved if FP enabled */ 502 __MIPS_FPU_REGISTER_TYPE f7; /* 45 -- saved if FP enabled */ 503 __MIPS_FPU_REGISTER_TYPE f8; /* 46 -- saved if FP enabled */ 504 __MIPS_FPU_REGISTER_TYPE f9; /* 47 -- saved if FP enabled */ 505 __MIPS_FPU_REGISTER_TYPE f10; /* 48 -- saved if FP enabled */ 506 __MIPS_FPU_REGISTER_TYPE f11; /* 49 -- saved if FP enabled */ 507 __MIPS_FPU_REGISTER_TYPE f12; /* 50 -- saved if FP enabled */ 508 __MIPS_FPU_REGISTER_TYPE f13; /* 51 -- saved if FP enabled */ 509 __MIPS_FPU_REGISTER_TYPE f14; /* 52 -- saved if FP enabled */ 510 __MIPS_FPU_REGISTER_TYPE f15; /* 53 -- saved if FP enabled */ 511 __MIPS_FPU_REGISTER_TYPE f16; /* 54 -- saved if FP enabled */ 512 __MIPS_FPU_REGISTER_TYPE f17; /* 55 -- saved if FP enabled */ 513 __MIPS_FPU_REGISTER_TYPE f18; /* 56 -- saved if FP enabled */ 514 __MIPS_FPU_REGISTER_TYPE f19; /* 57 -- saved if FP enabled */ 515 __MIPS_FPU_REGISTER_TYPE f20; /* 58 -- saved if FP enabled */ 516 __MIPS_FPU_REGISTER_TYPE f21; /* 59 -- saved if FP enabled */ 517 __MIPS_FPU_REGISTER_TYPE f22; /* 60 -- saved if FP enabled */ 518 __MIPS_FPU_REGISTER_TYPE f23; /* 61 -- saved if FP enabled */ 519 __MIPS_FPU_REGISTER_TYPE f24; /* 62 -- saved if FP enabled */ 520 __MIPS_FPU_REGISTER_TYPE f25; /* 63 -- saved if FP enabled */ 521 __MIPS_FPU_REGISTER_TYPE f26; /* 64 -- saved if FP enabled */ 522 __MIPS_FPU_REGISTER_TYPE f27; /* 65 -- saved if FP enabled */ 523 __MIPS_FPU_REGISTER_TYPE f28; /* 66 -- saved if FP enabled */ 524 __MIPS_FPU_REGISTER_TYPE f29; /* 67 -- saved if FP enabled */ 525 __MIPS_FPU_REGISTER_TYPE f30; /* 68 -- saved if FP enabled */ 526 __MIPS_FPU_REGISTER_TYPE f31; /* 69 -- saved if FP enabled */ 527 __MIPS_REGISTER_TYPE fcsr; /* 70 -- saved on exceptions */ 528 /* (oddly not documented on MGV) */ 529 __MIPS_REGISTER_TYPE feir; /* 71 -- saved on exceptions */ 530 /* (oddly not documented on MGV) */ 531 532 /* GDB does not seem to care about anything past this point */ 533 534 __MIPS_REGISTER_TYPE tlbhi; /* 72 - NOT FILLED IN, doesn't exist on */ 526 535 /* all MIPS CPUs (at least MGV) */ 527 536 #if __mips == 1 528 __MIPS_REGISTER_TYPE tlblo; /* r70- NOT FILLED IN, doesn't exist on */537 __MIPS_REGISTER_TYPE tlblo; /* 73 - NOT FILLED IN, doesn't exist on */ 529 538 /* all MIPS CPUs (at least MGV) */ 530 539 #endif 531 540 #if __mips == 3 532 __MIPS_REGISTER_TYPE tlblo0; /* r70- NOT FILLED IN, doesn't exist on */541 __MIPS_REGISTER_TYPE tlblo0; /* 73 - NOT FILLED IN, doesn't exist on */ 533 542 /* all MIPS CPUs (at least MGV) */ 534 543 #endif 535 544 536 __MIPS_REGISTER_TYPE badvaddr; /* r71 -- saved on exceptions, read-only */ 537 __MIPS_REGISTER_TYPE inx; /* r72 -- NOT FILLED IN, doesn't exist on */ 545 __MIPS_REGISTER_TYPE inx; /* 74 -- NOT FILLED IN, doesn't exist on */ 538 546 /* all MIPS CPUs (at least MGV) */ 539 __MIPS_REGISTER_TYPE rand; /* r73-- NOT FILLED IN, doesn't exist on */547 __MIPS_REGISTER_TYPE rand; /* 75 -- NOT FILLED IN, doesn't exist on */ 540 548 /* all MIPS CPUs (at least MGV) */ 541 __MIPS_REGISTER_TYPE ctxt; /* r74-- NOT FILLED IN, doesn't exist on */549 __MIPS_REGISTER_TYPE ctxt; /* 76 -- NOT FILLED IN, doesn't exist on */ 542 550 /* all MIPS CPUs (at least MGV) */ 543 __MIPS_REGISTER_TYPE exctype; /* r75 -- NOT FILLED IN (not enough info) */ 544 __MIPS_REGISTER_TYPE mode; /* r76 -- NOT FILLED IN (not enough info) */ 545 __MIPS_REGISTER_TYPE prid; /* r77 -- NOT FILLED IN (not need to do so) */ 546 __MIPS_REGISTER_TYPE fcsr; /* r78 -- saved on exceptions */ 547 /* (oddly not documented on MGV) */ 548 __MIPS_REGISTER_TYPE feir; /* r79 -- saved on exceptions */ 549 /* (oddly not documented on MGV) */ 551 __MIPS_REGISTER_TYPE exctype; /* 77 -- NOT FILLED IN (not enough info) */ 552 __MIPS_REGISTER_TYPE mode; /* 78 -- NOT FILLED IN (not enough info) */ 553 __MIPS_REGISTER_TYPE prid; /* 79 -- NOT FILLED IN (not need to do so) */ 550 554 /* end of __mips == 1 so NREGS == 80 */ 551 555 #if __mips == 3 552 __MIPS_REGISTER_TYPE tlblo1; /* r80 -- NOT FILLED IN */553 __MIPS_REGISTER_TYPE pagemask; /* r81 -- NOT FILLED IN */554 __MIPS_REGISTER_TYPE wired; /* r82 -- NOT FILLED IN */555 __MIPS_REGISTER_TYPE count; /* r83 -- NOT FILLED IN */556 __MIPS_REGISTER_TYPE compare; /* r84 -- NOT FILLED IN */557 __MIPS_REGISTER_TYPE config; /* r85 -- NOT FILLED IN */558 __MIPS_REGISTER_TYPE lladdr; /* r86 -- NOT FILLED IN */559 __MIPS_REGISTER_TYPE watchlo; /* r87 -- NOT FILLED IN */560 __MIPS_REGISTER_TYPE watchhi; /* r88 -- NOT FILLED IN */561 __MIPS_REGISTER_TYPE ecc; /* r89 -- NOT FILLED IN */562 __MIPS_REGISTER_TYPE cacheerr; /* r90 -- NOT FILLED IN */563 __MIPS_REGISTER_TYPE taglo; /* r91 -- NOT FILLED IN */564 __MIPS_REGISTER_TYPE taghi; /* r92 -- NOT FILLED IN */565 __MIPS_REGISTER_TYPE errpc; /* r93 -- NOT FILLED IN */566 __MIPS_REGISTER_TYPE xctxt; /* r94 -- NOT FILLED IN */567 /* end of __mips == 3 so NREGS == 9 4*/556 __MIPS_REGISTER_TYPE tlblo1; /* 80 -- NOT FILLED IN */ 557 __MIPS_REGISTER_TYPE pagemask; /* 81 -- NOT FILLED IN */ 558 __MIPS_REGISTER_TYPE wired; /* 82 -- NOT FILLED IN */ 559 __MIPS_REGISTER_TYPE count; /* 83 -- NOT FILLED IN */ 560 __MIPS_REGISTER_TYPE compare; /* 84 -- NOT FILLED IN */ 561 __MIPS_REGISTER_TYPE config; /* 85 -- NOT FILLED IN */ 562 __MIPS_REGISTER_TYPE lladdr; /* 86 -- NOT FILLED IN */ 563 __MIPS_REGISTER_TYPE watchlo; /* 87 -- NOT FILLED IN */ 564 __MIPS_REGISTER_TYPE watchhi; /* 88 -- NOT FILLED IN */ 565 __MIPS_REGISTER_TYPE ecc; /* 89 -- NOT FILLED IN */ 566 __MIPS_REGISTER_TYPE cacheerr; /* 90 -- NOT FILLED IN */ 567 __MIPS_REGISTER_TYPE taglo; /* 91 -- NOT FILLED IN */ 568 __MIPS_REGISTER_TYPE taghi; /* 92 -- NOT FILLED IN */ 569 __MIPS_REGISTER_TYPE errpc; /* 93 -- NOT FILLED IN */ 570 __MIPS_REGISTER_TYPE xctxt; /* 94 -- NOT FILLED IN */ 571 /* end of __mips == 3 so NREGS == 95 */ 568 572 #endif 569 573 -
cpukit/score/cpu/mips/ChangeLog
r14c2084 r9099a85 1 2002-02-08 Joel Sherrill <joel@OARcorp.com> 2 3 * iregdef.h, rtems/score/cpu.h: Reordered register in the 4 exception stack frame to better match gdb's expectations. 5 1 6 2001-02-05 Joel Sherrill <joel@OARcorp.com> 2 7 -
cpukit/score/cpu/mips/iregdef.h
r14c2084 r9099a85 149 149 150 150 /* 151 ** relative position of registers in save reg area151 ** relative position of registers in interrupt/exception frame 152 152 */ 153 153 #define R_R0 0 … … 183 183 #define R_R30 30 184 184 #define R_R31 31 185 #define R_F0 32 186 #define R_F1 33 187 #define R_F2 34 188 #define R_F3 35 189 #define R_F4 36 190 #define R_F5 37 191 #define R_F6 38 192 #define R_F7 39 193 #define R_F8 40 194 #define R_F9 41 195 #define R_F10 42 196 #define R_F11 43 197 #define R_F12 44 198 #define R_F13 45 199 #define R_F14 46 200 #define R_F15 47 201 #define R_F16 48 202 #define R_F17 49 203 #define R_F18 50 204 #define R_F19 51 205 #define R_F20 52 206 #define R_F21 53 207 #define R_F22 54 208 #define R_F23 55 209 #define R_F24 56 210 #define R_F25 57 211 #define R_F26 58 212 #define R_F27 59 213 #define R_F28 60 214 #define R_F29 61 215 #define R_F30 62 216 #define R_F31 63 217 #define NCLIENTREGS 64 218 #define R_EPC 64 219 #define R_MDHI 65 220 #define R_MDLO 66 221 #define R_SR 67 222 #define R_CAUSE 68 223 #define R_TLBHI 69 185 186 #define R_SR 32 187 #define R_MDLO 33 188 #define R_MDHI 34 189 #define R_BADVADDR 35 190 #define R_CAUSE 36 191 #define R_EPC 37 192 193 #define R_F0 38 194 #define R_F1 39 195 #define R_F2 40 196 #define R_F3 41 197 #define R_F4 42 198 #define R_F5 43 199 #define R_F6 44 200 #define R_F7 45 201 #define R_F8 46 202 #define R_F9 47 203 #define R_F10 48 204 #define R_F11 49 205 #define R_F12 50 206 #define R_F13 41 207 #define R_F14 42 208 #define R_F15 43 209 #define R_F16 44 210 #define R_F17 45 211 #define R_F18 56 212 #define R_F19 57 213 #define R_F20 58 214 #define R_F21 59 215 #define R_F22 60 216 #define R_F23 61 217 #define R_F24 62 218 #define R_F25 63 219 #define R_F26 64 220 #define R_F27 65 221 #define R_F28 66 222 #define R_F29 67 223 #define R_F30 68 224 #define R_F31 69 225 #define R_FCSR 70 226 #define R_FEIR 71 227 #define R_TLBHI 72 224 228 #if __mips == 1 225 #define R_TLBLO 7 0229 #define R_TLBLO 73 226 230 #endif 227 231 #if __mips == 3 228 #define R_TLBLO0 70 229 #endif 230 #define R_BADVADDR 71 231 #define R_INX 72 232 #define R_RAND 73 233 #define R_CTXT 74 234 #define R_EXCTYPE 75 235 #define R_MODE 76 236 #define R_PRID 77 237 #define R_FCSR 78 238 #define R_FEIR 79 232 #define R_TLBLO0 74 233 #endif 234 #define R_INX 74 235 #define R_RAND 75 236 #define R_CTXT 76 237 #define R_EXCTYPE 77 238 #define R_MODE 78 239 #define R_PRID 79 239 240 #if __mips == 1 240 241 #define NREGS 80 … … 255 256 #define R_TAGHI 92 256 257 #define R_ERRPC 93 257 #define R_XCTXT 94 /* Ketan added from SIM64bit */258 #define R_XCTXT 94 /* Ketan added from SIM64bit */ 258 259 259 260 #define NREGS 95 -
cpukit/score/cpu/mips/rtems/mips/iregdef.h
r14c2084 r9099a85 149 149 150 150 /* 151 ** relative position of registers in save reg area151 ** relative position of registers in interrupt/exception frame 152 152 */ 153 153 #define R_R0 0 … … 183 183 #define R_R30 30 184 184 #define R_R31 31 185 #define R_F0 32 186 #define R_F1 33 187 #define R_F2 34 188 #define R_F3 35 189 #define R_F4 36 190 #define R_F5 37 191 #define R_F6 38 192 #define R_F7 39 193 #define R_F8 40 194 #define R_F9 41 195 #define R_F10 42 196 #define R_F11 43 197 #define R_F12 44 198 #define R_F13 45 199 #define R_F14 46 200 #define R_F15 47 201 #define R_F16 48 202 #define R_F17 49 203 #define R_F18 50 204 #define R_F19 51 205 #define R_F20 52 206 #define R_F21 53 207 #define R_F22 54 208 #define R_F23 55 209 #define R_F24 56 210 #define R_F25 57 211 #define R_F26 58 212 #define R_F27 59 213 #define R_F28 60 214 #define R_F29 61 215 #define R_F30 62 216 #define R_F31 63 217 #define NCLIENTREGS 64 218 #define R_EPC 64 219 #define R_MDHI 65 220 #define R_MDLO 66 221 #define R_SR 67 222 #define R_CAUSE 68 223 #define R_TLBHI 69 185 186 #define R_SR 32 187 #define R_MDLO 33 188 #define R_MDHI 34 189 #define R_BADVADDR 35 190 #define R_CAUSE 36 191 #define R_EPC 37 192 193 #define R_F0 38 194 #define R_F1 39 195 #define R_F2 40 196 #define R_F3 41 197 #define R_F4 42 198 #define R_F5 43 199 #define R_F6 44 200 #define R_F7 45 201 #define R_F8 46 202 #define R_F9 47 203 #define R_F10 48 204 #define R_F11 49 205 #define R_F12 50 206 #define R_F13 41 207 #define R_F14 42 208 #define R_F15 43 209 #define R_F16 44 210 #define R_F17 45 211 #define R_F18 56 212 #define R_F19 57 213 #define R_F20 58 214 #define R_F21 59 215 #define R_F22 60 216 #define R_F23 61 217 #define R_F24 62 218 #define R_F25 63 219 #define R_F26 64 220 #define R_F27 65 221 #define R_F28 66 222 #define R_F29 67 223 #define R_F30 68 224 #define R_F31 69 225 #define R_FCSR 70 226 #define R_FEIR 71 227 #define R_TLBHI 72 224 228 #if __mips == 1 225 #define R_TLBLO 7 0229 #define R_TLBLO 73 226 230 #endif 227 231 #if __mips == 3 228 #define R_TLBLO0 70 229 #endif 230 #define R_BADVADDR 71 231 #define R_INX 72 232 #define R_RAND 73 233 #define R_CTXT 74 234 #define R_EXCTYPE 75 235 #define R_MODE 76 236 #define R_PRID 77 237 #define R_FCSR 78 238 #define R_FEIR 79 232 #define R_TLBLO0 74 233 #endif 234 #define R_INX 74 235 #define R_RAND 75 236 #define R_CTXT 76 237 #define R_EXCTYPE 77 238 #define R_MODE 78 239 #define R_PRID 79 239 240 #if __mips == 1 240 241 #define NREGS 80 … … 255 256 #define R_TAGHI 92 256 257 #define R_ERRPC 93 257 #define R_XCTXT 94 /* Ketan added from SIM64bit */258 #define R_XCTXT 94 /* Ketan added from SIM64bit */ 258 259 259 260 #define NREGS 95 -
cpukit/score/cpu/mips/rtems/score/cpu.h
r14c2084 r9099a85 444 444 * processing routines so be careful when changing the format. 445 445 * 446 * NOTE: The comments with this structure and cpu_asm.S should be kep 446 * NOTE: The comments with this structure and cpu_asm.S should be kept 447 447 * in sync. When in doubt, look in the code to see if the 448 448 * registers you're interested in are actually treated as expected. 449 * The order of the first portion of this structure follows the 450 * order of registers expected by gdb. 449 451 */ 450 452 451 453 typedef struct 452 454 { 453 __MIPS_REGISTER_TYPE r0; /* r0 -- NOT FILLED IN */ 454 __MIPS_REGISTER_TYPE at; /* r1 -- saved always */ 455 __MIPS_REGISTER_TYPE v0; /* r2 -- saved always */ 456 __MIPS_REGISTER_TYPE v1; /* r3 -- saved always */ 457 __MIPS_REGISTER_TYPE a0; /* r4 -- saved always */ 458 __MIPS_REGISTER_TYPE a1; /* r5 -- saved always */ 459 __MIPS_REGISTER_TYPE a2; /* r6 -- saved always */ 460 __MIPS_REGISTER_TYPE a3; /* r7 -- saved always */ 461 __MIPS_REGISTER_TYPE t0; /* r8 -- saved always */ 462 __MIPS_REGISTER_TYPE t1; /* r9 -- saved always */ 463 __MIPS_REGISTER_TYPE t2; /* r10 -- saved always */ 464 __MIPS_REGISTER_TYPE t3; /* r11 -- saved always */ 465 __MIPS_REGISTER_TYPE t4; /* r12 -- saved always */ 466 __MIPS_REGISTER_TYPE t5; /* r13 -- saved always */ 467 __MIPS_REGISTER_TYPE t6; /* r14 -- saved always */ 468 __MIPS_REGISTER_TYPE t7; /* r15 -- saved always */ 469 __MIPS_REGISTER_TYPE s0; /* r16 -- saved on exceptions */ 470 __MIPS_REGISTER_TYPE s1; /* r17 -- saved on exceptions */ 471 __MIPS_REGISTER_TYPE s2; /* r18 -- saved on exceptions */ 472 __MIPS_REGISTER_TYPE s3; /* r19 -- saved on exceptions */ 473 __MIPS_REGISTER_TYPE s4; /* r20 -- saved on exceptions */ 474 __MIPS_REGISTER_TYPE s5; /* r21 -- saved on exceptions */ 475 __MIPS_REGISTER_TYPE s6; /* r22 -- saved on exceptions */ 476 __MIPS_REGISTER_TYPE s7; /* r23 -- saved on exceptions */ 477 __MIPS_REGISTER_TYPE t8; /* r24 -- saved always */ 478 __MIPS_REGISTER_TYPE t9; /* r25 -- saved always */ 479 __MIPS_REGISTER_TYPE k0; /* r26 -- NOT FILLED IN, kernel tmp reg */ 480 __MIPS_REGISTER_TYPE k1; /* r27 -- NOT FILLED IN, kernel tmp reg */ 481 __MIPS_REGISTER_TYPE gp; /* r28 -- saved always */ 482 __MIPS_REGISTER_TYPE sp; /* r29 -- saved on exceptions NOT RESTORED */ 483 __MIPS_REGISTER_TYPE fp; /* r30 -- saved always */ 484 __MIPS_REGISTER_TYPE ra; /* r31 -- saved always */ 485 __MIPS_FPU_REGISTER_TYPE f0; /* r32 -- saved if FP enabled */ 486 __MIPS_FPU_REGISTER_TYPE f1; /* r33 -- saved if FP enabled */ 487 __MIPS_FPU_REGISTER_TYPE f2; /* r34 -- saved if FP enabled */ 488 __MIPS_FPU_REGISTER_TYPE f3; /* r35 -- saved if FP enabled */ 489 __MIPS_FPU_REGISTER_TYPE f4; /* r36 -- saved if FP enabled */ 490 __MIPS_FPU_REGISTER_TYPE f5; /* r37 -- saved if FP enabled */ 491 __MIPS_FPU_REGISTER_TYPE f6; /* r38 -- saved if FP enabled */ 492 __MIPS_FPU_REGISTER_TYPE f7; /* r39 -- saved if FP enabled */ 493 __MIPS_FPU_REGISTER_TYPE f8; /* r40 -- saved if FP enabled */ 494 __MIPS_FPU_REGISTER_TYPE f9; /* r41 -- saved if FP enabled */ 495 __MIPS_FPU_REGISTER_TYPE f10; /* r42 -- saved if FP enabled */ 496 __MIPS_FPU_REGISTER_TYPE f11; /* r43 -- saved if FP enabled */ 497 __MIPS_FPU_REGISTER_TYPE f12; /* r44 -- saved if FP enabled */ 498 __MIPS_FPU_REGISTER_TYPE f13; /* r45 -- saved if FP enabled */ 499 __MIPS_FPU_REGISTER_TYPE f14; /* r46 -- saved if FP enabled */ 500 __MIPS_FPU_REGISTER_TYPE f15; /* r47 -- saved if FP enabled */ 501 __MIPS_FPU_REGISTER_TYPE f16; /* r48 -- saved if FP enabled */ 502 __MIPS_FPU_REGISTER_TYPE f17; /* r49 -- saved if FP enabled */ 503 __MIPS_FPU_REGISTER_TYPE f18; /* r50 -- saved if FP enabled */ 504 __MIPS_FPU_REGISTER_TYPE f19; /* r51 -- saved if FP enabled */ 505 __MIPS_FPU_REGISTER_TYPE f20; /* r52 -- saved if FP enabled */ 506 __MIPS_FPU_REGISTER_TYPE f21; /* r53 -- saved if FP enabled */ 507 __MIPS_FPU_REGISTER_TYPE f22; /* r54 -- saved if FP enabled */ 508 __MIPS_FPU_REGISTER_TYPE f23; /* r55 -- saved if FP enabled */ 509 __MIPS_FPU_REGISTER_TYPE f24; /* r56 -- saved if FP enabled */ 510 __MIPS_FPU_REGISTER_TYPE f25; /* r57 -- saved if FP enabled */ 511 __MIPS_FPU_REGISTER_TYPE f26; /* r58 -- saved if FP enabled */ 512 __MIPS_FPU_REGISTER_TYPE f27; /* r59 -- saved if FP enabled */ 513 __MIPS_FPU_REGISTER_TYPE f28; /* r60 -- saved if FP enabled */ 514 __MIPS_FPU_REGISTER_TYPE f29; /* r61 -- saved if FP enabled */ 515 __MIPS_FPU_REGISTER_TYPE f30; /* r62 -- saved if FP enabled */ 516 __MIPS_FPU_REGISTER_TYPE f31; /* r63 -- saved if FP enabled */ 517 __MIPS_REGISTER_TYPE epc; /* r64 -- saved always, read-only register */ 455 __MIPS_REGISTER_TYPE r0; /* 0 -- NOT FILLED IN */ 456 __MIPS_REGISTER_TYPE at; /* 1 -- saved always */ 457 __MIPS_REGISTER_TYPE v0; /* 2 -- saved always */ 458 __MIPS_REGISTER_TYPE v1; /* 3 -- saved always */ 459 __MIPS_REGISTER_TYPE a0; /* 4 -- saved always */ 460 __MIPS_REGISTER_TYPE a1; /* 5 -- saved always */ 461 __MIPS_REGISTER_TYPE a2; /* 6 -- saved always */ 462 __MIPS_REGISTER_TYPE a3; /* 7 -- saved always */ 463 __MIPS_REGISTER_TYPE t0; /* 8 -- saved always */ 464 __MIPS_REGISTER_TYPE t1; /* 9 -- saved always */ 465 __MIPS_REGISTER_TYPE t2; /* 10 -- saved always */ 466 __MIPS_REGISTER_TYPE t3; /* 11 -- saved always */ 467 __MIPS_REGISTER_TYPE t4; /* 12 -- saved always */ 468 __MIPS_REGISTER_TYPE t5; /* 13 -- saved always */ 469 __MIPS_REGISTER_TYPE t6; /* 14 -- saved always */ 470 __MIPS_REGISTER_TYPE t7; /* 15 -- saved always */ 471 __MIPS_REGISTER_TYPE s0; /* 16 -- saved on exceptions */ 472 __MIPS_REGISTER_TYPE s1; /* 17 -- saved on exceptions */ 473 __MIPS_REGISTER_TYPE s2; /* 18 -- saved on exceptions */ 474 __MIPS_REGISTER_TYPE s3; /* 19 -- saved on exceptions */ 475 __MIPS_REGISTER_TYPE s4; /* 20 -- saved on exceptions */ 476 __MIPS_REGISTER_TYPE s5; /* 21 -- saved on exceptions */ 477 __MIPS_REGISTER_TYPE s6; /* 22 -- saved on exceptions */ 478 __MIPS_REGISTER_TYPE s7; /* 23 -- saved on exceptions */ 479 __MIPS_REGISTER_TYPE t8; /* 24 -- saved always */ 480 __MIPS_REGISTER_TYPE t9; /* 25 -- saved always */ 481 __MIPS_REGISTER_TYPE k0; /* 26 -- NOT FILLED IN, kernel tmp reg */ 482 __MIPS_REGISTER_TYPE k1; /* 27 -- NOT FILLED IN, kernel tmp reg */ 483 __MIPS_REGISTER_TYPE gp; /* 28 -- saved always */ 484 __MIPS_REGISTER_TYPE sp; /* 29 -- saved on exceptions NOT RESTORED */ 485 __MIPS_REGISTER_TYPE fp; /* 30 -- saved always */ 486 __MIPS_REGISTER_TYPE ra; /* 31 -- saved always */ 487 __MIPS_REGISTER_TYPE c0_sr; /* 32 -- saved always, some bits are */ 488 /* manipulated per-thread */ 489 __MIPS_REGISTER_TYPE mdlo; /* 33 -- saved always */ 490 __MIPS_REGISTER_TYPE mdhi; /* 34 -- saved always */ 491 __MIPS_REGISTER_TYPE badvaddr; /* 35 -- saved on exceptions, read-only */ 492 __MIPS_REGISTER_TYPE cause; /* 36 -- saved on exceptions NOT restored */ 493 __MIPS_REGISTER_TYPE epc; /* 37 -- saved always, read-only register */ 518 494 /* but logically restored */ 519 __MIPS_REGISTER_TYPE mdhi; /* r65 -- saved always */ 520 __MIPS_REGISTER_TYPE mdlo; /* r66 -- saved always */ 521 __MIPS_REGISTER_TYPE sr; /* r67 -- saved always, some bits are */ 522 /* manipulated per-thread */ 523 __MIPS_REGISTER_TYPE cause; /* r68 -- saved on exceptions NOT restored */ 524 525 __MIPS_REGISTER_TYPE tlbhi; /* r69 - NOT FILLED IN, doesn't exist on */ 495 __MIPS_FPU_REGISTER_TYPE f0; /* 38 -- saved if FP enabled */ 496 __MIPS_FPU_REGISTER_TYPE f1; /* 39 -- saved if FP enabled */ 497 __MIPS_FPU_REGISTER_TYPE f2; /* 40 -- saved if FP enabled */ 498 __MIPS_FPU_REGISTER_TYPE f3; /* 41 -- saved if FP enabled */ 499 __MIPS_FPU_REGISTER_TYPE f4; /* 42 -- saved if FP enabled */ 500 __MIPS_FPU_REGISTER_TYPE f5; /* 43 -- saved if FP enabled */ 501 __MIPS_FPU_REGISTER_TYPE f6; /* 44 -- saved if FP enabled */ 502 __MIPS_FPU_REGISTER_TYPE f7; /* 45 -- saved if FP enabled */ 503 __MIPS_FPU_REGISTER_TYPE f8; /* 46 -- saved if FP enabled */ 504 __MIPS_FPU_REGISTER_TYPE f9; /* 47 -- saved if FP enabled */ 505 __MIPS_FPU_REGISTER_TYPE f10; /* 48 -- saved if FP enabled */ 506 __MIPS_FPU_REGISTER_TYPE f11; /* 49 -- saved if FP enabled */ 507 __MIPS_FPU_REGISTER_TYPE f12; /* 50 -- saved if FP enabled */ 508 __MIPS_FPU_REGISTER_TYPE f13; /* 51 -- saved if FP enabled */ 509 __MIPS_FPU_REGISTER_TYPE f14; /* 52 -- saved if FP enabled */ 510 __MIPS_FPU_REGISTER_TYPE f15; /* 53 -- saved if FP enabled */ 511 __MIPS_FPU_REGISTER_TYPE f16; /* 54 -- saved if FP enabled */ 512 __MIPS_FPU_REGISTER_TYPE f17; /* 55 -- saved if FP enabled */ 513 __MIPS_FPU_REGISTER_TYPE f18; /* 56 -- saved if FP enabled */ 514 __MIPS_FPU_REGISTER_TYPE f19; /* 57 -- saved if FP enabled */ 515 __MIPS_FPU_REGISTER_TYPE f20; /* 58 -- saved if FP enabled */ 516 __MIPS_FPU_REGISTER_TYPE f21; /* 59 -- saved if FP enabled */ 517 __MIPS_FPU_REGISTER_TYPE f22; /* 60 -- saved if FP enabled */ 518 __MIPS_FPU_REGISTER_TYPE f23; /* 61 -- saved if FP enabled */ 519 __MIPS_FPU_REGISTER_TYPE f24; /* 62 -- saved if FP enabled */ 520 __MIPS_FPU_REGISTER_TYPE f25; /* 63 -- saved if FP enabled */ 521 __MIPS_FPU_REGISTER_TYPE f26; /* 64 -- saved if FP enabled */ 522 __MIPS_FPU_REGISTER_TYPE f27; /* 65 -- saved if FP enabled */ 523 __MIPS_FPU_REGISTER_TYPE f28; /* 66 -- saved if FP enabled */ 524 __MIPS_FPU_REGISTER_TYPE f29; /* 67 -- saved if FP enabled */ 525 __MIPS_FPU_REGISTER_TYPE f30; /* 68 -- saved if FP enabled */ 526 __MIPS_FPU_REGISTER_TYPE f31; /* 69 -- saved if FP enabled */ 527 __MIPS_REGISTER_TYPE fcsr; /* 70 -- saved on exceptions */ 528 /* (oddly not documented on MGV) */ 529 __MIPS_REGISTER_TYPE feir; /* 71 -- saved on exceptions */ 530 /* (oddly not documented on MGV) */ 531 532 /* GDB does not seem to care about anything past this point */ 533 534 __MIPS_REGISTER_TYPE tlbhi; /* 72 - NOT FILLED IN, doesn't exist on */ 526 535 /* all MIPS CPUs (at least MGV) */ 527 536 #if __mips == 1 528 __MIPS_REGISTER_TYPE tlblo; /* r70- NOT FILLED IN, doesn't exist on */537 __MIPS_REGISTER_TYPE tlblo; /* 73 - NOT FILLED IN, doesn't exist on */ 529 538 /* all MIPS CPUs (at least MGV) */ 530 539 #endif 531 540 #if __mips == 3 532 __MIPS_REGISTER_TYPE tlblo0; /* r70- NOT FILLED IN, doesn't exist on */541 __MIPS_REGISTER_TYPE tlblo0; /* 73 - NOT FILLED IN, doesn't exist on */ 533 542 /* all MIPS CPUs (at least MGV) */ 534 543 #endif 535 544 536 __MIPS_REGISTER_TYPE badvaddr; /* r71 -- saved on exceptions, read-only */ 537 __MIPS_REGISTER_TYPE inx; /* r72 -- NOT FILLED IN, doesn't exist on */ 545 __MIPS_REGISTER_TYPE inx; /* 74 -- NOT FILLED IN, doesn't exist on */ 538 546 /* all MIPS CPUs (at least MGV) */ 539 __MIPS_REGISTER_TYPE rand; /* r73-- NOT FILLED IN, doesn't exist on */547 __MIPS_REGISTER_TYPE rand; /* 75 -- NOT FILLED IN, doesn't exist on */ 540 548 /* all MIPS CPUs (at least MGV) */ 541 __MIPS_REGISTER_TYPE ctxt; /* r74-- NOT FILLED IN, doesn't exist on */549 __MIPS_REGISTER_TYPE ctxt; /* 76 -- NOT FILLED IN, doesn't exist on */ 542 550 /* all MIPS CPUs (at least MGV) */ 543 __MIPS_REGISTER_TYPE exctype; /* r75 -- NOT FILLED IN (not enough info) */ 544 __MIPS_REGISTER_TYPE mode; /* r76 -- NOT FILLED IN (not enough info) */ 545 __MIPS_REGISTER_TYPE prid; /* r77 -- NOT FILLED IN (not need to do so) */ 546 __MIPS_REGISTER_TYPE fcsr; /* r78 -- saved on exceptions */ 547 /* (oddly not documented on MGV) */ 548 __MIPS_REGISTER_TYPE feir; /* r79 -- saved on exceptions */ 549 /* (oddly not documented on MGV) */ 551 __MIPS_REGISTER_TYPE exctype; /* 77 -- NOT FILLED IN (not enough info) */ 552 __MIPS_REGISTER_TYPE mode; /* 78 -- NOT FILLED IN (not enough info) */ 553 __MIPS_REGISTER_TYPE prid; /* 79 -- NOT FILLED IN (not need to do so) */ 550 554 /* end of __mips == 1 so NREGS == 80 */ 551 555 #if __mips == 3 552 __MIPS_REGISTER_TYPE tlblo1; /* r80 -- NOT FILLED IN */553 __MIPS_REGISTER_TYPE pagemask; /* r81 -- NOT FILLED IN */554 __MIPS_REGISTER_TYPE wired; /* r82 -- NOT FILLED IN */555 __MIPS_REGISTER_TYPE count; /* r83 -- NOT FILLED IN */556 __MIPS_REGISTER_TYPE compare; /* r84 -- NOT FILLED IN */557 __MIPS_REGISTER_TYPE config; /* r85 -- NOT FILLED IN */558 __MIPS_REGISTER_TYPE lladdr; /* r86 -- NOT FILLED IN */559 __MIPS_REGISTER_TYPE watchlo; /* r87 -- NOT FILLED IN */560 __MIPS_REGISTER_TYPE watchhi; /* r88 -- NOT FILLED IN */561 __MIPS_REGISTER_TYPE ecc; /* r89 -- NOT FILLED IN */562 __MIPS_REGISTER_TYPE cacheerr; /* r90 -- NOT FILLED IN */563 __MIPS_REGISTER_TYPE taglo; /* r91 -- NOT FILLED IN */564 __MIPS_REGISTER_TYPE taghi; /* r92 -- NOT FILLED IN */565 __MIPS_REGISTER_TYPE errpc; /* r93 -- NOT FILLED IN */566 __MIPS_REGISTER_TYPE xctxt; /* r94 -- NOT FILLED IN */567 /* end of __mips == 3 so NREGS == 9 4*/556 __MIPS_REGISTER_TYPE tlblo1; /* 80 -- NOT FILLED IN */ 557 __MIPS_REGISTER_TYPE pagemask; /* 81 -- NOT FILLED IN */ 558 __MIPS_REGISTER_TYPE wired; /* 82 -- NOT FILLED IN */ 559 __MIPS_REGISTER_TYPE count; /* 83 -- NOT FILLED IN */ 560 __MIPS_REGISTER_TYPE compare; /* 84 -- NOT FILLED IN */ 561 __MIPS_REGISTER_TYPE config; /* 85 -- NOT FILLED IN */ 562 __MIPS_REGISTER_TYPE lladdr; /* 86 -- NOT FILLED IN */ 563 __MIPS_REGISTER_TYPE watchlo; /* 87 -- NOT FILLED IN */ 564 __MIPS_REGISTER_TYPE watchhi; /* 88 -- NOT FILLED IN */ 565 __MIPS_REGISTER_TYPE ecc; /* 89 -- NOT FILLED IN */ 566 __MIPS_REGISTER_TYPE cacheerr; /* 90 -- NOT FILLED IN */ 567 __MIPS_REGISTER_TYPE taglo; /* 91 -- NOT FILLED IN */ 568 __MIPS_REGISTER_TYPE taghi; /* 92 -- NOT FILLED IN */ 569 __MIPS_REGISTER_TYPE errpc; /* 93 -- NOT FILLED IN */ 570 __MIPS_REGISTER_TYPE xctxt; /* 94 -- NOT FILLED IN */ 571 /* end of __mips == 3 so NREGS == 95 */ 568 572 #endif 569 573
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