Ignore:
Timestamp:
Jun 12, 2000, 7:57:02 PM (20 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
41ab6966
Parents:
f481c39c
Message:

Patch from John Cotton <john.cotton@…>, Charles-Antoine Gauthier
<charles.gauthier@…>, and Darlene A. Stewart
<Darlene.Stewart@…> to add support for a number of very
significant things:

+ BSPs for many variations on the Motorola MBX8xx board series
+ Cache Manager including initial support for m68040

and PowerPC

+ Rework of mpc8xx libcpu code so all mpc8xx CPUs now use

same code base.

+ Rework of eth_comm BSP to utiltize above.

John reports this works on the 821 and 860

File:
1 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/m68k/mvme167/README

    rf481c39c r8ef3818  
    99Charles-Antoine Gauthier
    1010charles.gauthier@nrc.ca
     11
    1112or
    1213
    1314Darlene Stewart
    1415Darlene.Stewart@nrc.ca
    15 
     16 
    1617Software Engineering Group
    1718Institute for Information Technology
     
    2021Canada
    2122
    22 
    23 WARNING:
    24 --------
    25 
    26 The network driver is currently being worked on. It is somewhat functional,
    27 but it does run out of buffers under certain conditions. The code is
    28 also undergoing a substantial reorganization. Before making any changes,
    29 you should check with us for the availability of updates.
    30 
    31 Note from Joel:  The ttcp performance reported is very nice even if the
    32 driver is still early in its life. :)
    33 
    34  
    3523
    3624Disclaimer
     
    6856Port Description
    6957Console driver
    70 
    7158---------------
    7259
     
    148135
    149136
     137Configuration Parameters
     138
     139If Jumper J1-4 is installed, certain configuration parameters may be read from
     140the first 31 bytes of User Area NVRAM starting at 0xFFFC0000. In this case, the
     141user is responsible for writing the appropriate values to this memory location
     142(via 167Bug) in order to alter the default behaviour. A zero value results in
     143the default behaviour. The paramaters that are configurable and their default
     144settings are described below.
     145
     146        Data Cache Enable (0xFFFC0000 - 1 byte)
     147                write a non-zero value to this location to enable the data cache
     148                default: disabled
     149       
     150        Instruction Cache Activation (0xFFFC0001 - 1 byte)
     151                write a non-zero value to this location to enable the instruction cache
     152                default: disabled
     153               
     154        Cache Mode (0xFFFC0002 - 2 bytes)
     155                0xFFF0 = cachable, write-through
     156                0xFFF1 = cachable, copyback
     157                0xFFF2 = noncachable, serialized
     158                0xFFF3 = noncachable,
     159                default: cachable, copyback
     160
     161        IP Address (0xFFFC0004 - 4 bytes)
     162                write the hexidecimal representation of the board's IP address in this
     163                location for example, 192.168.1.2 = 0xC0A80102
     164                default: obtain the IP address from an rtems_bsdnet_ifconfig structure
     165
     166        Netmask (0xFFFC0008 - 4 bytes)
     167                write the hexidecimal representation of the netmask in this location
     168                for example, 255.255.255.0 = 0xFFFFFF00
     169                default: obtain the netmask from an rtems_bsdnet_ifconfig structure
     170               
     171        Ethernet Address (0xFFFC000C - 6 bytes)
     172                write the board's hardware address in this location
     173                default: obtain the hardware address from an rtems_bsdnet_ifconfig structure
     174
     175        Processor ID (0xFFFC0012 - 2 bytes)
     176                reserved for future use
     177               
     178        RMA start (0xFFFC0014 - 4 bytes)
     179                reserved for future use
     180               
     181        VMA start (0xFFFC0018 - 4 bytes)
     182                reserved for future use
     183               
     184        RamSize (0xFFFC001C - 4 bytes)
     185                reserved for future use
     186
     187
    150188Cache Control and Memory Mapping
     189
     190If configuration is not obtained from non-volatile RAM (ie. J1-4 is off),
     191cache control is done through the remaining J1 jumpers as follows:
    151192
    152193If Jumper J1-7 is installed, the data cache will be turned on. If Jumper
     
    501542    rtems_rate_monotonic_period: obtain status 13
    502543
    503 
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