Changeset 8eacefcc in rtems for c/src/lib/libbsp/c4x/c4xsim/README

Timestamp:

02/29/00 16:35:45 (23 years ago)

Author:

Joel Sherrill <joel.sherrill@…>

Branches:

4.10, 4.11, 4.8, 4.9, 5, master

Children:

b6f9b5f1

Parents:

6f645ff

Message:

BSP now compiles and links with CAVSL board information. This includes
linkcmds updated, simio references removed, and switch to libchip for
serial ports from simio.

Added a MEMORY_MAP file to capture information about the various
addresses on this board.

In addition, many of the beta patches are now included.

File:

• c/src/lib/libbsp/c4x/c4xsim/README (modified) (2 diffs)

c/src/lib/libbsp/c4x/c4xsim/README

@@ -6 +6 @@
 BOARD:              Simulator in GDB
 BUS:                N/A
-CPU FAMILY:         ppc
+CPU FAMILY:         C3X/C4X
 CPU:                C32 and others
 COPROCESSORS:       N/A
@@ -15 +15 @@
 PERIPHERALS
 ===========
-TIMERS:             PPC internal Timebase register
+TIMERS:             Internal Timer
   RESOLUTION:         ???
 SERIAL PORTS:       simulated via