Changeset 8e6cfcc in rtems for bsps/arm


Ignore:
Timestamp:
Aug 6, 2018, 8:29:14 AM (16 months ago)
Author:
Christian Mauderer <christian.mauderer@…>
Branches:
master
Children:
aac36d15
Parents:
71948f76
git-author:
Christian Mauderer <christian.mauderer@…> (08/06/18 08:29:14)
git-committer:
Christian Mauderer <christian.mauderer@…> (08/09/18 06:37:38)
Message:

bsp/atsam: Fix handling of slow SPI speeds.

This patch fixes an overflow in the frequency calculation of the SPI
driver for slow SPI speeds.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • bsps/arm/atsam/spi/atsam_spi_bus.c

    r71948f76 r8e6cfcc  
    8686}
    8787
     88static uint32_t atsam_calculate_scbr(uint32_t speed_hz)
     89{
     90  uint32_t scbr;
     91
     92  scbr = BOARD_MCK / speed_hz;
     93  if (scbr > 0x0FF) {
     94    /* Best estimation we can offer with the hardware. */
     95    scbr = 0x0FF;
     96  }
     97  if (scbr == 0) {
     98    /* SCBR = 0 isn't allowed. */
     99    scbr = 1;
     100  }
     101
     102  return scbr;
     103}
     104
    88105static void atsam_set_phase_and_polarity(uint32_t mode, uint32_t *csr)
    89106{
     
    110127{
    111128  uint8_t delay_cs;
     129  uint32_t scbr;
    112130  uint32_t csr = 0;
    113131  uint32_t mode = 0;
     
    115133
    116134  delay_cs = atsam_calculate_dlybcs(bus->base.delay_usecs);
     135  scbr = atsam_calculate_scbr(bus->base.speed_hz);
    117136
    118137  mode |= SPI_MR_DLYBCS(delay_cs);
     
    138157    SPI_DLYBCT(1000, BOARD_MCK) |
    139158    SPI_DLYBS(1000, BOARD_MCK) |
    140     SPI_SCBR(bus->base.speed_hz, BOARD_MCK) |
     159    SPI_CSR_SCBR(scbr) |
    141160    SPI_CSR_BITS(bus->base.bits_per_word - 8);
    142161
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