Changeset 8e6cfcc in rtems

Timestamp:

Aug 6, 2018, 8:29:14 AM (16 months ago)

Author:

Christian Mauderer <christian.mauderer@…>

Branches:

master

Children:

aac36d15

Parents:

71948f76

git-author:

Christian Mauderer <christian.mauderer@…> (08/06/18 08:29:14)

git-committer:

Christian Mauderer <christian.mauderer@…> (08/09/18 06:37:38)

Message:

bsp/atsam: Fix handling of slow SPI speeds.

This patch fixes an overflow in the frequency calculation of the SPI
driver for slow SPI speeds.

File:

• bsps/arm/atsam/spi/atsam_spi_bus.c (modified) (4 diffs)

bsps/arm/atsam/spi/atsam_spi_bus.c

@@ -86 +86 @@
 }
 
+static uint32_t atsam_calculate_scbr(uint32_t speed_hz)
+{
+  uint32_t scbr;
+
+  scbr = BOARD_MCK / speed_hz;
+  if (scbr > 0x0FF) {
+    /* Best estimation we can offer with the hardware. */
+    scbr = 0x0FF;
+  }
+  if (scbr == 0) {
+    /* SCBR = 0 isn't allowed. */
+    scbr = 1;
+  }
+
+  return scbr;
+}
+
 static void atsam_set_phase_and_polarity(uint32_t mode, uint32_t *csr)
 {
@@ -110 +127 @@
 {
   uint8_t delay_cs;
+  uint32_t scbr;
   uint32_t csr = 0;
   uint32_t mode = 0;
@@ -115 +133 @@
 
   delay_cs = atsam_calculate_dlybcs(bus->base.delay_usecs);
+  scbr = atsam_calculate_scbr(bus->base.speed_hz);
 
   mode |= SPI_MR_DLYBCS(delay_cs);
@@ -138 +157 @@
     SPI_DLYBCT(1000, BOARD_MCK) |
     SPI_DLYBS(1000, BOARD_MCK) |
-    SPI_SCBR(bus->base.speed_hz, BOARD_MCK) |
+    SPI_CSR_SCBR(scbr) |
     SPI_CSR_BITS(bus->base.bits_per_word - 8);