Changeset 8dacd03 in rtems

Timestamp:

06/14/00 19:56:07 (23 years ago)

Author:

Joel Sherrill <joel.sherrill@…>

Branches:

4.10, 4.11, 4.8, 4.9, 5, master

Children:

05352c24

Parents:

f585287

Message:

Conditionally do not assemble 403 code.

File:

• c/src/lib/libbsp/powerpc/psim/vectors/align_h.S (modified) (2 diffs)

c/src/lib/libbsp/powerpc/psim/vectors/align_h.S

@@ -122 +122 @@
         stw     r9,Open_cr(r1)
         stw     r10,Open_ctr(r1)
+#if defined(ppc403)
         mfspr   r7, srr2                /* SRR 2 */
         mfspr   r8, srr3                /* SRR 3 */
+#endif
         mfspr   r9, srr0                /* SRR 0 */
         mfspr   r10, srr1               /* SRR 1 */
+#if defined(ppc403)
         stw     r7,Open_srr2(r1)
         stw     r8,Open_srr3(r1)
+#endif
         stw     r9,Open_srr0(r1)
         stw     r10,Open_srr1(r1)
 
 /*      Set up common registers */
+#if defined(ppc403)
         mfspr   r5, dear                /* DEAR: R5 is data exception address */
+#endif
         lwz     r9,Open_srr0(r1)        /* get faulting instruction */
         addi    r7,r9,4                 /* bump instruction */
@@ -426 +432 @@
         mtctr   r26
         mtcrf   0xFF, r27
+#if defined(ppc403)
         mtspr   srr2, r28               /* SRR 2 */
         mtspr   srr3, r29               /* SRR 3 */
+#endif
         mtspr   srr0, r30               /* SRR 0 */
         mtspr   srr1, r31               /* SRR 1 */