Changeset 8cb4b08 in rtems


Ignore:
Timestamp:
Mar 5, 2009, 9:20:59 PM (11 years ago)
Author:
Till Straumann <strauman@…>
Branches:
4.9
Children:
c933a3d6
Parents:
dec63673
Message:

2009-03-05 Till Straumann <strauman@…>

  • startup/bspstart.c: removed legacy code (inherited from old mvme2307 BSP) -- for testing trapping into PPCBug -- which is irrelevant on this BSP. Removed warning about SPRG0 having been reassigned -- this BSP is OK.
Location:
c/src/lib/libbsp/powerpc/mvme3100
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/powerpc/mvme3100/ChangeLog

    rdec63673 r8cb4b08  
     12009-03-05      Till Straumann <strauman@slac.stanford.edu>
     2
     3        * startup/bspstart.c: removed legacy code (inherited
     4        from old mvme2307 BSP) -- for testing trapping into
     5        PPCBug -- which is irrelevant on this BSP.
     6        Removed warning about SPRG0 having been reassigned
     7        -- this BSP is OK.
     8
    192008-12-08      Ralf Corsépius <ralf.corsepius@rtems.org>
    210
  • c/src/lib/libbsp/powerpc/mvme3100/startup/bspstart.c

    rdec63673 r8cb4b08  
    5555    bsp_reset();
    5656}
    57 
    58 SPR_RW(SPRG1)
    5957
    6058/*
     
    396394#endif
    397395
    398 #ifdef TEST_RAW_EXCEPTION_CODE
    399         printk("Testing exception handling Part 1\n");
    400         /*
    401          * Cause a software exception
    402          */
    403         __asm__ __volatile ("sc");
    404         /*
    405          * Check we can still catch exceptions and return coorectly.
    406          */
    407         printk("Testing exception handling Part 2\n");
    408         __asm__ __volatile ("sc");
    409 
    410         /*
    411          * Somehow doing the above seems to clobber SPRG0 on the mvme2100.  The
    412          * interrupt disable mask is stored in SPRG0. Is this a problem?
    413          */
    414         ppc_interrupt_set_disable_mask( PPC_INTERRUPT_DISABLE_MASK_DEFAULT);
    415 
    416 #endif
    417 
    418 /* See above */
    419 #warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c).
    420 
    421396        if ( (chpt = strstr(BSP_commandline_string,"MEMSZ=")) ) {
    422397                char            *endp;
Note: See TracChangeset for help on using the changeset viewer.