Index: c/src/lib/libbsp/i386/shared/smp/smp-imps.c
===================================================================
--- c/src/lib/libbsp/i386/shared/smp/smp-imps.c	(revision 42eee51744e51029f1e3e677ce0b1abeade0fe81)
+++ c/src/lib/libbsp/i386/shared/smp/smp-imps.c	(revision 8cacceb7b9e789976c943339ab76317e8964b528)
@@ -200,4 +200,6 @@
 extern unsigned imps_lapic_addr;
 
+static void secondary_cpu_initialize(void);
+
 /*
  *  MPS checksum function
@@ -270,5 +272,5 @@
   );
 
-  reset[1] = (uint32_t)rtems_smp_secondary_cpu_initialize;
+  reset[1] = (uint32_t)secondary_cpu_initialize;
   reset[2] = (uint32_t)_Per_CPU_Information[apicid].interrupt_stack_high;
 
@@ -793,5 +795,5 @@
 
 /* pc386 specific initialization */
-void bsp_smp_secondary_cpu_initialize(int cpu)
+static void secondary_cpu_initialize(void)
 {
   int apicid;
@@ -805,4 +807,6 @@
   enable_sse();
 #endif
+
+  rtems_smp_secondary_cpu_initialize();
 }
 
Index: c/src/lib/libbsp/shared/smp/smp_stub.c
===================================================================
--- c/src/lib/libbsp/shared/smp/smp_stub.c	(revision 42eee51744e51029f1e3e677ce0b1abeade0fe81)
+++ c/src/lib/libbsp/shared/smp/smp_stub.c	(revision 8cacceb7b9e789976c943339ab76317e8964b528)
@@ -15,8 +15,4 @@
 #include <rtems/bspsmp.h>
 #include <stdlib.h>
-
-void bsp_smp_secondary_cpu_initialize(int cpu)
-{
-}
 
 uint32_t bsp_smp_initialize( uint32_t configured_cpu_count )
Index: c/src/lib/libbsp/sparc/leon3/smp/smp_leon3.c
===================================================================
--- c/src/lib/libbsp/sparc/leon3/smp/smp_leon3.c	(revision 42eee51744e51029f1e3e677ce0b1abeade0fe81)
+++ c/src/lib/libbsp/sparc/leon3/smp/smp_leon3.c	(revision 8cacceb7b9e789976c943339ab76317e8964b528)
@@ -42,9 +42,13 @@
 }
 
-void bsp_smp_secondary_cpu_initialize(int cpu)
+static void leon3_secondary_cpu_initialize(void)
 {
+  int cpu = bsp_smp_processor_id();
+
   sparc_leon3_set_cctrl( 0x80000F );
   LEON_Unmask_interrupt(LEON3_MP_IRQ);
   LEON3_IrqCtrl_Regs->mask[cpu] |= 1 << LEON3_MP_IRQ;
+
+  rtems_smp_secondary_cpu_initialize();
 }
 
@@ -90,5 +94,5 @@
     bsp_ap_stack = _Per_CPU_Information[cpu].interrupt_stack_high -
                       CPU_MINIMUM_STACK_FRAME_SIZE;
-    bsp_ap_entry = rtems_smp_secondary_cpu_initialize;
+    bsp_ap_entry = leon3_secondary_cpu_initialize;
 
     LEON3_IrqCtrl_Regs->mpstat = 1 << cpu;
Index: cpukit/score/include/rtems/bspsmp.h
===================================================================
--- cpukit/score/include/rtems/bspsmp.h	(revision 42eee51744e51029f1e3e677ce0b1abeade0fe81)
+++ cpukit/score/include/rtems/bspsmp.h	(revision 8cacceb7b9e789976c943339ab76317e8964b528)
@@ -120,23 +120,24 @@
 
 /**
- *  This method is invoked by @ref rtems_smp_secondary_cpu_initialize
- *  to allow the BSP to perform some intialization.  The @a cpu
- *  parameter indicates the secondary CPU that the code is executing on
- *  and is currently being initialized.
+ * @brief Performs high-level initialization of a secondary CPU and runs the
+ * application threads.
  *
- *  @note This is called by @ref rtems_smp_secondary_cpu_initialize.
+ * The low-level initialization code must call this function to hand over the
+ * control of this processor to RTEMS.  Interrupts must be disabled.  It must
+ * be possible to send inter-processor interrupts to this processor.  Since
+ * interrupts are disabled the inter-processor interrupt delivery is postponed
+ * until interrupts are enabled the first time.  This is usually a side-effect
+ * of the context switch to the first thread.
+ *
+ * The pre-requisites for the call to this function are
+ * - disabled interrupts,
+ * - reception of inter-processor interrupts is possible,
+ * - a valid stack pointer and enough stack space,
+ * - a valid code memory, and
+ * - a valid BSS section.
+ *
+ * This function must not be called by the main processor.
  */
-void bsp_smp_secondary_cpu_initialize(int cpu);
-
-/**
- *  @brief Initialize secondary CPU and coordinates.
- *
- *  This method is the C entry point which secondary CPUs should
- *  arrange to call.  It performs OS initialization for the secondary
- *  CPU and coordinates bring it to a useful state.
- *
- *  @note This is provided by RTEMS.
- */
-void rtems_smp_secondary_cpu_initialize(void);
+void rtems_smp_secondary_cpu_initialize( void );
 
 /**
Index: cpukit/score/src/smp.c
===================================================================
--- cpukit/score/src/smp.c	(revision 42eee51744e51029f1e3e677ce0b1abeade0fe81)
+++ cpukit/score/src/smp.c	(revision 8cacceb7b9e789976c943339ab76317e8964b528)
@@ -56,7 +56,4 @@
 
   cpu = bsp_smp_processor_id();
-
-  _ISR_Disable_on_this_core( level );
-  bsp_smp_secondary_cpu_initialize(cpu);
 
   /*
