Changeset 8cacceb in rtems
- Timestamp:
- May 14, 2013, 11:23:10 AM (8 years ago)
- Branches:
- 4.11, 5, master
- Children:
- 2f6108f9
- Parents:
- 42eee51
- git-author:
- Sebastian Huber <sebastian.huber@…> (05/14/13 11:23:10)
- git-committer:
- Sebastian Huber <sebastian.huber@…> (05/29/13 09:06:07)
- Files:
-
- 5 edited
Legend:
- Unmodified
- Added
- Removed
-
c/src/lib/libbsp/i386/shared/smp/smp-imps.c
r42eee51 r8cacceb 200 200 extern unsigned imps_lapic_addr; 201 201 202 static void secondary_cpu_initialize(void); 203 202 204 /* 203 205 * MPS checksum function … … 270 272 ); 271 273 272 reset[1] = (uint32_t) rtems_smp_secondary_cpu_initialize;274 reset[1] = (uint32_t)secondary_cpu_initialize; 273 275 reset[2] = (uint32_t)_Per_CPU_Information[apicid].interrupt_stack_high; 274 276 … … 793 795 794 796 /* pc386 specific initialization */ 795 void bsp_smp_secondary_cpu_initialize(int cpu)797 static void secondary_cpu_initialize(void) 796 798 { 797 799 int apicid; … … 805 807 enable_sse(); 806 808 #endif 809 810 rtems_smp_secondary_cpu_initialize(); 807 811 } 808 812 -
c/src/lib/libbsp/shared/smp/smp_stub.c
r42eee51 r8cacceb 15 15 #include <rtems/bspsmp.h> 16 16 #include <stdlib.h> 17 18 void bsp_smp_secondary_cpu_initialize(int cpu)19 {20 }21 17 22 18 uint32_t bsp_smp_initialize( uint32_t configured_cpu_count ) -
c/src/lib/libbsp/sparc/leon3/smp/smp_leon3.c
r42eee51 r8cacceb 42 42 } 43 43 44 void bsp_smp_secondary_cpu_initialize(int cpu)44 static void leon3_secondary_cpu_initialize(void) 45 45 { 46 int cpu = bsp_smp_processor_id(); 47 46 48 sparc_leon3_set_cctrl( 0x80000F ); 47 49 LEON_Unmask_interrupt(LEON3_MP_IRQ); 48 50 LEON3_IrqCtrl_Regs->mask[cpu] |= 1 << LEON3_MP_IRQ; 51 52 rtems_smp_secondary_cpu_initialize(); 49 53 } 50 54 … … 90 94 bsp_ap_stack = _Per_CPU_Information[cpu].interrupt_stack_high - 91 95 CPU_MINIMUM_STACK_FRAME_SIZE; 92 bsp_ap_entry = rtems_smp_secondary_cpu_initialize;96 bsp_ap_entry = leon3_secondary_cpu_initialize; 93 97 94 98 LEON3_IrqCtrl_Regs->mpstat = 1 << cpu; -
cpukit/score/include/rtems/bspsmp.h
r42eee51 r8cacceb 120 120 121 121 /** 122 * This method is invoked by @ref rtems_smp_secondary_cpu_initialize 123 * to allow the BSP to perform some intialization. The @a cpu 124 * parameter indicates the secondary CPU that the code is executing on 125 * and is currently being initialized. 122 * @brief Performs high-level initialization of a secondary CPU and runs the 123 * application threads. 126 124 * 127 * @note This is called by @ref rtems_smp_secondary_cpu_initialize. 125 * The low-level initialization code must call this function to hand over the 126 * control of this processor to RTEMS. Interrupts must be disabled. It must 127 * be possible to send inter-processor interrupts to this processor. Since 128 * interrupts are disabled the inter-processor interrupt delivery is postponed 129 * until interrupts are enabled the first time. This is usually a side-effect 130 * of the context switch to the first thread. 131 * 132 * The pre-requisites for the call to this function are 133 * - disabled interrupts, 134 * - reception of inter-processor interrupts is possible, 135 * - a valid stack pointer and enough stack space, 136 * - a valid code memory, and 137 * - a valid BSS section. 138 * 139 * This function must not be called by the main processor. 128 140 */ 129 void bsp_smp_secondary_cpu_initialize(int cpu); 130 131 /** 132 * @brief Initialize secondary CPU and coordinates. 133 * 134 * This method is the C entry point which secondary CPUs should 135 * arrange to call. It performs OS initialization for the secondary 136 * CPU and coordinates bring it to a useful state. 137 * 138 * @note This is provided by RTEMS. 139 */ 140 void rtems_smp_secondary_cpu_initialize(void); 141 void rtems_smp_secondary_cpu_initialize( void ); 141 142 142 143 /** -
cpukit/score/src/smp.c
r42eee51 r8cacceb 56 56 57 57 cpu = bsp_smp_processor_id(); 58 59 _ISR_Disable_on_this_core( level );60 bsp_smp_secondary_cpu_initialize(cpu);61 58 62 59 /*
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