Ignore:
Timestamp:
Jul 30, 2002, 11:20:19 PM (19 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
f511ae23
Parents:
fa237002
Message:

2002-07-30 Jay Monkman <jtm@…>

  • irq/irq_asm.S: ARM port works well enough to run all sptests, tmtests, and ttcp. In addition to general cleanup, there has been considerable optimization to interrupt disable/enable, endian swapping, and context switching.
File:
1 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/arm/shared/irq/irq_asm.S

    rfa237002 r8c408ed4  
    2424        .globl _ISR_Handler
    2525_ISR_Handler:
    26         stmdb   sp!, {r0, r1, r2, r3}   /* save regs on INT stack */
     26        stmdb   sp!, {r0, r1, r2, r3, r12}   /* save regs on INT stack */
    2727        stmdb   sp!, {lr}               /*    now safe to call C funcs */
    2828       
     
    4343        /* FIXME: I'm not sure why I can't save just r12. I'm also  */
    4444        /*     not sure which of r1-r3 are important.               */
    45         stmdb   sp!, {r0-r12}               
    4645        bl      ExecuteITHandler
    47         ldmia   sp!, {r0-r12}
    48        
     46
    4947/* one less nest level  */     
    5048        ldr     r0, =_ISR_Nest_level
     
    102100
    103101        /* replace lr with address of _ISR_Dispatch */
    104         ldr     lr, =_ISR_Dispatch
    105         add     lr, lr, #0x4              /* On entry to an ISR, the lr is */
     102        ldr     lr, =_ISR_Dispatch_p_4    /* On entry to an ISR, the lr is */
    106103                                          /*    the return address + 4, so */
    107104                                          /*    we have to emulate that    */
    108         ldmia   sp!, {r0}                 /* out with the old          */
     105        ldmia   sp!, {r1}                 /* out with the old          */
    109106        stmdb   sp!, {lr}                 /*    in with the new (lr) */
    110107
    111108       
    112         mrs     r0, spsr
    113109        orr     r0, r0, #0xc0
    114110        msr     spsr, r0
    115111                                       
    116112exitit:
    117         ldmia   sp!, {lr}                 /* restore regs from INT stack */
    118         ldmia   sp!, {r0, r1, r2, r3}     /* restore regs from INT stack */
     113        ldmia   sp!, {lr}                     /* restore regs from INT stack */
     114        ldmia   sp!, {r0, r1, r2, r3, r12}    /* restore regs from INT stack */
    119115        subs    pc, lr, #4                /* return */
    120116
     
    124120        .globl _ISR_Dispatch
    125121_ISR_Dispatch:
    126         stmdb   sp!, {r0-r12,lr}      /* save regs on SVC stack */
    127                                         /*    (now safe to call C funcs) */
    128                                         /*    we don't save lr, since  */
    129                                         /*    it's just going to get   */
    130                                         /*    overwritten              */
    131 
     122        stmdb   sp!, {r0-r3, r12,lr}      /* save regs on SVC stack */
     123                                          /*    (now safe to call C funcs) */
     124                                          /*    we don't save lr, since  */
     125                                          /*    it's just going to get   */
     126                                          /*    overwritten              */
     127_ISR_Dispatch_p_4:     
    132128        bl      _Thread_Dispatch
    133         ldmia   sp!, {r0-r12, lr}
     129        ldmia   sp!, {r0-r3, r12, lr}
    134130
    135131        stmdb   sp!, {r0-r2}
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