Changeset 8c408ed4 in rtems

Timestamp:

Jul 30, 2002, 11:20:19 PM (19 years ago)

Author:

Joel Sherrill <joel.sherrill@…>

Branches:

4.10, 4.11, 4.8, 4.9, 5, master

Children:

f511ae23

Parents:

fa237002

Message:

2002-07-30 Jay Monkman <jtm@…>

• irq/irq_asm.S: ARM port works well enough to run all sptests, tmtests, and ttcp. In addition to general cleanup, there has been considerable optimization to interrupt disable/enable, endian swapping, and context switching.

Location:

c/src/lib/libbsp/arm/shared

Files:

• ChangeLog (modified) (1 diff)
• irq/irq_asm.S (modified) (4 diffs)

c/src/lib/libbsp/arm/shared/ChangeLog

@@ +1 @@
+2002-07-30      Jay Monkman <jtm@smoothsmoothie.com>
+
+        * irq/irq_asm.S: ARM port works well enough to run all sptests,
+        tmtests, and ttcp.  In addition to general cleanup, there
+        has been considerable optimization to interrupt disable/enable,
+        endian swapping, and context switching.
+
 2002-07-17      Jay Monkman <jtm@smoothsmoothie.com>
 

c/src/lib/libbsp/arm/shared/irq/irq_asm.S

@@ -24 +24 @@
         .globl _ISR_Handler
 _ISR_Handler:
-        stmdb   sp!, {r0, r1, r2, r3}   /* save regs on INT stack */
+        stmdb   sp!, {r0, r1, r2, r3, r12}   /* save regs on INT stack */
         stmdb   sp!, {lr}               /*    now safe to call C funcs */
         
@@ -43 +43 @@
         /* FIXME: I'm not sure why I can't save just r12. I'm also  */
         /*     not sure which of r1-r3 are important.               */
-        stmdb   sp!, {r0-r12}                
         bl      ExecuteITHandler 
-        ldmia   sp!, {r0-r12}
-        
+
 /* one less nest level  */      
         ldr     r0, =_ISR_Nest_level
@@ -102 +100 @@
 
         /* replace lr with address of _ISR_Dispatch */
-        ldr     lr, =_ISR_Dispatch
-        add     lr, lr, #0x4              /* On entry to an ISR, the lr is */
+        ldr     lr, =_ISR_Dispatch_p_4    /* On entry to an ISR, the lr is */
                                           /*    the return address + 4, so */
                                           /*    we have to emulate that    */
-        ldmia   sp!, {r0}                 /* out with the old          */
+        ldmia   sp!, {r1}                 /* out with the old          */
         stmdb   sp!, {lr}                 /*    in with the new (lr) */
 
         
-        mrs     r0, spsr
         orr     r0, r0, #0xc0
         msr     spsr, r0
                                         
 exitit:
-        ldmia   sp!, {lr}                 /* restore regs from INT stack */
-        ldmia   sp!, {r0, r1, r2, r3}     /* restore regs from INT stack */
+        ldmia   sp!, {lr}                     /* restore regs from INT stack */
+        ldmia   sp!, {r0, r1, r2, r3, r12}    /* restore regs from INT stack */
         subs    pc, lr, #4                /* return */
 
@@ -124 +120 @@
         .globl _ISR_Dispatch
 _ISR_Dispatch:
-        stmdb   sp!, {r0-r12,lr}      /* save regs on SVC stack */
-                                        /*    (now safe to call C funcs) */
-                                        /*    we don't save lr, since  */
-                                        /*    it's just going to get   */
-                                        /*    overwritten              */
-
+        stmdb   sp!, {r0-r3, r12,lr}      /* save regs on SVC stack */
+                                          /*    (now safe to call C funcs) */
+                                          /*    we don't save lr, since  */
+                                          /*    it's just going to get   */
+                                          /*    overwritten              */
+_ISR_Dispatch_p_4:      
         bl      _Thread_Dispatch
-        ldmia   sp!, {r0-r12, lr}
+        ldmia   sp!, {r0-r3, r12, lr}
 
         stmdb   sp!, {r0-r2}