Ignore:
Timestamp:
Dec 21, 1999, 2:27:52 PM (22 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
db3e0108
Parents:
3ad7602e
Message:

Patch rtems-rc-19991203-5.diff from Ralf Corsepius <corsepiu@…>
which cleans up and merges some Hitachi SH-2 modifications from
John Mills <jmills@…>.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/sh/gensh2/startup/hw_init.c

    r3ad7602e r8b91282  
    11/*
    22 *  hw_init.c: set up sh7045F internal subunits
     3 *             Pin and memory assignments assume
     4 *             target is Hitachi SH7045F EVB ("lcevb")
    35 *
    46 *  Author: John M. Mills (jmills@tga.com)
     
    7072
    7173#ifdef STANDALONE_EVB
     74        /* FIXME: replace 'magic numbers' */
     75
    7276        write16(0x2020, BSC_BCR1);  /* Bus width access - 32-bit on CS1 */
    7377        write16(0xF3DD, BSC_BCR2);  /* Idle cycles CS3-CS0 - 0 idle cycles*/
     
    9094        write16(0x0005, PFC_PACRL2); /* Pin function controller - Tx0, Rx0 */
    9195
    92         /* SCI0 */
    93 /* FIXME: This doesn't belong here */
    94         write8(0x00, SCI_SCR0);     /* Clear SCR */
    95         write8(0x00, SCI_SMR0);     /* Clear SMR */
    96         write8(0x5F, SCI_BRR0);     /* Default 9600 baud rate */
    97 #if 0
    98         write8(0x1F, SCI_BRR0);    /* 28800 baud */
    99 #endif
    100 /* FIXME: Will get optimized away */
    101         for(a=0;a<00000L;a++);      /* One bit delay */
    102         write8(0x30, SCI_SCR0);     /* Enable clock output */
    103         temp8 = read8(SCI_RDR0);    /* Clear out old input */
    104 
     96        write16(0x00, PFC_PACRL2); /* default disconnects all I/O */
     97                                   /* pins; connected by DEVICE_open() */
    10598#endif
    10699
    107         /* default hardware setup */
     100        /* default hardware setup for SH7045F EVB */
    108101
    109102        /* PFC: General I/O except pin 13 (reset): */
     
    114107        write16(0x00, PFC_PECR2);
    115108
    116         /* P5 out, all other pins in: */
     109        /* P5 (LED) out, all other pins in: */
    117110        temp16 = read16(PFC_PEIOR) | 0x0020;
    118111        write16(temp16, PFC_PEIOR);
    119112
    120         /* PFC - pins for Tx0-1, Rx0-1: */
    121         temp16 = read16(PFC_PACRL2) | 0x0145;
    122         write16(temp16, PFC_PACRL2);
    123 
    124         /* SCI1 - Default RTEMS console */
    125 #if FIXME
    126         /* write8(0x00, SCI_SCR1);      /* Clear SCR */
    127         /* write8(0x00, SCI_SMR1);      /* Clear SMR */
    128         /* write8(0x5F, SCI_BRR1);      /* Default 9600 baud rate */
    129         /* write8(0x1F, SCI_BRR1);    /* 28800 baud */
    130 /* FIXME: Will get optimized away */
    131         /* for(a=0;a<10000L;a++);       /* One bit delay */
    132         /* write8(0x30, SCI_SCR1);      /* Enable clock output */
    133         /* temp8 = read8(SCI_RDR1);      /* Clear out old input */
    134 
    135         /* INTC setup */
    136         /* set_interrupt_mask(0);       /* enable interrupts */
    137         /* INTC_IPRF &= ~(SCI1_IPMSK);  /* set SIO1 priority at INTC */
    138         /* INTC_IPRF |= SCI1_LOWIP;     */
    139 #endif
    140113}
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