Changeset 8b077ca0 in rtems


Ignore:
Timestamp:
Aug 9, 2013, 9:12:56 AM (7 years ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
4.11, master
Children:
88f6c4fc
Parents:
849bb7a3
git-author:
Sebastian Huber <sebastian.huber@…> (08/09/13 09:12:56)
git-committer:
Sebastian Huber <sebastian.huber@…> (08/09/13 21:02:44)
Message:

bsps/sparc: SMP and per-CPU thread dispatch disable

Interrupt support for SMP and per-CPU thread dispatch disable level.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/sparc/shared/irq_asm.S

    r849bb7a3 r8b077ca0  
    2222#include <rtems/asm.h>
    2323#include <rtems/system.h>
     24#include <bspopts.h>
     25
     26.macro GET_SELF_CPU_CONTROL REG, TMP
     27        sethi    %hi(_Per_CPU_Information), \REG
     28        add      \REG, %lo(_Per_CPU_Information), \REG
     29
     30#if defined( RTEMS_SMP )
     31#if BSP_LEON3_SMP
     32        /* LEON3 SMP support */
     33        rd       %asr17, \TMP
     34        srl      \TMP, 28, \TMP /* CPU number is upper 4 bits so shift */
     35#else
     36        mov      0, \TMP
     37        nop
     38#endif
     39        sll      \TMP, PER_CPU_CONTROL_SIZE_LOG2, \TMP
     40        add      \REG, \TMP, \REG
     41#endif /* defined( RTEMS_SMP ) */
     42.endm
    2443
    2544/*
     
    175194         */
    176195
    177         sethi    %hi(SYM(_Thread_Dispatch_disable_level)), %l4
    178         ld       [%l4 + %lo(SYM(_Thread_Dispatch_disable_level))], %l6
    179 
    180         sethi    %hi(_Per_CPU_Information), %l5
    181         add      %l5, %lo(_Per_CPU_Information), %l5
    182 
     196        GET_SELF_CPU_CONTROL %l5, %l7
     197
     198        ld       [%l5 + PER_CPU_THREAD_DISPATCH_DISABLE_LEVEL], %l6
    183199        ld       [%l5 + PER_CPU_ISR_NEST_LEVEL], %l7
    184200
    185201        add      %l6, 1, %l6
    186         st       %l6, [%l4 + %lo(SYM(_Thread_Dispatch_disable_level))]
     202        st       %l6, [%l5 + PER_CPU_THREAD_DISPATCH_DISABLE_LEVEL]
    187203
    188204        add      %l7, 1, %l7
     
    335351         *
    336352         *    l4 = _Thread_Dispatch_disable_level pointer
    337          *    l5 = _ISR_Nest_level pointer
     353         *    l5 = per cpu info pointer
    338354         *    l6 = _Thread_Dispatch_disable_level value
    339355         *    l7 = _ISR_Nest_level value
     
    341357
    342358        sub      %l6, 1, %l6
    343         st       %l6, [%l4 + %lo(SYM(_Thread_Dispatch_disable_level))]
     359        st       %l6, [%l5 + PER_CPU_THREAD_DISPATCH_DISABLE_LEVEL]
    344360
    345361        st       %l7, [%l5 + PER_CPU_ISR_NEST_LEVEL]
     
    419435         */
    420436
    421         sethi    %hi(_Per_CPU_Information), %l5
    422         add      %l5, %lo(_Per_CPU_Information), %l5
     437        GET_SELF_CPU_CONTROL %l5, %l7
    423438
    424439        ldub     [%l5 + PER_CPU_DISPATCH_NEEDED], %l7
Note: See TracChangeset for help on using the changeset viewer.