Index: c/src/lib/libbsp/powerpc/psim/Makefile.in
===================================================================
--- c/src/lib/libbsp/powerpc/psim/Makefile.in	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
+++ c/src/lib/libbsp/powerpc/psim/Makefile.in	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
@@ -0,0 +1,26 @@
+#
+#  $Id$
+#
+
+@SET_MAKE@
+srcdir = @srcdir@
+VPATH = @srcdir@
+RTEMS_ROOT = @top_srcdir@
+PROJECT_ROOT = @PROJECT_ROOT@
+
+include $(RTEMS_ROOT)/make/custom/$(RTEMS_BSP).cfg
+include $(RTEMS_ROOT)/make/directory.cfg
+
+SRCS=README
+
+all: $(SRCS)
+
+# shmsupp augments shmdr -- the portable shared memory MPCI layer
+# We only build it if HAS_MP was defined
+MP_DRIVERS_yes_V = shmsupp
+MP_DRIVERS = $(MP_DRIVERS_$(HAS_MP)_V)
+
+# wrapup is the one that actually builds and installs the library
+#  from the individual .rel files built in other directories
+SUB_DIRS=include clock console startup startsim $(MP_DRIVERS) \
+    timer vectors wrapup tools
Index: c/src/lib/libbsp/powerpc/psim/README
===================================================================
--- c/src/lib/libbsp/powerpc/psim/README	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
+++ c/src/lib/libbsp/powerpc/psim/README	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
@@ -0,0 +1,52 @@
+#
+#  $Id$
+#
+
+BSP NAME:           psim
+BOARD:              PowerPC Simulator
+BUS:                N/A
+CPU FAMILY:         ppc
+CPU:                PowerPC 603, 603e, 604
+COPROCESSORS:       N/A
+MODE:               32 bit mode
+
+DEBUG MONITOR:      BUG mode (emulates Motorola debug monitor)
+
+PERIPHERALS
+===========
+TIMERS:             PPC internal Timebase register
+  RESOLUTION:         ???
+SERIAL PORTS:       simulated via bug
+REAL-TIME CLOCK:    PPC internal Decrementer register
+DMA:                none
+VIDEO:              none
+SCSI:               none
+NETWORKING:         none
+
+DRIVER INFORMATION
+==================
+CLOCK DRIVER:       PPC internal
+IOSUPP DRIVER:      N/A
+SHMSUPP:            N/A
+TIMER DRIVER:       PPC internal
+TTY DRIVER:         PPC internal
+
+STDIO
+=====
+PORT:               Console port 0
+ELECTRICAL:         na
+BAUD:               na
+BITS PER CHARACTER: na
+PARITY:             na
+STOP BITS:          na
+
+Notes
+=====
+
+Based on papyrus bsp which only really supports
+the PowerOpen ABI with an ELF assembler.
+
+For the multiprocessing tests to run, you must have a modified version of
+the PowerPC Simulator psim which supports an area of UNIX shared memory
+and UNIX semaphore mapped into the PowerPC address space.
+
Index: c/src/lib/libbsp/powerpc/psim/bsp_specs
===================================================================
--- c/src/lib/libbsp/powerpc/psim/bsp_specs	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
+++ c/src/lib/libbsp/powerpc/psim/bsp_specs	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
@@ -0,0 +1,23 @@
+%rename cpp old_cpp
+%rename lib old_lib
+%rename endfile old_endfile
+%rename startfile old_startfile
+%rename link old_link
+
+*cpp:
+%(old_cpp) %{qrtems: -D__embedded__} -Asystem(embedded)
+
+*lib:
+%{!qrtems: %(old_lib)} %{qrtems: ecrti%O%s --start-group \
+%{!qrtems_debug: -lrtemsall} %{qrtems_debug: -lrtemsall_g} \
+-lc -lgcc --end-group \
+%{!qnolinkcmds: -T linkcmds%s}}
+
+*startfile:
+%{!qrtems: %(old_startfile)} %{qrtems: startsim.o%s \
+%{!qrtems_debug: } \
+%{qrtems_debug: }}
+
+*link:
+%{!qrtems: %(old_link)} %{qrtems: -Qy -dp -Bstatic -T linkcmds%s -e _start -u __vectors}
+
Index: c/src/lib/libbsp/powerpc/psim/clock/Makefile.in
===================================================================
--- c/src/lib/libbsp/powerpc/psim/clock/Makefile.in	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
+++ c/src/lib/libbsp/powerpc/psim/clock/Makefile.in	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
@@ -0,0 +1,60 @@
+#
+#  $Id$
+#
+
+@SET_MAKE@
+srcdir = @srcdir@
+VPATH = @srcdir@
+RTEMS_ROOT = @top_srcdir@
+PROJECT_ROOT = @PROJECT_ROOT@
+
+PGM=${ARCH}/clock.rel
+
+# C source names, if any, go here -- minus the .c
+C_PIECES=clock
+C_FILES=$(C_PIECES:%=%.c)
+C_O_FILES=$(C_PIECES:%=${ARCH}/%.o)
+
+H_FILES=
+
+# Assembly source names, if any, go here -- minus the .s
+S_PIECES=
+S_FILES=$(S_PIECES:%=%.s)
+S_O_FILES=$(S_FILES:%.s=${ARCH}/%.o)
+
+SRCS=$(C_FILES) $(CC_FILES) $(H_FILES) $(S_FILES)
+OBJS=$(C_O_FILES) $(CC_O_FILES) $(S_O_FILES)
+
+include $(RTEMS_ROOT)/make/custom/$(RTEMS_BSP).cfg
+include $(RTEMS_ROOT)/make/leaf.cfg
+
+
+#
+# (OPTIONAL) Add local stuff here using +=
+#
+
+DEFINES  +=
+CPPFLAGS +=
+CFLAGS   +=
+
+LD_PATHS  +=
+LD_LIBS   +=
+LDFLAGS   +=
+
+#
+# Add your list of files to delete here.  The config files
+#  already know how to delete some stuff, so you may want
+#  to just run 'make clean' first to see what gets missed.
+#  'make clobber' already includes 'make clean'
+#
+
+CLEAN_ADDITIONS +=
+CLOBBER_ADDITIONS +=
+
+${PGM}: ${SRCS} ${OBJS}
+	$(make-rel)
+
+all:	${ARCH} $(SRCS) $(PGM)
+
+# the .rel file built here will be put into libbsp.a by ../wrapup/Makefile
+install:  all
Index: c/src/lib/libbsp/powerpc/psim/clock/clock.c
===================================================================
--- c/src/lib/libbsp/powerpc/psim/clock/clock.c	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
+++ c/src/lib/libbsp/powerpc/psim/clock/clock.c	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
@@ -0,0 +1,240 @@
+/*
+ *  Clock Tick Device Driver
+ *
+ *  This routine utilizes the Decrementer Register common to the PPC family.
+ *
+ *  The tick frequency is directly programmed to the configured number of
+ *  microseconds per tick.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994, 1997.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <stdlib.h>
+
+#include <bsp.h>
+#include <rtems/libio.h>
+
+/*
+ *  The Real Time Clock Counter Timer uses this trap type.
+ */
+
+#define CLOCK_VECTOR PPC_IRQ_DECREMENTER
+
+/*
+ *  Clock ticks since initialization
+ */
+
+volatile rtems_unsigned32 Clock_driver_ticks;
+
+/*
+ *  This is the value programmed into the count down timer.  It
+ *  is artificially lowered when PSIM_FAST_IDLE is defined to
+ *  cut down how long we spend in the idle task while executing on
+ *  the simulator.
+ */
+
+extern rtems_unsigned32 CPU_PPC_CLICKS_PER_TICK;
+
+rtems_isr_entry  Old_ticker;
+
+void Clock_exit( void );
+ 
+/*
+ * These are set by clock driver during its init
+ */
+ 
+rtems_device_major_number rtems_clock_major = ~0;
+rtems_device_minor_number rtems_clock_minor;
+
+/*
+ *  Clock_isr
+ *
+ *  This is the clock tick interrupt handler.
+ *
+ *  Input parameters:
+ *    vector - vector number
+ *
+ *  Output parameters:  NONE
+ *
+ *  Return values:      NONE
+ *
+ */
+
+#define PPC_Set_decrementer( _clicks ) \
+  do { \
+    asm volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \
+  } while (0)
+
+rtems_isr Clock_isr(
+  rtems_vector_number vector
+)
+{
+  /*
+   *  Whether or not we we are in "fast idle" mode, the value for clicks
+   *  per tick must be programmed.  If we are using "fast idle" mode for
+   *  a simulator, then the clicks per tick value is lowered to decrease
+   *  the amount of time spent executing the idle task while using the
+   *  an instruction simulator like psim.
+   */
+
+
+  PPC_Set_decrementer( CPU_PPC_CLICKS_PER_TICK );
+
+  /*
+   *  The driver has seen another tick.
+   */
+
+  Clock_driver_ticks += 1;
+
+  /*
+   *  Real Time Clock counter/timer is set to automatically reload.
+   */
+
+  rtems_clock_tick();
+}
+
+/*
+ *  Install_clock
+ *
+ *  This routine actually performs the hardware initialization for the clock.
+ *
+ *  Input parameters:
+ *    clock_isr - clock interrupt service routine entry point
+ *
+ *  Output parameters:  NONE
+ *
+ *  Return values:      NONE
+ *
+ */
+
+extern int CLOCK_SPEED;
+
+void Install_clock(
+  rtems_isr_entry clock_isr
+)
+{
+  Clock_driver_ticks = 0;
+
+  if ( BSP_Configuration.ticks_per_timeslice ) {
+    Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 );
+
+    PPC_Set_decrementer( CPU_PPC_CLICKS_PER_TICK );
+
+    atexit( Clock_exit );
+  }
+
+}
+
+/*
+ *  Clock_exit
+ *
+ *  This routine allows the clock driver to exit by masking the interrupt and
+ *  disabling the clock's counter.
+ *
+ *  Input parameters:   NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  Return values:      NONE
+ *
+ */
+
+void Clock_exit( void )
+{
+  if ( BSP_Configuration.ticks_per_timeslice ) {
+
+    /* nothing to do */; 
+
+    /* do not restore old vector */
+  }
+}
+ 
+/*
+ *  Clock_initialize
+ *
+ *  This routine initializes the clock driver.
+ *
+ *  Input parameters:
+ *    major - clock device major number
+ *    minor - clock device minor number
+ *    parg  - pointer to optional device driver arguments
+ *
+ *  Output parameters:  NONE
+ *
+ *  Return values:
+ *    rtems_device_driver status code
+ */
+
+rtems_device_driver Clock_initialize(
+  rtems_device_major_number major,
+  rtems_device_minor_number minor,
+  void *pargp
+)
+{
+  Install_clock( Clock_isr );
+ 
+  /*
+   * make major/minor avail to others such as shared memory driver
+   */
+ 
+  rtems_clock_major = major;
+  rtems_clock_minor = minor;
+ 
+  return RTEMS_SUCCESSFUL;
+}
+ 
+/*
+ *  Clock_control
+ *
+ *  This routine is the clock device driver control entry point.
+ *
+ *  Input parameters:
+ *    major - clock device major number
+ *    minor - clock device minor number
+ *    parg  - pointer to optional device driver arguments
+ *
+ *  Output parameters:  NONE
+ *
+ *  Return values:
+ *    rtems_device_driver status code
+ */
+
+rtems_device_driver Clock_control(
+  rtems_device_major_number major,
+  rtems_device_minor_number minor,
+  void *pargp
+)
+{
+    rtems_unsigned32 isrlevel;
+    rtems_libio_ioctl_args_t *args = pargp;
+ 
+    if (args == 0)
+        goto done;
+ 
+    /*
+     * This is hokey, but until we get a defined interface
+     * to do this, it will just be this simple...
+     */
+ 
+    if (args->command == rtems_build_name('I', 'S', 'R', ' '))
+    {
+        Clock_isr(CLOCK_VECTOR);
+    }
+    else if (args->command == rtems_build_name('N', 'E', 'W', ' '))
+    {
+      rtems_interrupt_disable( isrlevel );
+       (void) set_vector( args->buffer, CLOCK_VECTOR, 1 );
+      rtems_interrupt_enable( isrlevel );
+    }
+ 
+done:
+    return RTEMS_SUCCESSFUL;
+}
Index: c/src/lib/libbsp/powerpc/psim/console/Makefile.in
===================================================================
--- c/src/lib/libbsp/powerpc/psim/console/Makefile.in	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
+++ c/src/lib/libbsp/powerpc/psim/console/Makefile.in	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
@@ -0,0 +1,59 @@
+#
+#  $Id$
+#
+
+@SET_MAKE@
+srcdir = @srcdir@
+VPATH = @srcdir@
+RTEMS_ROOT = @top_srcdir@
+PROJECT_ROOT = @PROJECT_ROOT@
+
+PGM=${ARCH}/console.rel
+
+# C source names, if any, go here -- minus the .c
+C_PIECES=console
+C_FILES=$(C_PIECES:%=%.c)
+C_O_FILES=$(C_PIECES:%=${ARCH}/%.o)
+
+H_FILES=
+
+# Assembly source names, if any, go here -- minus the .s
+S_PIECES=consupp
+S_FILES=$(S_PIECES:%=%.s)
+S_O_FILES=$(S_FILES:%.s=${ARCH}/%.o)
+
+SRCS=$(C_FILES) $(CC_FILES) $(H_FILES) $(S_FILES)
+OBJS=$(C_O_FILES) $(CC_O_FILES) $(S_O_FILES)
+
+include $(RTEMS_ROOT)/make/custom/$(RTEMS_BSP).cfg
+include $(RTEMS_ROOT)/make/leaf.cfg
+
+#
+# (OPTIONAL) Add local stuff here using +=
+#
+
+DEFINES  +=
+CPPFLAGS +=
+CFLAGS   +=
+
+LD_PATHS  +=
+LD_LIBS   +=
+LDFLAGS   +=
+
+#
+# Add your list of files to delete here.  The config files
+#  already know how to delete some stuff, so you may want
+#  to just run 'make clean' first to see what gets missed.
+#  'make clobber' already includes 'make clean'
+#
+
+CLEAN_ADDITIONS +=
+CLOBBER_ADDITIONS +=
+
+${PGM}: ${SRCS} ${OBJS}
+	$(make-rel)
+
+all:	${ARCH} $(SRCS) $(PGM)
+
+# the .rel file built here will be put into libbsp.a by ../wrapup/Makefile
+install:  all
Index: c/src/lib/libbsp/powerpc/psim/console/console.c
===================================================================
--- c/src/lib/libbsp/powerpc/psim/console/console.c	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
+++ c/src/lib/libbsp/powerpc/psim/console/console.c	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
@@ -0,0 +1,184 @@
+/*
+ *  This file contains the hardware specific portions of the TTY driver
+ *  for the serial ports on the erc32.
+ *
+ *  COPYRIGHT (c) 1989-1997.
+ *  On-Line Applications Research Corporation (OAR).
+ *  Copyright assigned to U.S. Government, 1994.
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  $Id$
+ */
+
+#include <bsp.h>
+#include <rtems/libio.h>
+#include <stdlib.h>
+#include <assert.h>
+
+
+/*
+ *  console_outbyte_polled
+ *
+ *  This routine transmits a character using polling.
+ */
+
+void console_outbyte_polled(
+  int  port,
+  char ch
+)
+{
+  outbyte( ch );
+}
+
+/*
+ *  console_inbyte_nonblocking 
+ *
+ *  This routine polls for a character.
+ */
+
+int console_inbyte_nonblocking(
+  int port
+)
+{
+  char c;
+
+  c = inbyte();
+  if (!c)
+    return -1;
+  return c;
+}
+
+/*
+ *  DEBUG_puts
+ *
+ *  This should be safe in the event of an error.  It attempts to insure
+ *  that no TX empty interrupts occur while it is doing polled IO.  Then
+ *  it restores the state of that external interrupt.
+ *
+ *  Input parameters:
+ *    string  - pointer to debug output string
+ *
+ *  Output parameters:  NONE
+ *
+ *  Return values:      NONE
+ */
+
+void DEBUG_puts(
+  char *string
+)
+{
+  char *s;
+
+  /* XXX should disable interrupts around this if interrupt driven */
+
+  for ( s = string ; *s ; s++ ) 
+    console_outbyte_polled( 0, *s );
+
+  console_outbyte_polled( 0, '\r' );
+  console_outbyte_polled( 0, '\n' );
+}
+
+
+/*
+ *  Console Termios Support Entry Points
+ *
+ */
+
+int console_write_support (int minor, char *buf, int len)
+{
+  int nwrite = 0;
+
+  while (nwrite < len) {
+    console_outbyte_polled( minor, *buf++ );
+    nwrite++;
+  }
+  return nwrite;
+}
+
+/*
+ *  Console Device Driver Entry Points
+ *
+ */
+ 
+rtems_device_driver console_initialize(
+  rtems_device_major_number  major,
+  rtems_device_minor_number  minor,
+  void                      *arg
+)
+{
+  rtems_status_code status;
+
+  rtems_termios_initialize();
+
+  /*
+   *  Register Device Names
+   */
+
+  status = rtems_io_register_name( "/dev/console", major, 0 );
+  if (status != RTEMS_SUCCESSFUL)
+    rtems_fatal_error_occurred(status);
+
+  return RTEMS_SUCCESSFUL;
+}
+
+rtems_device_driver console_open(
+  rtems_device_major_number major,
+  rtems_device_minor_number minor,
+  void                    * arg
+)
+{
+        rtems_status_code sc;
+
+        assert( minor <= 1 );
+        if ( minor > 2 )
+          return RTEMS_INVALID_NUMBER;
+ 
+        sc = rtems_termios_open (major, minor, arg,
+                        NULL,
+                        NULL,
+                        console_inbyte_nonblocking,
+                        console_write_support,
+                        0);
+
+  return RTEMS_SUCCESSFUL;
+}
+ 
+rtems_device_driver console_close(
+  rtems_device_major_number major,
+  rtems_device_minor_number minor,
+  void                    * arg
+)
+{
+  return rtems_termios_close (arg);
+}
+ 
+rtems_device_driver console_read(
+  rtems_device_major_number major,
+  rtems_device_minor_number minor,
+  void                    * arg
+)
+{
+  return rtems_termios_read (arg);
+}
+ 
+rtems_device_driver console_write(
+  rtems_device_major_number major,
+  rtems_device_minor_number minor,
+  void                    * arg
+)
+{
+  return rtems_termios_write (arg);
+}
+ 
+rtems_device_driver console_control(
+  rtems_device_major_number major,
+  rtems_device_minor_number minor,
+  void                    * arg
+)
+{
+  return rtems_termios_ioctl (arg);
+}
+
Index: c/src/lib/libbsp/powerpc/psim/console/consupp.s
===================================================================
--- c/src/lib/libbsp/powerpc/psim/console/consupp.s	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
+++ c/src/lib/libbsp/powerpc/psim/console/consupp.s	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
@@ -0,0 +1,33 @@
+/*
+ * Adapted from the mvme-inbyte.S and mvme-outbyte.S files in libgloss.
+ * These should work on all targets using the ppcbug monitor.
+ *
+ * Copyright (c) 1995 Cygnus Support
+ *
+ * The authors hereby grant permission to use, copy, modify, distribute,
+ * and license this software and its documentation for any purpose, provided
+ * that existing copyright notices are retained in all copies and that this
+ * notice is included verbatim in any distributions. No written agreement,
+ * license, or royalty fee is required for any of the authorized uses.
+ * Modifications to this software may be copyrighted by their authors
+ * and need not follow the licensing terms described here, provided that
+ * the new terms are clearly indicated on the first page of each file where
+ * they apply.
+ */
+
+#include "ppc-asm.h"
+
+	.file	"support.s"
+	.text
+FUNC_START(outbyte)
+	li	r10,0x20
+	sc
+	blr
+FUNC_END(outbyte)
+
+	.text
+FUNC_START(inbyte)
+	li	r10,0x0
+	sc
+	blr
+FUNC_END(inbyte)
Index: c/src/lib/libbsp/powerpc/psim/include/Makefile.in
===================================================================
--- c/src/lib/libbsp/powerpc/psim/include/Makefile.in	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
+++ c/src/lib/libbsp/powerpc/psim/include/Makefile.in	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
@@ -0,0 +1,35 @@
+#
+#  $Id$
+#
+
+@SET_MAKE@
+srcdir = @srcdir@
+VPATH = @srcdir@
+RTEMS_ROOT = @top_srcdir@
+PROJECT_ROOT = @PROJECT_ROOT@
+
+H_FILES = $(srcdir)/bsp.h $(srcdir)/coverhd.h
+
+#
+#  Equate files are for including from assembly preprocessed by
+#  gm4 or gasp.  No examples are provided except for those for
+#  other CPUs.  The best way to generate them would be to
+#  provide a program which generates the constants used based
+#  on the C equivalents.
+#
+#  If you add equate files, don't forget to uncomment the install line
+#  below.
+#
+
+EQ_FILES =
+
+SRCS=$(H_FILES) $(EQ_FILES)
+
+include $(RTEMS_ROOT)/make/custom/$(RTEMS_BSP).cfg
+include $(RTEMS_ROOT)/make/leaf.cfg
+
+CLEAN_ADDITIONS +=
+CLOBBER_ADDITIONS +=
+
+all:	$(SRCS)
+	$(INSTALL) -m 444 $(H_FILES) $(PROJECT_INCLUDE)
Index: c/src/lib/libbsp/powerpc/psim/include/bsp.h
===================================================================
--- c/src/lib/libbsp/powerpc/psim/include/bsp.h	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
+++ c/src/lib/libbsp/powerpc/psim/include/bsp.h	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
@@ -0,0 +1,162 @@
+/*  bsp.h
+ *
+ *  This include file contains all Papyrus board IO definitions.
+ *
+ *  Author:	Andrew Bray <andy@i-cubed.co.uk>
+ *
+ *  COPYRIGHT (c) 1995 by i-cubed ltd.
+ *
+ *  To anyone who acknowledges that this file is provided "AS IS"
+ *  without any express or implied warranty:
+ *      permission to use, copy, modify, and distribute this file
+ *      for any purpose is hereby granted without fee, provided that
+ *      the above copyright notice and this notice appears in all
+ *      copies, and that the name of i-cubed limited not be used in
+ *      advertising or publicity pertaining to distribution of the
+ *      software without specific, written prior permission.
+ *      i-cubed limited makes no representations about the suitability
+ *      of this software for any purpose.
+ *
+ *  Derived from c/src/lib/libbsp/no_cpu/no_bsp/include/bsp.h
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#ifndef __PAPYRUS_h
+#define __PAPYRUS_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifdef ASM
+/* Definition of where to store registers in alignment handler */
+#define ALIGN_REGS 0x0140
+
+#else
+#include <rtems.h>
+#include <console.h>
+#include <clockdrv.h>
+#include <console.h>
+#include <iosupp.h>
+
+/*
+ *  Define the time limits for RTEMS Test Suite test durations.
+ *  Long test and short test duration limits are provided.  These
+ *  values are in seconds and need to be converted to ticks for the
+ *  application.
+ *
+ */
+
+#define MAX_LONG_TEST_DURATION       300 /* 5 minutes = 300 seconds */
+#define MAX_SHORT_TEST_DURATION      3   /* 3 seconds */
+
+
+/*
+ *  Stuff for Time Test 27
+ */
+
+#define MUST_WAIT_FOR_INTERRUPT 1
+
+#define Install_tm27_vector( _handler ) \
+  set_vector( (_handler), PPC_IRQ_DECREMENTER, 1 )
+
+#define Cause_tm27_intr()  \
+  do { \
+    unsigned32 _clicks = 1; \
+    asm volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \
+  } while (0)
+
+
+#define Clear_tm27_intr() \
+  do { \
+    unsigned32 _clicks = 0xffffffff; \
+    asm volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \
+  } while (0)
+
+#define Lower_tm27_intr() \
+  do { \
+    unsigned32 _msr = 0; \
+    _ISR_Set_level( 0 ); \
+    asm volatile( "mfmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \
+    _msr |=  0x8002; \
+    asm volatile( "mtmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \
+  } while (0)
+
+/* Constants */
+
+/*
+ *  Device Driver Table Entries
+ */
+ 
+/*
+ * NOTE: Use the standard Console driver entry
+ */
+ 
+/*
+ * NOTE: Use the standard Clock driver entry
+ */
+ 
+
+/*
+ *  Information placed in the linkcmds file.
+ */
+
+extern int   RAM_START;
+extern int   RAM_END;
+extern int   RAM_SIZE;
+
+extern int   PROM_START;
+extern int   PROM_END;
+extern int   PROM_SIZE;
+
+extern int   CLOCK_SPEED;
+
+extern int   end;        /* last address in the program */
+
+/*
+ * How many libio files we want
+ */
+ 
+#define BSP_LIBIO_MAX_FDS       20
+
+/* functions */
+
+void bsp_start( void );
+
+void bsp_cleanup( void );
+
+rtems_isr_entry set_vector(                    /* returns old vector */
+  rtems_isr_entry     handler,                  /* isr routine        */
+  rtems_vector_number vector,                   /* vector number      */
+  int                 type                      /* RTEMS or RAW intr  */
+);
+
+void DEBUG_puts( char *string );
+
+void BSP_fatal_return( void );
+
+void bsp_spurious_initialize( void );
+
+extern rtems_configuration_table BSP_Configuration;     /* owned by BSP */
+
+extern rtems_cpu_table           Cpu_table;             /* owned by BSP */
+
+extern rtems_unsigned32          bsp_isr_level;
+
+#endif /* ASM */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+/* end of include file */
Index: c/src/lib/libbsp/powerpc/psim/include/coverhd.h
===================================================================
--- c/src/lib/libbsp/powerpc/psim/include/coverhd.h	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
+++ c/src/lib/libbsp/powerpc/psim/include/coverhd.h	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
@@ -0,0 +1,135 @@
+/*  coverhd.h
+ *
+ *  This include file has defines to represent the overhead associated
+ *  with calling a particular directive from C.  These are used in the
+ *  Timing Test Suite to ignore the overhead required to pass arguments
+ *  to directives.  On some CPUs and/or target boards, this overhead
+ *  is significant and makes it difficult to distinguish internal
+ *  RTEMS execution time from that used to call the directive.
+ *  This file should be updated after running the C overhead timing
+ *  test.  Once this update has been performed, the RTEMS Time Test
+ *  Suite should be rebuilt to account for these overhead times in the
+ *  timing results.
+ *
+ *  NOTE:  If these are all zero, then the times reported include
+ *         all calling overhead including passing of arguments.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+/*
+ *  Updated for a 25MHz Papyrus by Andrew Bray <andy@i-cubed.co.uk>
+ *
+ *  Units are 100ns.
+ *
+ *  These numbers are of questionable use, as they are developed by calling
+ *  the routine many times, thus getting its entry veneer into the (small)
+ *  cache on the 403GA.  This in general is not true of the RTEMS timing
+ *  tests, which usually call a routine only once, thus having no cache loaded
+ *  advantage.
+ *
+ *  Whether the directive times are useful after deducting the function call
+ *  overhead is also questionable.  The user is more interested generally
+ *  in the total cost of a directive, not the cost if the procedure call
+ *  is inlined!  (In general this is not true).
+ *
+ *  Andrew Bray 18/08/1995
+ *
+ */
+
+#ifndef __COVERHD_h
+#define __COVERHD_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define CALLING_OVERHEAD_INITIALIZE_EXECUTIVE      1
+#define CALLING_OVERHEAD_SHUTDOWN_EXECUTIVE        1
+#define CALLING_OVERHEAD_TASK_CREATE               3
+#define CALLING_OVERHEAD_TASK_IDENT                1
+#define CALLING_OVERHEAD_TASK_START                1
+#define CALLING_OVERHEAD_TASK_RESTART              1
+#define CALLING_OVERHEAD_TASK_DELETE               1
+#define CALLING_OVERHEAD_TASK_SUSPEND              1
+#define CALLING_OVERHEAD_TASK_RESUME               1
+#define CALLING_OVERHEAD_TASK_SET_PRIORITY         1
+#define CALLING_OVERHEAD_TASK_MODE                 1
+#define CALLING_OVERHEAD_TASK_GET_NOTE             1
+#define CALLING_OVERHEAD_TASK_SET_NOTE             1
+#define CALLING_OVERHEAD_TASK_WAKE_WHEN            4
+#define CALLING_OVERHEAD_TASK_WAKE_AFTER           1
+#define CALLING_OVERHEAD_INTERRUPT_CATCH           1
+#define CALLING_OVERHEAD_CLOCK_GET                 4
+#define CALLING_OVERHEAD_CLOCK_SET                 3
+#define CALLING_OVERHEAD_CLOCK_TICK                1
+
+#define CALLING_OVERHEAD_TIMER_CREATE              1
+#define CALLING_OVERHEAD_TIMER_IDENT               1
+#define CALLING_OVERHEAD_TIMER_DELETE              1
+#define CALLING_OVERHEAD_TIMER_FIRE_AFTER          2
+#define CALLING_OVERHEAD_TIMER_FIRE_WHEN           5
+#define CALLING_OVERHEAD_TIMER_RESET               1
+#define CALLING_OVERHEAD_TIMER_CANCEL              1
+#define CALLING_OVERHEAD_SEMAPHORE_CREATE          2
+#define CALLING_OVERHEAD_SEMAPHORE_IDENT           1
+#define CALLING_OVERHEAD_SEMAPHORE_DELETE          1
+#define CALLING_OVERHEAD_SEMAPHORE_OBTAIN          1
+#define CALLING_OVERHEAD_SEMAPHORE_RELEASE         1
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_CREATE      2
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_IDENT       1
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_DELETE      1
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_SEND        1
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_URGENT      1
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_BROADCAST   1
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_RECEIVE     2
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_FLUSH       1
+
+#define CALLING_OVERHEAD_EVENT_SEND                1
+#define CALLING_OVERHEAD_EVENT_RECEIVE             2
+#define CALLING_OVERHEAD_SIGNAL_CATCH              1
+#define CALLING_OVERHEAD_SIGNAL_SEND               1
+#define CALLING_OVERHEAD_PARTITION_CREATE          3
+#define CALLING_OVERHEAD_PARTITION_IDENT           1
+#define CALLING_OVERHEAD_PARTITION_DELETE          1
+#define CALLING_OVERHEAD_PARTITION_GET_BUFFER      1
+#define CALLING_OVERHEAD_PARTITION_RETURN_BUFFER   1
+#define CALLING_OVERHEAD_REGION_CREATE             3
+#define CALLING_OVERHEAD_REGION_IDENT              1
+#define CALLING_OVERHEAD_REGION_DELETE             1
+#define CALLING_OVERHEAD_REGION_GET_SEGMENT        2
+#define CALLING_OVERHEAD_REGION_RETURN_SEGMENT     1
+#define CALLING_OVERHEAD_PORT_CREATE               2
+#define CALLING_OVERHEAD_PORT_IDENT                1
+#define CALLING_OVERHEAD_PORT_DELETE               1
+#define CALLING_OVERHEAD_PORT_EXTERNAL_TO_INTERNAL 1
+#define CALLING_OVERHEAD_PORT_INTERNAL_TO_EXTERNAL 2
+
+#define CALLING_OVERHEAD_IO_INITIALIZE             2
+#define CALLING_OVERHEAD_IO_OPEN                   2
+#define CALLING_OVERHEAD_IO_CLOSE                  2
+#define CALLING_OVERHEAD_IO_READ                   2
+#define CALLING_OVERHEAD_IO_WRITE                  2
+#define CALLING_OVERHEAD_IO_CONTROL                2
+#define CALLING_OVERHEAD_FATAL_ERROR_OCCURRED      1
+#define CALLING_OVERHEAD_RATE_MONOTONIC_CREATE     1
+#define CALLING_OVERHEAD_RATE_MONOTONIC_IDENT      1
+#define CALLING_OVERHEAD_RATE_MONOTONIC_DELETE     1
+#define CALLING_OVERHEAD_RATE_MONOTONIC_CANCEL     1
+#define CALLING_OVERHEAD_RATE_MONOTONIC_PERIOD     1
+#define CALLING_OVERHEAD_MULTIPROCESSING_ANNOUNCE  1
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+/* end of include file */
Index: c/src/lib/libbsp/powerpc/psim/shmsupp/Makefile.in
===================================================================
--- c/src/lib/libbsp/powerpc/psim/shmsupp/Makefile.in	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
+++ c/src/lib/libbsp/powerpc/psim/shmsupp/Makefile.in	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
@@ -0,0 +1,55 @@
+#
+#  $Id$
+#
+
+@SET_MAKE@
+srcdir = @srcdir@
+VPATH = @srcdir@
+RTEMS_ROOT = @top_srcdir@
+PROJECT_ROOT = @PROJECT_ROOT@
+
+PGM=${ARCH}/shmsupp.rel
+
+# C source names, if any, go here -- minus the .c
+C_PIECES=addrconv getcfg lock mpisr
+C_FILES=$(C_PIECES:%=%.c)
+C_O_FILES=$(C_PIECES:%=${ARCH}/%.o)
+
+H_FILES=
+
+SRCS=$(C_FILES) $(H_FILES)
+OBJS=$(C_O_FILES)
+
+include $(RTEMS_ROOT)/make/custom/$(RTEMS_BSP).cfg
+include $(RTEMS_ROOT)/make/leaf.cfg
+
+#
+# (OPTIONAL) Add local stuff here using +=
+#
+
+DEFINES  +=
+CPPFLAGS +=
+CFLAGS   +=
+
+LD_PATHS  +=
+LD_LIBS   +=
+LDFLAGS   +=
+
+#
+# Add your list of files to delete here.  The config files
+#  already know how to delete some stuff, so you may want
+#  to just run 'make clean' first to see what gets missed.
+#  'make clobber' already includes 'make clean'
+#
+
+CLEAN_ADDITIONS +=
+CLOBBER_ADDITIONS +=
+
+${PGM}: ${SRCS} ${OBJS}
+	$(make-rel)
+
+all:	${ARCH} $(SRCS) $(PGM)
+
+# the .rel file built here will be put into libbsp.a by ../wrapup/Makefile
+install:  all
+
Index: c/src/lib/libbsp/powerpc/psim/shmsupp/README
===================================================================
--- c/src/lib/libbsp/powerpc/psim/shmsupp/README	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
+++ c/src/lib/libbsp/powerpc/psim/shmsupp/README	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
@@ -0,0 +1,6 @@
+#
+#  $Id$
+#
+
+This shared memory driver support code works with a modified version
+of the PowerPC Sim
Index: c/src/lib/libbsp/powerpc/psim/shmsupp/addrconv.c
===================================================================
--- c/src/lib/libbsp/powerpc/psim/shmsupp/addrconv.c	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
+++ c/src/lib/libbsp/powerpc/psim/shmsupp/addrconv.c	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
@@ -0,0 +1,31 @@
+/*  Shm_Convert_address
+ *
+ *  No address range conversion is required.
+ *
+ *  Input parameters:
+ *    address - address to convert
+ *
+ *  Output parameters:
+ *    returns - converted address
+ *
+ *  COPYRIGHT (c) 1989-1997.
+ *  On-Line Applications Research Corporation (OAR).
+ *  Copyright assigned to U.S. Government, 1994.
+ *
+ *  The license and distribution terms for this file may in
+ *  the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+#include <shm.h>
+
+void *Shm_Convert_address(
+  void *address
+)
+{
+  return ( address );
+}
Index: c/src/lib/libbsp/powerpc/psim/shmsupp/getcfg.c
===================================================================
--- c/src/lib/libbsp/powerpc/psim/shmsupp/getcfg.c	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
+++ c/src/lib/libbsp/powerpc/psim/shmsupp/getcfg.c	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
@@ -0,0 +1,65 @@
+/*  void Shm_Get_configuration( localnode, &shmcfg )
+ *
+ *  This routine initializes, if necessary, and returns a pointer
+ *  to the Shared Memory Configuration Table for the PowerPC PSIM.
+ *
+ *  INPUT PARAMETERS:
+ *    localnode - local node number
+ *    shmcfg    - address of pointer to SHM Config Table
+ *
+ *  OUTPUT PARAMETERS:
+ *    *shmcfg   - pointer to SHM Config Table
+ *
+ *  NOTES:  No interrupt support.
+ *
+ *  COPYRIGHT (c) 1989-1997.
+ *  On-Line Applications Research Corporation (OAR).
+ *  Copyright assigned to U.S. Government, 1994.
+ *
+ *  The license and distribution terms for this file may in
+ *  the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include "shm.h"
+
+#define INTERRUPT 0                   /* PSIM target supports only */
+#define POLLING   1                   /* polling mode. */
+
+shm_config_table BSP_shm_cfgtbl;
+
+void Shm_Get_configuration(
+  rtems_unsigned32   localnode,
+  shm_config_table **shmcfg
+)
+{
+   BSP_shm_cfgtbl.base         = (rtems_unsigned32 *)0xc0000000;
+   BSP_shm_cfgtbl.length       = 64 * 1024;
+   BSP_shm_cfgtbl.format       = SHM_BIG;
+
+   BSP_shm_cfgtbl.cause_intr   = Shm_Cause_interrupt;
+
+#ifdef NEUTRAL_BIG
+   BSP_shm_cfgtbl.convert      = NULL_CONVERT;
+#else
+   BSP_shm_cfgtbl.convert      = CPU_swap_u32;
+#endif
+
+#if (POLLING==1)
+   BSP_shm_cfgtbl.poll_intr    = POLLED_MODE;
+   BSP_shm_cfgtbl.Intr.address = NO_INTERRUPT;
+   BSP_shm_cfgtbl.Intr.value   = NO_INTERRUPT;
+   BSP_shm_cfgtbl.Intr.length  = NO_INTERRUPT;
+#else
+   BSP_shm_cfgtbl.poll_intr    = INTR_MODE;
+   BSP_shm_cfgtbl.Intr.address = 0;
+   BSP_shm_cfgtbl.Intr.value   = 0;
+   BSP_shm_cfgtbl.Intr.length  = BYTE;
+#endif
+
+   *shmcfg = &BSP_shm_cfgtbl;
+
+}
Index: c/src/lib/libbsp/powerpc/psim/shmsupp/lock.c
===================================================================
--- c/src/lib/libbsp/powerpc/psim/shmsupp/lock.c	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
+++ c/src/lib/libbsp/powerpc/psim/shmsupp/lock.c	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
@@ -0,0 +1,69 @@
+/*  Shared Memory Lock Routines
+ *
+ *  This shared memory locked queue support routine need to be
+ *  able to lock the specified locked queue.  Interrupts are
+ *  disabled while the queue is locked to prevent preemption
+ *  and deadlock when two tasks poll for the same lock.
+ *  previous level.
+ *
+ *  COPYRIGHT (c) 1989-1997.
+ *  On-Line Applications Research Corporation (OAR).
+ *  Copyright assigned to U.S. Government, 1994.
+ *
+ *  The license and distribution terms for this file may in
+ *  the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+#include <shm.h>
+
+typedef volatile unsigned int volint;
+
+/*
+ *  Shm_Initialize_lock
+ *
+ *  Initialize the lock for the specified locked queue.
+ */
+
+void Shm_Initialize_lock(
+  Shm_Locked_queue_Control *lq_cb
+)
+{
+  /* nothing required -- done implicitly by device tree */
+}
+
+/*  void _Shm_Lock( &lq_cb )
+ *
+ *  This shared memory locked queue support routine locks the
+ *  specified locked queue.  It disables interrupts to prevent
+ *  a deadlock condition.
+ */
+
+void Shm_Lock(
+  Shm_Locked_queue_Control *lq_cb
+)
+{
+  volint *p = (volint *)0xc0010000;
+
+  (void) p[1];
+}
+
+/*
+ *  Shm_Unlock
+ *
+ *  Unlock the lock for the specified locked queue.
+ */
+
+void Shm_Unlock(
+  Shm_Locked_queue_Control *lq_cb
+)
+{
+  volint *p = (volint *)0xc0010000;
+
+  (void) p[2];
+}
+
Index: c/src/lib/libbsp/powerpc/psim/shmsupp/mpisr.c
===================================================================
--- c/src/lib/libbsp/powerpc/psim/shmsupp/mpisr.c	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
+++ c/src/lib/libbsp/powerpc/psim/shmsupp/mpisr.c	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
@@ -0,0 +1,34 @@
+/* 
+ *  NOTE: This routine is not used when in polling mode.  Either
+ *        this routine OR Shm_clockisr is used in a particular system.
+ *
+ *  COPYRIGHT (c) 1989-1997.
+ *  On-Line Applications Research Corporation (OAR).
+ *  Copyright assigned to U.S. Government, 1994.
+ *
+ *  The license and distribution terms for this file may in
+ *  the file LICENSE in this distribution or at
+ *  http://www.OARcorp.com/rtems/license.html.
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+#include <shm.h>
+
+
+/*  void _Shm_setvec( )
+ *
+ *  This driver routine sets the SHM interrupt vector to point to the
+ *  driver's SHM interrupt service routine.
+ *
+ *  Input parameters:  NONE
+ *
+ *  Output parameters: NONE
+ */
+
+void Shm_setvec()
+{
+  /* not supported */
+}
Index: c/src/lib/libbsp/powerpc/psim/start/Makefile.in
===================================================================
--- c/src/lib/libbsp/powerpc/psim/start/Makefile.in	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
+++ c/src/lib/libbsp/powerpc/psim/start/Makefile.in	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
@@ -0,0 +1,54 @@
+#
+#  $Id$
+#
+
+@SET_MAKE@
+srcdir = @srcdir@
+VPATH = @srcdir@
+RTEMS_ROOT = @top_srcdir@
+PROJECT_ROOT = @PROJECT_ROOT@
+
+PGMS=${ARCH}/startsim.o
+
+# C source names, if any, go here -- minus the .c
+C_PIECES=
+C_FILES=$(C_PIECES:%=%.c)
+C_O_FILES=$(C_PIECES:%=${ARCH}/%.o)
+
+H_FILES=
+
+# Assembly source names, if any, go here -- minus the .s
+S_PIECES=startsim
+S_FILES=$(S_PIECES:%=%.s)
+S_O_FILES=$(S_FILES:%.s=${ARCH}/%.o)
+
+SRCS=$(C_FILES) $(CC_FILES) $(H_FILES) $(S_FILES)
+OBJS=$(C_O_FILES) $(CC_O_FILES) $(S_O_FILES)
+
+include $(RTEMS_ROOT)/make/custom/$(RTEMS_BSP).cfg
+include $(RTEMS_ROOT)/make/leaf.cfg
+
+#
+# (OPTIONAL) Add local stuff here using +=
+#
+
+DEFINES  +=
+CPPFLAGS +=
+CFLAGS   +=
+
+LD_PATHS  +=
+LD_LIBS   +=
+LDFLAGS   +=
+
+#
+# Add your list of files to delete here.  The config files
+#  already know how to delete some stuff, so you may want
+#  to just run 'make clean' first to see what gets missed.
+#  'make clobber' already includes 'make clean'
+#
+
+CLEAN_ADDITIONS +=
+CLOBBER_ADDITIONS +=
+
+all:	${ARCH} $(SRCS) $(OBJS) $(PGM)
+	$(INSTALL_VARIANT) -m 555 ${PGMS} ${PROJECT_RELEASE}/lib
Index: c/src/lib/libbsp/powerpc/psim/start/startsim.s
===================================================================
--- c/src/lib/libbsp/powerpc/psim/start/startsim.s	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
+++ c/src/lib/libbsp/powerpc/psim/start/startsim.s	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
@@ -0,0 +1,106 @@
+/*
+ * This is based on the mvme-crt0.S file from libgloss/rs6000.
+ * crt0.S -- startup file for PowerPC systems.
+ *
+ * Copyright (c) 1995 Cygnus Support
+ *
+ * The authors hereby grant permission to use, copy, modify, distribute,
+ * and license this software and its documentation for any purpose, provided
+ * that existing copyright notices are retained in all copies and that this
+ * notice is included verbatim in any distributions. No written agreement,
+ * license, or royalty fee is required for any of the authorized uses.
+ * Modifications to this software may be copyrighted by their authors
+ * and need not follow the licensing terms described here, provided that
+ * the new terms are clearly indicated on the first page of each file where
+ * they apply.
+ *
+ *  $Id$
+ */
+
+#include "ppc-asm.h"
+
+	.file	"startsim.s"
+	.section ".got2","aw"
+	.align	2
+
+.LCTOC1 = .+32768
+
+	.extern	FUNC_NAME(atexit)
+	.globl	FUNC_NAME(__atexit)
+	.section ".sdata","aw"
+	.align	2
+FUNC_NAME(__atexit):			/* tell C's eabi-ctor's we have an atexit function */
+	.long	FUNC_NAME(atexit)@fixup	/* and that it is to register __do_global_dtors */
+
+	.section ".fixup","aw"
+	.align	2
+	.long	FUNC_NAME(__atexit)
+
+	.section ".got2","aw"
+.Ltable = .-.LCTOC1
+	.long	.LCTOC1			/* address we think .LCTOC1 is loaded at */
+
+.Lbss_start = .-.LCTOC1
+	.long	__bss_start
+
+.Lend = .-.LCTOC1
+	.long	_end
+
+.Lstack = .-.LCTOC1			/* stack address if set by user */
+	.long	__stack
+
+	.text
+.Lptr:
+	.long .LCTOC1-.Laddr
+
+	.globl	_start
+	.type	_start,@function
+_start:
+	bl	.Laddr			/* get current address */
+.Laddr:
+	mflr	r4			/* real address of .Laddr */
+	lwz	r5,(.Lptr-.Laddr)(r4)	/* linker generated address of .LCTOC1 */
+	add	r5,r5,r4		/* correct to real pointer */
+	lwz	r4,.Ltable(r5)		/* get linker's idea of where .Laddr is */
+	subf	r4,r4,r5		/* calculate difference between where linked and current */
+
+	/* clear bss */
+	lwz	r6,.Lbss_start(r5)	/* calculate beginning of the BSS */
+	lwz	r7,.Lend(r5)		/* calculate end of the BSS */
+	add	r6,r6,r4		/* adjust pointers */
+	add	r7,r7,r4
+
+	cmplw	1,r6,r7
+	bc	4,4,.Ldone
+
+	subf	r8,r6,r7		/* number of bytes to zero */
+	srwi	r9,r8,2			/* number of words to zero */
+	mtctr	r9
+	li	r0,0			/* zero to clear memory */
+	addi	r6,r6,-4		/* adjust so we can use stwu */
+.Lloop:
+	stwu	r0,4(r6)		/* zero bss */
+	bdnz	.Lloop
+
+.Ldone:
+
+	lwz	r0,.Lstack(r5)		/* stack address or 0 */
+	cmplwi	1,r0,0			/* equal to 0? */
+	bc	12,6,.Lnostack		/* use default stack if == 0 */
+	mr	sp,r0			/* use user defined stack */
+
+.Lnostack:
+	/* set up initial stack frame */
+	addi	sp,sp,-4		/* make sure we don't overwrite debug mem */
+	lis	r0,0
+	stw	r0,0(sp)		/* clear back chain */
+	stwu	sp,-56(sp)		/* push another stack frame */
+
+	/* Let her rip */
+	bl	FUNC_NAME(boot_card)
+
+	/* return value from boot_card is argument to exit */
+	bl	FUNC_NAME(exit)
+	trap
+.Lstart:
+	.size	_start,.Lstart-_start
Index: c/src/lib/libbsp/powerpc/psim/startsim/Makefile.in
===================================================================
--- c/src/lib/libbsp/powerpc/psim/startsim/Makefile.in	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
+++ c/src/lib/libbsp/powerpc/psim/startsim/Makefile.in	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
@@ -0,0 +1,54 @@
+#
+#  $Id$
+#
+
+@SET_MAKE@
+srcdir = @srcdir@
+VPATH = @srcdir@
+RTEMS_ROOT = @top_srcdir@
+PROJECT_ROOT = @PROJECT_ROOT@
+
+PGMS=${ARCH}/startsim.o
+
+# C source names, if any, go here -- minus the .c
+C_PIECES=
+C_FILES=$(C_PIECES:%=%.c)
+C_O_FILES=$(C_PIECES:%=${ARCH}/%.o)
+
+H_FILES=
+
+# Assembly source names, if any, go here -- minus the .s
+S_PIECES=startsim
+S_FILES=$(S_PIECES:%=%.s)
+S_O_FILES=$(S_FILES:%.s=${ARCH}/%.o)
+
+SRCS=$(C_FILES) $(CC_FILES) $(H_FILES) $(S_FILES)
+OBJS=$(C_O_FILES) $(CC_O_FILES) $(S_O_FILES)
+
+include $(RTEMS_ROOT)/make/custom/$(RTEMS_BSP).cfg
+include $(RTEMS_ROOT)/make/leaf.cfg
+
+#
+# (OPTIONAL) Add local stuff here using +=
+#
+
+DEFINES  +=
+CPPFLAGS +=
+CFLAGS   +=
+
+LD_PATHS  +=
+LD_LIBS   +=
+LDFLAGS   +=
+
+#
+# Add your list of files to delete here.  The config files
+#  already know how to delete some stuff, so you may want
+#  to just run 'make clean' first to see what gets missed.
+#  'make clobber' already includes 'make clean'
+#
+
+CLEAN_ADDITIONS +=
+CLOBBER_ADDITIONS +=
+
+all:	${ARCH} $(SRCS) $(OBJS) $(PGM)
+	$(INSTALL_VARIANT) -m 555 ${PGMS} ${PROJECT_RELEASE}/lib
Index: c/src/lib/libbsp/powerpc/psim/startsim/startsim.s
===================================================================
--- c/src/lib/libbsp/powerpc/psim/startsim/startsim.s	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
+++ c/src/lib/libbsp/powerpc/psim/startsim/startsim.s	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
@@ -0,0 +1,106 @@
+/*
+ * This is based on the mvme-crt0.S file from libgloss/rs6000.
+ * crt0.S -- startup file for PowerPC systems.
+ *
+ * Copyright (c) 1995 Cygnus Support
+ *
+ * The authors hereby grant permission to use, copy, modify, distribute,
+ * and license this software and its documentation for any purpose, provided
+ * that existing copyright notices are retained in all copies and that this
+ * notice is included verbatim in any distributions. No written agreement,
+ * license, or royalty fee is required for any of the authorized uses.
+ * Modifications to this software may be copyrighted by their authors
+ * and need not follow the licensing terms described here, provided that
+ * the new terms are clearly indicated on the first page of each file where
+ * they apply.
+ *
+ *  $Id$
+ */
+
+#include "ppc-asm.h"
+
+	.file	"startsim.s"
+	.section ".got2","aw"
+	.align	2
+
+.LCTOC1 = .+32768
+
+	.extern	FUNC_NAME(atexit)
+	.globl	FUNC_NAME(__atexit)
+	.section ".sdata","aw"
+	.align	2
+FUNC_NAME(__atexit):			/* tell C's eabi-ctor's we have an atexit function */
+	.long	FUNC_NAME(atexit)@fixup	/* and that it is to register __do_global_dtors */
+
+	.section ".fixup","aw"
+	.align	2
+	.long	FUNC_NAME(__atexit)
+
+	.section ".got2","aw"
+.Ltable = .-.LCTOC1
+	.long	.LCTOC1			/* address we think .LCTOC1 is loaded at */
+
+.Lbss_start = .-.LCTOC1
+	.long	__bss_start
+
+.Lend = .-.LCTOC1
+	.long	_end
+
+.Lstack = .-.LCTOC1			/* stack address if set by user */
+	.long	__stack
+
+	.text
+.Lptr:
+	.long .LCTOC1-.Laddr
+
+	.globl	_start
+	.type	_start,@function
+_start:
+	bl	.Laddr			/* get current address */
+.Laddr:
+	mflr	r4			/* real address of .Laddr */
+	lwz	r5,(.Lptr-.Laddr)(r4)	/* linker generated address of .LCTOC1 */
+	add	r5,r5,r4		/* correct to real pointer */
+	lwz	r4,.Ltable(r5)		/* get linker's idea of where .Laddr is */
+	subf	r4,r4,r5		/* calculate difference between where linked and current */
+
+	/* clear bss */
+	lwz	r6,.Lbss_start(r5)	/* calculate beginning of the BSS */
+	lwz	r7,.Lend(r5)		/* calculate end of the BSS */
+	add	r6,r6,r4		/* adjust pointers */
+	add	r7,r7,r4
+
+	cmplw	1,r6,r7
+	bc	4,4,.Ldone
+
+	subf	r8,r6,r7		/* number of bytes to zero */
+	srwi	r9,r8,2			/* number of words to zero */
+	mtctr	r9
+	li	r0,0			/* zero to clear memory */
+	addi	r6,r6,-4		/* adjust so we can use stwu */
+.Lloop:
+	stwu	r0,4(r6)		/* zero bss */
+	bdnz	.Lloop
+
+.Ldone:
+
+	lwz	r0,.Lstack(r5)		/* stack address or 0 */
+	cmplwi	1,r0,0			/* equal to 0? */
+	bc	12,6,.Lnostack		/* use default stack if == 0 */
+	mr	sp,r0			/* use user defined stack */
+
+.Lnostack:
+	/* set up initial stack frame */
+	addi	sp,sp,-4		/* make sure we don't overwrite debug mem */
+	lis	r0,0
+	stw	r0,0(sp)		/* clear back chain */
+	stwu	sp,-56(sp)		/* push another stack frame */
+
+	/* Let her rip */
+	bl	FUNC_NAME(boot_card)
+
+	/* return value from boot_card is argument to exit */
+	bl	FUNC_NAME(exit)
+	trap
+.Lstart:
+	.size	_start,.Lstart-_start
Index: c/src/lib/libbsp/powerpc/psim/startup/Makefile.in
===================================================================
--- c/src/lib/libbsp/powerpc/psim/startup/Makefile.in	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
+++ c/src/lib/libbsp/powerpc/psim/startup/Makefile.in	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
@@ -0,0 +1,58 @@
+#
+#  $Id$
+#
+
+@SET_MAKE@
+srcdir = @srcdir@
+VPATH = @srcdir@:@srcdir@/../../../shared
+RTEMS_ROOT = @top_srcdir@
+PROJECT_ROOT = @PROJECT_ROOT@
+
+PGM=${ARCH}/startup.rel
+
+# C source names, if any, go here -- minus the .c
+C_PIECES=bsppost bspstart main sbrk setvec
+C_FILES=$(C_PIECES:%=%.c)
+C_O_FILES=$(C_PIECES:%=${ARCH}/%.o)
+
+H_FILES=
+
+# Assembly source names, if any, go here -- minus the .s
+S_PIECES=bspclean
+S_FILES=$(S_PIECES:%=%.s)
+S_O_FILES=$(S_FILES:%.s=${ARCH}/%.o)
+
+SRCS=linkcmds device-tree $(C_FILES) $(CC_FILES) $(H_FILES) $(S_FILES)
+OBJS=$(C_O_FILES) $(S_O_FILES)
+
+include $(RTEMS_ROOT)/make/custom/$(RTEMS_BSP).cfg
+include $(RTEMS_ROOT)/make/leaf.cfg
+
+#
+# (OPTIONAL) Add local stuff here using +=
+#
+
+DEFINES  +=
+CPPFLAGS +=
+CFLAGS   +=
+
+LD_PATHS  +=
+LD_LIBS   +=
+LDFLAGS   +=
+
+#
+# Add your list of files to delete here.  The config files
+#  already know how to delete some stuff, so you may want
+#  to just run 'make clean' first to see what gets missed.
+#  'make clobber' already includes 'make clean'
+#
+
+CLEAN_ADDITIONS +=
+CLOBBER_ADDITIONS +=
+
+${PGM}: ${SRCS} ${OBJS}
+	$(make-rel)
+
+all:	${ARCH} $(SRCS) $(PGM)
+	$(INSTALL) $(srcdir)/linkcmds ${PROJECT_RELEASE}/lib
+	$(INSTALL) $(srcdir)/device-tree ${PROJECT_RELEASE}/lib
Index: c/src/lib/libbsp/powerpc/psim/startup/bspstart.c
===================================================================
--- c/src/lib/libbsp/powerpc/psim/startup/bspstart.c	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
+++ c/src/lib/libbsp/powerpc/psim/startup/bspstart.c	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
@@ -0,0 +1,357 @@
+/*  bspstart.c
+ *
+ *  This set of routines starts the application.  It includes application,
+ *  board, and monitor specific initialization and configuration.
+ *  The generic CPU dependent initialization has been performed
+ *  before any of these are invoked.
+ *
+ *  Called by RTEMS::RTEMS constructor in rtems-ctor.cc
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994, 1997.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <bsp.h>
+#include <rtems/libio.h>
+
+#include <libcsupport.h>
+
+#include <string.h>
+#include <fcntl.h>
+
+#ifdef STACK_CHECKER_ON
+#include <stackchk.h>
+#endif
+
+/*
+ *  The original table from the application and our copy of it with
+ *  some changes.
+ */
+ 
+extern rtems_configuration_table  Configuration;
+rtems_configuration_table         BSP_Configuration;
+
+rtems_cpu_table   Cpu_table;
+rtems_unsigned32  bsp_isr_level;
+
+/*
+ *  Tells us where to put the workspace in case remote debugger is present.
+ */
+
+#if 0
+extern rtems_unsigned32  rdb_start;
+#endif
+
+/*
+ * Amount to increment itimer by each pass
+ * It is a variable instead of a #define to allow the 'looptest'
+ * script to bump it without recompiling rtems
+ *
+ *  NOTE:  This is based on the PA-RISC simulator.  I don't know if we
+ *         can actually pull this trick on the PPC simulator.
+ */
+
+rtems_unsigned32 CPU_PPC_CLICKS_PER_TICK;
+
+#if PSIM_FAST_IDLE
+
+/*
+ * Many of the tests are very slow on the simulator because they have
+ * have 5 second delays hardwired in.
+ *
+ * Try to speed those tests up by speeding up the clock when in the idle task.
+ *
+ *  NOTE:  At the current setting, 5 second delays in the tests take 
+ *         approximately 5 seconds of wall time. 
+ */
+
+rtems_extension
+fast_idle_switch_hook(rtems_tcb *current_task,
+                      rtems_tcb *heir_task)
+{
+    static rtems_unsigned32 normal_clock = ~0;
+    static rtems_unsigned32 fast_clock;
+
+    /* init our params on first call */
+    if (normal_clock == (rtems_unsigned32) ~0)
+    {
+        normal_clock = CPU_PPC_CLICKS_PER_TICK;
+        fast_clock = 10000;
+#if 0
+        fast_clock = CPU_PPC_CLICKS_PER_TICK / 0x10 ;
+#endif
+        if (fast_clock == 0)    /* handle pathological case */
+            fast_clock++;
+    }
+
+    /*
+     * Run the clock faster when idle is in place.
+     */
+
+    if (heir_task == _Thread_Idle)
+        CPU_PPC_CLICKS_PER_TICK = fast_clock;
+    else if (current_task == _Thread_Idle)
+        CPU_PPC_CLICKS_PER_TICK = normal_clock;
+}
+
+#endif
+
+/*
+ *  bsp_libc_init
+ *
+ *  Initialize whatever libc we are using called from bsp_postdriver_hook.
+ */
+
+void bsp_libc_init(void)
+{
+  extern int end;
+  rtems_unsigned32 heap_start;
+  rtems_unsigned32 heap_size;
+
+  heap_start = (rtems_unsigned32) &end;
+  if (heap_start & (CPU_ALIGNMENT-1))
+    heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1);
+
+  heap_size = BSP_Configuration.work_space_start - (void *)&end;
+  heap_size &= 0xfffffff0;  /* keep it as a multiple of 16 bytes */
+
+  RTEMS_Malloc_Initialize((void *) heap_start, heap_size, 0);
+
+  /*
+   *  Init the RTEMS libio facility to provide UNIX-like system
+   *  calls for use by newlib (ie: provide __rtems_open, __rtems_close, etc)
+   *  Uses malloc() to get area for the iops, so must be after malloc init
+   */
+ 
+  rtems_libio_init();
+ 
+  /*
+   * Set up for the libc handling.
+   */
+ 
+  if (BSP_Configuration.ticks_per_timeslice > 0)
+    libc_init(1);                /* reentrant if possible */
+  else
+    libc_init(0);                /* non-reentrant */
+
+}
+
+
+/*
+ *  bsp_pretasking_hook
+ *
+ *  BSP pretasking hook.  Called just before drivers are initialized.
+ *  Used to setup libc and install any BSP extensions.
+ */
+
+void bsp_pretasking_hook(void)
+{
+  bsp_libc_init();
+
+#if PSIM_FAST_IDLE
+  /*
+   *  Install the fast idle task switch extension
+   *
+   *  On MP systems, might not want to do this; it confuses at least
+   *  one test (mp06) on the PA-RISC simulator
+   */
+
+#if 0
+  if (BSP_Configuration.User_multiprocessing_table == 0)
+#endif
+  {
+    rtems_extensions_table  fast_idle_extension;
+    rtems_id                extension_id;
+    rtems_status_code       rc;
+
+    memset(&fast_idle_extension, 0, sizeof(fast_idle_extension));
+
+    fast_idle_extension.thread_switch  = fast_idle_switch_hook;
+
+    rc = rtems_extension_create(
+      rtems_build_name('F', 'D', 'L', 'E'),
+      &fast_idle_extension, 
+      &extension_id
+    );
+    if (rc != RTEMS_SUCCESSFUL)
+      rtems_fatal_error_occurred(rc);
+  }
+#endif
+
+
+#ifdef STACK_CHECKER_ON
+  /*
+   *  Initialize the stack bounds checker
+   *  We can either turn it on here or from the app.
+   */
+
+  Stack_check_Initialize();
+#endif
+
+#ifdef RTEMS_DEBUG
+  rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
+#endif
+
+}
+
+/*
+ *  Use the shared bsp_postdriver_hook() implementation 
+ */
+ 
+void bsp_postdriver_hook(void);
+
+/*
+ *  bsp_start
+ *
+ *  This routine does the bulk of the system initialization.
+ */
+
+void bsp_start( void )
+{
+  unsigned char *work_space_start;
+
+#if 0
+  /* 
+   * Set MSR to show vectors at 0 XXX
+   */
+  _CPU_MSR_Value( msr_value );
+  msr_value &= ~PPC_MSR_EP;
+  _CPU_MSR_SET( msr_value );
+#endif
+
+  /*
+   * Set up our hooks
+   * Make sure libc_init is done before drivers initialized so that
+   * they can use atexit()
+   */
+
+  Cpu_table.pretasking_hook = bsp_pretasking_hook;    /* init libc, etc. */
+
+  Cpu_table.predriver_hook = NULL; /* bsp_spurious_initialize;*/
+
+  Cpu_table.postdriver_hook = bsp_postdriver_hook;
+
+  Cpu_table.idle_task = NULL;  /* do not override system IDLE task */
+
+  /*
+   *  PSIM does zero out memory BUT only when IT begins execution.  Thus
+   *  if we want to have a clean slate in the workspace each time we
+   *  begin execution of OUR application, then we must zero the workspace.
+   */
+
+  Cpu_table.do_zero_of_workspace = FALSE;
+
+  /*
+   *  This should be enough interrupt stack.
+   */
+
+  Cpu_table.interrupt_stack_size = (12 * 1024);
+
+  /*
+   *  SIS does not support MP configurations so there is really no way
+   *  to check this out.
+   */
+
+  Cpu_table.extra_mpci_receive_server_stack = 0;
+
+  /*
+   *  The monitor likes the exception table to be at 0x0.
+   */
+
+  Cpu_table.exceptions_in_RAM = TRUE;
+
+  /*
+   *  Copy the table and allocate memory for the RTEMS Workspace
+   */
+
+  BSP_Configuration = Configuration;
+
+#if defined(RTEMS_POSIX_API)
+  BSP_Configuration.work_space_size *= 3;
+#endif
+
+
+#if 0
+  work_space_start = 
+    (unsigned char *)rdb_start - BSP_Configuration.work_space_size;
+#endif
+
+  work_space_start = 
+    (unsigned char *)&RAM_END - BSP_Configuration.work_space_size;
+
+  if ( work_space_start <= (unsigned char *)&end ) {
+    DEBUG_puts( "bspstart: Not enough RAM!!!\n" );
+    bsp_cleanup();
+  }
+
+  BSP_Configuration.work_space_start = work_space_start;
+
+  /*
+   * Add 1 region for RTEMS Malloc
+   */
+
+  BSP_Configuration.RTEMS_api_configuration->maximum_regions++;
+
+#ifdef RTEMS_NEWLIB
+  /*
+   * Add 1 extension for newlib libc
+   */
+
+  BSP_Configuration.maximum_extensions++;
+#endif
+
+#ifdef STACK_CHECKER_ON
+  /*
+   * Add 1 extension for stack checker
+   */
+
+  BSP_Configuration.maximum_extensions++;
+#endif
+
+#if PSIM_FAST_IDLE
+  /*
+   * Add 1 extension for fast idle
+   */
+
+  BSP_Configuration.maximum_extensions++;
+#endif
+
+  /*
+   * Add 1 extension for MPCI_fatal
+   */
+
+  if (BSP_Configuration.User_multiprocessing_table)
+    BSP_Configuration.maximum_extensions++;
+
+  /*
+   * Set the "clicks per tick" for the simulator
+   *  used by XXX/clock/clock.c to schedule interrupts
+   *
+   *  NOTE: On psim, each click of the decrementer register corresponds
+   *        to 1 instruction.  By setting this to 100, we are indicating
+   *        that we are assuming it can execute 100 instructions per
+   *        microsecond.  This corresponds to sustaining 1 instruction
+   *        per cycle at 100 Mhz.  Whether this is a good guess or not
+   *        is anyone's guess.
+   */
+
+  {
+    extern int PSIM_INSTRUCTIONS_PER_MICROSECOND;
+
+    CPU_PPC_CLICKS_PER_TICK = BSP_Configuration.microseconds_per_tick * 
+      (int) &PSIM_INSTRUCTIONS_PER_MICROSECOND;
+  }
+
+  /*
+   *  Initialize RTEMS. main() will finish it up and start multitasking.
+   */
+
+  rtems_libio_config( &BSP_Configuration, BSP_LIBIO_MAX_FDS );
+}
Index: c/src/lib/libbsp/powerpc/psim/startup/device-tree
===================================================================
--- c/src/lib/libbsp/powerpc/psim/startup/device-tree	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
+++ c/src/lib/libbsp/powerpc/psim/startup/device-tree	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
@@ -0,0 +1,3 @@
+#/openprom/init/register/pc 0
+#/openprom/options/smp 2
+/openprom/options/oea-memory-size 4194304
Index: c/src/lib/libbsp/powerpc/psim/startup/linkcmds
===================================================================
--- c/src/lib/libbsp/powerpc/psim/startup/linkcmds	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
+++ c/src/lib/libbsp/powerpc/psim/startup/linkcmds	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
@@ -0,0 +1,172 @@
+OUTPUT_FORMAT("elf32-powerpc", "elf32-powerpc",
+	      "elf32-powerpc")
+OUTPUT_ARCH(powerpc)
+ENTRY(_start)
+ /*SEARCH_DIR(/usr1/gnu/cross/powerpc-unknown-eabi//powerpc-unknown-eabi/lib); */
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+PROVIDE (__stack = 0);
+PROVIDE (PSIM_INSTRUCTIONS_PER_MICROSECOND = 100);
+MEMORY
+  {
+        RAM : ORIGIN = 0, LENGTH = 4M
+        EPROM : ORIGIN = 0xFFF00000, LENGTH = 0x20000
+  }
+
+SECTIONS
+{
+  .vectors 0xFFF00100 :
+  {
+    *(.vectors)
+  }
+
+  /* Read-only sections, merged into text segment: */
+  /* . = 0x40000 + SIZEOF_HEADERS; */
+  . = 0x4000;
+  .interp   : { *(.interp) }
+  .hash		  : { *(.hash)		}
+  .dynsym	  : { *(.dynsym)		}
+  .dynstr	  : { *(.dynstr)		}
+  .rela.text	  : { *(.rela.text) 	}
+  .rela.data	  : { *(.rela.data) 	}
+  .rela.rodata	  : { *(.rela.rodata) 	}
+  .rela.got	  : { *(.rela.got)	}
+  .rela.got1	  : { *(.rela.got1)	}
+  .rela.got2	  : { *(.rela.got2)	}
+  .rela.ctors	  : { *(.rela.ctors)	}
+  .rela.dtors	  : { *(.rela.dtors)	}
+  .rela.init	  : { *(.rela.init)	}
+  .rela.fini	  : { *(.rela.fini)	}
+  .rela.bss	  : { *(.rela.bss)	}
+  .rela.plt	  : { *(.rela.plt)	}
+  .rela.sdata	  : { *(.rela.sdata2)	}
+  .rela.sbss	  : { *(.rela.sbss2)	}
+  .rela.sdata2	  : { *(.rela.sdata2)	}
+  .rela.sbss2	  : { *(.rela.sbss2)	}
+  .plt   : { *(.plt) }
+  .text      :
+  {
+    *(.text)
+    *(.descriptors)
+    /* .gnu.warning sections are handled specially by elf32.em.  */
+    *(.gnu.warning)
+  } =0
+  .init		  : { *(.init)		} =0
+  .fini		  : { *(.fini)		} =0
+  .rodata	  : { *(.rodata)  }
+  .rodata1	  : { *(.rodata1) }
+  _etext = .;
+  PROVIDE (etext = .);
+  PROVIDE (__SDATA2_START__ = .);
+  .sdata2   : { *(.sdata2) }
+  .sbss2   : { *(.sbss2) }
+  PROVIDE (__SBSS2_END__ = .);
+  /* Adjust the address for the data segment.  We want to adjust up to
+     the same address within the page on the next page up.  It would
+     be more correct to do this:
+       . = ALIGN(0x40000) + (ALIGN(8) & (0x40000 - 1));
+     The current expression does not correctly handle the case of a
+     text segment ending precisely at the end of a page; it causes the
+     data segment to skip a page.  The above expression does not have
+     this problem, but it will currently (2/95) cause BFD to allocate
+     a single segment, combining both text and data, for this case.
+     This will prevent the text segment from being shared among
+     multiple executions of the program; I think that is more
+     important than losing a page of the virtual address space (note
+     that no actual memory is lost; the page which is skipped can not
+     be referenced).  */
+  . =  ALIGN(8) + 0x40000;
+  .data    :
+  {
+    *(.data)
+    CONSTRUCTORS
+  }
+  PROVIDE (__EXCEPT_START__ = .);
+  .gcc_except_table   : { *(.gcc_except_table) }
+  PROVIDE (__EXCEPT_END__ = .);
+
+  .data1   : { *(.data1) }
+  .got1		  : { *(.got1) }
+  .dynamic	  : { *(.dynamic) }
+  /* Put .ctors and .dtors next to the .got2 section, so that the pointers
+     get relocated with -mrelocatable. Also put in the .fixup pointers.
+     The current compiler no longer needs this, but keep it around for 2.7.2  */
+		PROVIDE (_GOT2_START_ = .);
+  .got2		  :  { *(.got2) }
+		PROVIDE (__GOT2_END__ = .);
+		PROVIDE (__CTOR_LIST__ = .);
+  .ctors	  : { *(.ctors) }
+		PROVIDE (__CTOR_END__ = .);
+		PROVIDE (__DTOR_LIST__ = .);
+  .dtors	  : { *(.dtors) }
+		PROVIDE (__DTOR_END__ = .);
+		PROVIDE (_FIXUP_START_ = .);
+  .fixup	  : { *(.fixup) }
+		PROVIDE (_FIXUP_END_ = .);
+		PROVIDE (__FIXUP_END__ = .);
+		PROVIDE (_GOT2_END_ = .);
+		PROVIDE (_GOT_START_ = .);
+  s.got = .;
+  .got		  : { *(.got) }
+  .got.plt	  : { *(.got.plt) }
+		PROVIDE (_GOT_END_ = .);
+		PROVIDE (__GOT_END__ = .);
+  /* We want the small data sections together, so single-instruction offsets
+     can access them all, and initialized data all before uninitialized, so
+     we can shorten the on-disk segment size.  */
+  PROVIDE (__SDATA_START__ = .);
+  .sdata	  : { *(.sdata) }
+  _edata  =  .;
+  PROVIDE (edata = .);
+  PROVIDE (RAM_END = 0x3f0000);
+  .sbss      :
+  {
+    PROVIDE (__sbss_start = .);
+    *(.sbss)
+    *(.scommon)
+    PROVIDE (__sbss_end = .);
+  }
+  PROVIDE (__SBSS_END__ = .);
+  .bss       :
+  {
+   PROVIDE (__bss_start = .);
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  }
+  . =  ALIGN(8) + 0x8000;
+  __stack = .;
+  _end = . ;
+  PROVIDE (end = .);
+
+  /* These are needed for ELF backends which have not yet been
+     converted to the new style linker.  */
+  .stab 0 : { *(.stab) }
+  .stabstr 0 : { *(.stabstr) }
+  /* DWARF debug sections.
+     Symbols in the DWARF debugging sections are relative to the beginning
+     of the section so we begin them at 0.  */
+  /* DWARF 1 */
+  .debug          0 : { *(.debug) }
+  .line           0 : { *(.line) }
+  /* GNU DWARF 1 extensions */
+  .debug_srcinfo  0 : { *(.debug_srcinfo) }
+  .debug_sfnames  0 : { *(.debug_sfnames) }
+  /* DWARF 1.1 and DWARF 2 */
+  .debug_aranges  0 : { *(.debug_aranges) }
+  .debug_pubnames 0 : { *(.debug_pubnames) }
+  /* DWARF 2 */
+  .debug_info     0 : { *(.debug_info) }
+  .debug_abbrev   0 : { *(.debug_abbrev) }
+  .debug_line     0 : { *(.debug_line) }
+  .debug_frame    0 : { *(.debug_frame) }
+  .debug_str      0 : { *(.debug_str) }
+  .debug_loc      0 : { *(.debug_loc) }
+  .debug_macinfo  0 : { *(.debug_macinfo) }
+  /* SGI/MIPS DWARF 2 extensions */
+  .debug_weaknames 0 : { *(.debug_weaknames) }
+  .debug_funcnames 0 : { *(.debug_funcnames) }
+  .debug_typenames 0 : { *(.debug_typenames) }
+  .debug_varnames  0 : { *(.debug_varnames) }
+  /* These must appear regardless of  .  */
+}
Index: c/src/lib/libbsp/powerpc/psim/startup/setvec.c
===================================================================
--- c/src/lib/libbsp/powerpc/psim/startup/setvec.c	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
+++ c/src/lib/libbsp/powerpc/psim/startup/setvec.c	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
@@ -0,0 +1,58 @@
+/*  set_vector
+ *
+ *  This routine installs an interrupt vector on the target Board/CPU.
+ *  This routine is allowed to be as board dependent as necessary.
+ *
+ *  INPUT:
+ *    handler - interrupt handler entry point
+ *    vector  - vector number
+ *    type    - 0 indicates raw hardware connect
+ *              1 indicates RTEMS interrupt connect
+ *
+ *  RETURNS:
+ *    address of previous interrupt handler
+ *
+ *  Author:	Andrew Bray <andy@i-cubed.co.uk>
+ *
+ *  COPYRIGHT (c) 1995 by i-cubed ltd.
+ *
+ *  To anyone who acknowledges that this file is provided "AS IS"
+ *  without any express or implied warranty:
+ *      permission to use, copy, modify, and distribute this file
+ *      for any purpose is hereby granted without fee, provided that
+ *      the above copyright notice and this notice appears in all
+ *      copies, and that the name of i-cubed limited not be used in
+ *      advertising or publicity pertaining to distribution of the
+ *      software without specific, written prior permission.
+ *      i-cubed limited makes no representations about the suitability
+ *      of this software for any purpose.
+ *
+ *  Derived from c/src/lib/libbsp/no_cpu/no_bsp/startup/setvec.c:
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+
+rtems_isr_entry set_vector(                    /* returns old vector */
+  rtems_isr_entry     handler,                  /* isr routine        */
+  rtems_vector_number vector,                   /* vector number      */
+  int                 type                      /* RTEMS or RAW intr  */
+)
+{
+  rtems_isr_entry previous_isr;
+
+  rtems_interrupt_catch( handler, vector, (rtems_isr_entry *) &previous_isr );
+
+  return previous_isr;
+}
+
Index: c/src/lib/libbsp/powerpc/psim/timer/Makefile.in
===================================================================
--- c/src/lib/libbsp/powerpc/psim/timer/Makefile.in	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
+++ c/src/lib/libbsp/powerpc/psim/timer/Makefile.in	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
@@ -0,0 +1,59 @@
+#
+#  $Id$
+#
+
+@SET_MAKE@
+srcdir = @srcdir@
+VPATH = @srcdir@
+RTEMS_ROOT = @top_srcdir@
+PROJECT_ROOT = @PROJECT_ROOT@
+
+PGM=${ARCH}/timer.rel
+
+# C source names, if any, go here -- minus the .c
+C_PIECES=timer
+C_FILES=$(C_PIECES:%=%.c)
+C_O_FILES=$(C_PIECES:%=${ARCH}/%.o)
+
+H_FILES=
+
+# Assembly source names, if any, go here -- minus the .s
+S_PIECES=
+S_FILES=$(S_PIECES:%=%.s)
+S_O_FILES=$(S_FILES:%.s=${ARCH}/%.o)
+
+SRCS=$(C_FILES) $(CC_FILES) $(H_FILES) $(S_FILES)
+OBJS=$(C_O_FILES) $(CC_O_FILES) $(S_O_FILES)
+
+include $(RTEMS_ROOT)/make/custom/$(RTEMS_BSP).cfg
+include $(RTEMS_ROOT)/make/leaf.cfg
+
+#
+# (OPTIONAL) Add local stuff here using +=
+#
+
+DEFINES  +=
+CPPFLAGS +=
+CFLAGS   +=
+
+LD_PATHS  +=
+LD_LIBS   +=
+LDFLAGS   +=
+
+#
+# Add your list of files to delete here.  The config files
+#  already know how to delete some stuff, so you may want
+#  to just run 'make clean' first to see what gets missed.
+#  'make clobber' already includes 'make clean'
+#
+
+CLEAN_ADDITIONS +=
+CLOBBER_ADDITIONS +=
+
+${PGM}: ${SRCS} ${OBJS}
+	$(make-rel)
+
+all:	${ARCH} $(SRCS) $(PGM)
+
+# the .rel file built here will be put into libbsp.a by ../wrapup/Makefile
+install:  all
Index: c/src/lib/libbsp/powerpc/psim/timer/timer.c
===================================================================
--- c/src/lib/libbsp/powerpc/psim/timer/timer.c	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
+++ c/src/lib/libbsp/powerpc/psim/timer/timer.c	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
@@ -0,0 +1,105 @@
+/*  timer.c
+ *
+ *  This file implements a benchmark timer using the General Purpose Timer on
+ *  the MEC.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  Ported to ERC32 implementation of the SPARC by On-Line Applications
+ *  Research Corporation (OAR) under contract to the European Space 
+ *  Agency (ESA).
+ *
+ *  ERC32 modifications of respective RTEMS file: COPYRIGHT (c) 1995. 
+ *  European Space Agency.
+ *
+ *  $Id$
+ */
+
+#include <assert.h>
+
+#include <bsp.h>
+
+rtems_unsigned64 Timer_driver_Start_time;
+
+rtems_boolean Timer_driver_Find_average_overhead;
+
+static inline rtems_unsigned64 PPC_Get_timebase_register( void )
+{
+  rtems_unsigned32 tbr_low;
+  rtems_unsigned32 tbr_high;
+  rtems_unsigned32 tbr_high_old;
+  rtems_unsigned64 tbr;
+
+  do {
+    asm volatile( "mftbu %0" : "=r" (tbr_high_old));
+    asm volatile( "mftb  %0" : "=r" (tbr_low));
+    asm volatile( "mftbu %0" : "=r" (tbr_high));
+  } while ( tbr_high_old != tbr_high );
+
+  tbr = tbr_high;
+  tbr <<= 32;
+  tbr |= tbr_low;
+  return tbr;
+}
+
+void Timer_initialize()
+{
+  /*
+   *  Timer runs long and accurate enough not to require an interrupt.
+   */
+
+
+  Timer_driver_Start_time = PPC_Get_timebase_register();
+  
+
+}
+
+#define AVG_OVERHEAD     24  /* It typically takes 24 instructions */
+                             /*     to start/stop the timer. */
+#define LEAST_VALID       1  /* Don't trust a value lower than this */
+                             /* psim can count instructions. :) */
+
+int Read_timer()
+{
+  rtems_unsigned64  clicks;
+  rtems_unsigned64  total64;
+  rtems_unsigned32  total;
+
+  /* approximately CLOCK_SPEED clicks per microsecond */
+
+  clicks = PPC_Get_timebase_register();
+
+  assert( clicks > Timer_driver_Start_time );
+
+  total64 = clicks - Timer_driver_Start_time;
+
+  assert( total64 <= 0xffffffff );  /* fits into a unsigned32 */
+
+  total = (rtems_unsigned32) total64;
+
+  if ( Timer_driver_Find_average_overhead == 1 )
+    return total;          /* in one microsecond units */
+
+  if ( total < LEAST_VALID )
+    return 0;            /* below timer resolution */
+
+  return total - AVG_OVERHEAD;
+}
+
+rtems_status_code Empty_function( void )
+{
+  return RTEMS_SUCCESSFUL;
+}
+
+void Set_find_average_overhead(
+  rtems_boolean find_flag
+)
+{
+  Timer_driver_Find_average_overhead = find_flag;
+}
Index: c/src/lib/libbsp/powerpc/psim/tools/Makefile.in
===================================================================
--- c/src/lib/libbsp/powerpc/psim/tools/Makefile.in	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
+++ c/src/lib/libbsp/powerpc/psim/tools/Makefile.in	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
@@ -0,0 +1,25 @@
+#
+# $Id$
+#
+
+@SET_MAKE@
+srcdir = @srcdir@
+top_srcdir = @top_srcdir@
+VPATH=@srcdir@
+
+include $(RTEMS_CUSTOM)
+include $(PROJECT_ROOT)/make/leaf.cfg
+
+DESTDIR=$(PROJECT_RELEASE)/tests
+
+PGMS=runtest
+
+INSTALLED=$(PGMS:%=$(DESTDIR)/%)
+
+all:	$(DESTDIR) $(PGMS) install
+
+install:  $(INSTALLED)
+
+# Install the program
+$(DESTDIR)/%: %
+	$(make-script)
Index: c/src/lib/libbsp/powerpc/psim/tools/runtest
===================================================================
--- c/src/lib/libbsp/powerpc/psim/tools/runtest	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
+++ c/src/lib/libbsp/powerpc/psim/tools/runtest	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
@@ -0,0 +1,283 @@
+#!/bin/sh -p
+#
+#  $Id$
+#
+# Run rtems tests on the hppa simulator
+# This program generates a simulator script to run each test
+# Typically the test is then run, although it can be generated
+# and left as a file using -s
+#
+
+# progname=`basename $0`
+progname=${0##*/}        # fast basename hack for ksh, bash
+
+USAGE=\
+"usage: $progname [ -opts ] test [ test ... ]
+        -o options  -- specify options to be passed to simulator
+	-v	    -- verbose
+        -d          -- generate device tree file (as 'test'.device) and exit
+        -l logdir   -- specify log directory (default is 'logdir')
+
+  Specify test as 'test' or 'test.exe'.
+  All multiprocessing tests *must* be specified simply as 'mp01', etc.
+"
+
+# export everything
+set -a
+
+#   log an error to stderr
+prerr()
+{
+    echo "$*" >&2
+}
+
+fatal() {
+    [ "$1" ] && prerr $*
+    prerr "$USAGE"
+    exit 1
+}
+
+warn() {
+    [ "$1" ] && prerr $*
+}
+
+# print args, 1 per line
+ml_echo()
+{
+    for l
+    do
+       echo "$l"
+    done
+}
+
+# run at normal and signalled exit
+test_exit()
+{
+    exit_code=$1
+
+    rm -f ${logfile}.tmp*
+    [ "$sim_pid" ] && kill -9 $sim_pid
+
+    exit $exit_code
+}
+
+#
+# process the options
+#
+# defaults for getopt vars
+#
+# max_run_time is defaulted to 5 minutes
+#
+
+verbose=""
+extra_options=""
+device_and_exit=""
+stdio_setup="yes"
+run_to_completion="yes"
+logdir=log
+update_on_tick="no"
+max_run_time=$((5 * 60))
+using_print_buffer="yes"
+#simulator=/usr1/rtems/work/ada/4.00/ppc_src/b-gdb/sim/ppc/run
+simulator=powerpc-rtems-run 
+instruction_limit=1000000000
+sizeof_ram=4194304
+
+while getopts vdl:o:s: OPT
+do
+    case "$OPT" in
+	v)
+	    verbose="yes";;
+	d)
+	    device_and_exit="yes"
+            run_to_completion="no"
+            stdio_setup="no";;
+        l)
+            logdir="$OPTARG";;
+        o)
+            extra_options="$OPTARG";;
+        r)
+            sizeof_ram="$OPTARG";;
+        s)
+            simulator="$OPTARG";;
+        *)
+            fatal;;
+    esac
+done
+
+let $((shiftcount = $OPTIND - 1))
+shift $shiftcount
+
+args=$*
+
+#
+#  Check some parameters
+#
+
+# JRS CHANGE 
+# if [ ! -x ${simulator} ] ; then
+#    fatal "${simulator} is not executable"
+# fi;
+
+#
+# Run the tests
+#
+
+tests="$args"
+if [ ! "$tests" ]
+then
+     set -- `echo *.exe`
+     tests="$*"
+fi
+
+[ -d $logdir ] ||
+  mkdir $logdir || fatal "could not create log directory ($logdir)"
+
+# where the tmp files go
+trap "test_exit" 1 2 3 13 14 15
+
+for tfile in $tests
+do
+
+   tname=`basename $tfile .exe`
+   cpus="1"
+   TEST_TYPE="single"
+
+   case $tname in
+       # size is no longer interactive.
+       monitor| termios)
+            if [ $run_to_completion = "yes" ]
+            then
+                 warn "Skipping $tname; it is interactive"
+                 continue
+            fi
+            ;;
+       *-node2*)
+           warn "Skipping $tname; 'runtest' runs both nodes when for *-node1"
+           continue;;
+       *-node1*)
+           warn "Running both nodes associated with $tname"
+           tname=`echo $tname | sed 's/-node.*//'`
+           TEST_TYPE="mp"
+           ;;
+       stackchk*|spfatal*|malloctest*)
+           continue
+           ;;
+   esac
+
+   if [ $TEST_TYPE = "mp" ]
+   then
+       cpus="1 2"
+
+       logfile1=$logdir/${tname}_1
+       logfile2=$logdir/${tname}_2
+       infofile1=$logfile1.info
+       infofile2=$logfile2.info
+
+       rm -f ${logfile1} ${logfile2}
+
+       date=`date`
+       echo "Starting $tname at $date"
+
+       ${simulator} $extra_options -c ${instruction_limit} \
+           -o "/#address-cells 2" \
+           -o "/openprom/options/oea-memory-size ${sizeof_ram}" \
+           -o "/shm@0xc0000000/reg 0xc0000000 0x10000" \
+           -o "/shm@0xc0000000/key 0x1234" \
+           -o "/sem@0xc0010000/reg 0xc0010000 12" \
+           -o "/sem@0xc0010000/key 0x1234" \
+           -o "/sem@0xc0010000/value 1" ${tname}-node1.exe | \
+         sed -e 's/
+//' -e '/^$/d' > ${logfile1} &
+
+       ${simulator} $extra_options -c ${instruction_limit} \
+           -o "/#address-cells 2" \
+           -o "/openprom/options/oea-memory-size ${sizeof_ram}" \
+           -o "/shm@0xc0000000/reg 0xc0000000 0x10000" \
+           -o "/shm@0xc0000000/key 0x1234" \
+           -o "/sem@0xc0010000/reg 0xc0010000 12" \
+           -o "/sem@0xc0010000/key 0x1234" \
+           -o "/sem@0xc0010000/value -1" ${tname}-node2.exe | \
+         sed -e 's/
+//' -e '/^$/d' > ${logfile2} &
+
+       wait
+
+   fi
+
+   if [ $TEST_TYPE = "single" ]
+   then
+     logfile=$logdir/${tname}_1
+     infofile=$logfile.info
+
+     rm -f ${logfile}.tmp*
+
+     date=`date`
+     echo "Starting $tname at $date"
+
+     # Generate a device file to get the work done.
+     # The device file must do the following:
+     #
+     #       arrange for more memory (2 Mb)
+
+     if [ "$device_and_exit" = "yes" ]
+     then
+          fatal "Cannot currently generate device files"
+     fi
+
+     # Spin off the simulator in the background
+     #   -c sets an instruction limit
+
+     # Don't need to make sure it won't run forever... since there is
+     # an instruction count limit
+
+     #powerpc-rtems-run $extra_options -c ${instruction_limit} \
+     #     -f ${devicefile} $tfile | sed -e 's/
+//' -e '/^$/d' > ${logfile}
+
+     ${simulator} $extra_options -c ${instruction_limit} \
+           -o "/#address-cells 2" \
+           -o "/openprom/options/oea-memory-size ${sizeof_ram}" \
+           $tfile | sed -e 's/
+//' -e '/^$/d' > ${logfile}
+   fi
+
+   # Create the info files
+   for cpu in $cpus
+   do
+   {
+       echo "$date"
+       echo "Test run on: `uname -n`"
+       echo "Host Information:"
+       echo `uname -a`
+       echo
+
+       #sed -e 's/
+//' < ${logdir}/${tname}_${cpu}
+       cat ${logdir}/${tname}_${cpu}
+
+       if [ "$ran_too_long" = "yes" ]
+       then
+           echo "Test did NOT finish normally; killed after $max_run_time seconds"
+       fi
+
+       echo
+       date;
+   } > ${logdir}/${tname}_${cpu}.info
+   done
+
+   if [ "$cpus" = "1" ]
+   then
+        mv ${infofile} $logdir/${tname}.info
+        mv ${logfile}  $logdir/${tname}
+   fi
+
+done
+
+echo "Tests completed at " `date`
+test_exit 0
+
+# Local Variables: ***
+# mode:ksh ***
+# End: ***
+
Index: c/src/lib/libbsp/powerpc/psim/vectors/Makefile.in
===================================================================
--- c/src/lib/libbsp/powerpc/psim/vectors/Makefile.in	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
+++ c/src/lib/libbsp/powerpc/psim/vectors/Makefile.in	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
@@ -0,0 +1,59 @@
+#
+#  $Id$
+#
+
+@SET_MAKE@
+srcdir = @srcdir@
+VPATH = @srcdir@
+RTEMS_ROOT = @top_srcdir@
+PROJECT_ROOT = @PROJECT_ROOT@
+
+PGM=${ARCH}/vectors.rel
+
+# C source names, if any, go here -- minus the .c
+C_PIECES=
+C_FILES=$(C_PIECES:%=%.c)
+C_O_FILES=$(C_PIECES:%=${ARCH}/%.o)
+
+H_FILES=
+
+# Assembly source names, if any, go here -- minus the .s
+S_PIECES=align_h vectors
+S_FILES=$(S_PIECES:%=%.s)
+S_O_FILES=$(S_FILES:%.s=${ARCH}/%.o)
+
+SRCS=$(C_FILES) $(CC_FILES) $(H_FILES) $(S_FILES)
+OBJS=$(C_O_FILES) $(CC_O_FILES) $(S_O_FILES)
+
+include $(RTEMS_ROOT)/make/custom/$(RTEMS_BSP).cfg
+include $(RTEMS_ROOT)/make/leaf.cfg
+
+#
+# (OPTIONAL) Add local stuff here using +=
+#
+
+DEFINES  +=
+CPPFLAGS +=
+CFLAGS   +=
+
+LD_PATHS  +=
+LD_LIBS   +=
+LDFLAGS   +=
+
+#
+# Add your list of files to delete here.  The config files
+#  already know how to delete some stuff, so you may want
+#  to just run 'make clean' first to see what gets missed.
+#  'make clobber' already includes 'make clean'
+#
+
+CLEAN_ADDITIONS +=
+CLOBBER_ADDITIONS +=
+
+${PGM}: ${SRCS} ${OBJS}
+	$(make-rel)
+
+all:	${ARCH} $(SRCS) $(PGM)
+
+# the .rel file built here will be put into libbsp.a by ../wrapup/Makefile
+install:  all
Index: c/src/lib/libbsp/powerpc/psim/vectors/README
===================================================================
--- c/src/lib/libbsp/powerpc/psim/vectors/README	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
+++ c/src/lib/libbsp/powerpc/psim/vectors/README	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
@@ -0,0 +1,25 @@
+#
+#  $Id$
+#
+
+The location of the vectors file object is critical.
+
+From the comments at the head of vectors.s:
+
+  The issue with this file is getting it loaded at the right place.
+  The first vector MUST be at address 0x????0100.
+  How this is achieved is dependant on the tool chain.
+
+  However the basic mechanism for ELF assemblers is to create a
+  section called ".vectors", which will be loaded to an address
+  between 0x????0000 and 0x????0100 (inclusive) via a link script.
+
+  The basic mechanism for XCOFF assemblers is to place it in the
+  normal text section, and arrange for this file to be located
+  at an appropriate position on the linker command line.
+
+  The variable 'PPC_VECTOR_FILE_BASE' must be defined to be the
+  offset from 0x????0000 to the first location in the file.  This
+  will usually be 0x0000 or 0x0100.
+
+Andrew Bray 18/8/1995
Index: c/src/lib/libbsp/powerpc/psim/vectors/align_h.s
===================================================================
--- c/src/lib/libbsp/powerpc/psim/vectors/align_h.s	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
+++ c/src/lib/libbsp/powerpc/psim/vectors/align_h.s	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
@@ -0,0 +1,434 @@
+/*  align_h.s	1.1 - 95/12/04
+ *
+ *  This file contains the assembly code for the PowerPC 403
+ *  alignment exception handler for RTEMS.
+ *
+ *  Based upon IBM provided code with the following release:
+ *
+ *  This source code has been made available to you by IBM on an AS-IS
+ *  basis.  Anyone receiving this source is licensed under IBM
+ *  copyrights to use it in any way he or she deems fit, including
+ *  copying it, modifying it, compiling it, and redistributing it either
+ *  with or without modifications.  No license under IBM patents or
+ *  patent applications is to be implied by the copyright license.
+ *
+ *  Any user of this software should understand that IBM cannot provide
+ *  technical support for this software and will not be responsible for
+ *  any consequences resulting from the use of this software.
+ *
+ *  Any person who transfers this source code or any derivative work
+ *  must include the IBM copyright notice, this paragraph, and the
+ *  preceding two paragraphs in the transferred software.
+ *
+ *      COPYRIGHT   I B M   CORPORATION 1995
+ *      LICENSED MATERIAL  -  PROGRAM PROPERTY OF I B M
+ *
+ * Modifications:
+ *
+ *  Author:	Andrew Bray <andy@i-cubed.co.uk>
+ *
+ *  COPYRIGHT (c) 1995 by i-cubed ltd.
+ *
+ *  To anyone who acknowledges that this file is provided "AS IS"
+ *  without any express or implied warranty:
+ *      permission to use, copy, modify, and distribute this file
+ *      for any purpose is hereby granted without fee, provided that
+ *      the above copyright notice and this notice appears in all
+ *      copies, and that the name of i-cubed limited not be used in
+ *      advertising or publicity pertaining to distribution of the
+ *      software without specific, written prior permission.
+ *      i-cubed limited makes no representations about the suitability
+ *      of this software for any purpose.
+ *
+ *  $Id$
+ */
+
+#include "asm.h"
+#include "bsp.h"
+
+.set    CACHE_SIZE,16           # cache line size of 32 bytes
+.set    CACHE_SIZE_L2,4         # cache line size, log 2
+
+.set	Open_gpr0,0
+.set	Open_gpr1,4
+.set	Open_gpr2,8
+.set	Open_gpr3,12
+.set	Open_gpr4,16
+.set	Open_gpr5,20
+.set	Open_gpr6,24
+.set	Open_gpr7,28
+.set	Open_gpr8,32
+.set	Open_gpr9,36
+.set	Open_gpr10,40
+.set	Open_gpr11,44
+.set	Open_gpr12,48
+.set	Open_gpr13,52
+.set	Open_gpr14,56
+.set	Open_gpr15,60
+.set	Open_gpr16,64
+.set	Open_gpr17,68
+.set	Open_gpr18,72
+.set	Open_gpr19,76
+.set	Open_gpr20,80
+.set	Open_gpr21,84
+.set	Open_gpr22,88
+.set	Open_gpr23,92
+.set	Open_gpr24,96
+.set	Open_gpr25,100
+.set	Open_gpr26,104
+.set	Open_gpr27,108
+.set	Open_gpr28,112
+.set	Open_gpr29,116
+.set	Open_gpr30,120
+.set	Open_gpr31,124
+.set	Open_xer,128
+.set	Open_lr,132
+.set	Open_ctr,136
+.set	Open_cr,140
+.set	Open_srr2,144
+.set	Open_srr3,148
+.set	Open_srr0,152
+.set	Open_srr1,156
+
+
+/*
+ *  This code makes several assumptions for processing efficiency
+ *  *  General purpose registers are continuous in the image, beginning with
+ *     Open_gpr0
+ *  *  Hash table is highly dependent on opcodes - opcode changes *will*
+ *     require rework of the instruction decode mechanism.
+ */
+
+        .text
+        .globl  align_h
+
+	.align	CACHE_SIZE_L2
+align_h:
+        /*-----------------------------------------------------------------------
+         * Store GPRs in Open Reg save area
+         * Set up r2 as base reg, r1 pointing to Open Reg save area
+         *----------------------------------------------------------------------*/
+        stmw    r0,ALIGN_REGS(r0)
+	li	r1,ALIGN_REGS
+        /*-----------------------------------------------------------------------
+         * Store special purpose registers in reg save area
+         *----------------------------------------------------------------------*/
+        mfxer   r7
+        mflr    r8
+        mfcr    r9
+        mfctr   r10
+        stw     r7,Open_xer(r1)
+        stw     r8,Open_lr(r1)
+        stw     r9,Open_cr(r1)
+        stw     r10,Open_ctr(r1)
+        mfspr	r7, srr2		/* SRR 2 */
+        mfspr	r8, srr3		/* SRR 3 */
+        mfspr	r9, srr0		/* SRR 0 */
+        mfspr	r10, srr1		/* SRR 1 */
+        stw     r7,Open_srr2(r1)
+        stw     r8,Open_srr3(r1)
+        stw     r9,Open_srr0(r1)
+        stw     r10,Open_srr1(r1)
+
+/*      Set up common registers */
+        mfspr	r5, dear		/* DEAR: R5 is data exception address */
+        lwz     r9,Open_srr0(r1)        /* get faulting instruction */
+        addi    r7,r9,4                 /* bump instruction */
+        stw     r7,Open_srr0(r1)        /* restore to image */
+        lwz     r9, 0(r9)               /* retrieve actual instruction */
+        rlwinm  r6,r9,18,25,29          /* r6 is RA * 4 field from instruction */
+        rlwinm  r7,r9,6,26,31           /* r7 is primary opcode */
+        bl      ref_point               /* establish addressibility */
+ref_point:
+        mflr    r11                     /* r11 is the anchor point for ref_point */
+        addi    r10, r7, -31            /* r10 = r7 - 31 */
+        rlwinm  r10,r10,2,2,31          /* r10 *= 4 */
+        add     r10, r10, r11           /* r10 += anchor point */
+        lwz     r10, primary_jt-ref_point(r10)
+        mtlr    r10
+        rlwinm  r8,r9,13,25,29          /* r8 is RD * 4 */
+        la      r7,Open_gpr0(r1)        /* r7 is address of GPR 0 in list */
+        blr
+primary_jt:
+        .long   xform
+        .long   lwz
+        .long   lwzu
+        .long   0
+        .long   0
+        .long   stw
+        .long   stwu
+        .long   0
+        .long   0
+        .long   lhz
+        .long   lhzu
+        .long   lha
+        .long   lhau
+        .long   sth
+        .long   sthu
+        .long   lmw
+        .long   stmw
+/*
+ *   handlers
+ */
+/*
+ * xform instructions require an additional decode.  Fortunately, a relatively
+ * simple hash step breaks the instructions out with no collisions
+ */
+xform:
+        rlwinm  r7,r9,31,22,31          /* r7 is secondary opcode */
+        rlwinm  r10,r7,27,5,31          /* r10 = r7 >> 5 */
+        add     r10,r7,r10              /* r10 = r7 + r10 */
+        rlwinm  r10,r10,2,25,29         /* r10 = (r10 & 0x1F) * 4 */
+        add     r10,r10,r11             /* r10 += anchor point */
+        lwz     r10, secondary_ht-ref_point(r10)
+        mtlr    r10
+        la      r7,Open_gpr0(r1)        /* r7 is address of GPR 0 in list */
+        rlwinm  r8,r9,13,25,29          /* r8 is RD * 4 */
+        blrl
+
+secondary_ht:
+        .long   lhzux                   /* b 0  0x137 */
+        .long   lhax                    /* b 1  0x157 */
+        .long   lhaux                   /* b 2  0x177 */
+        .long   sthx                    /* b 3  0x197 */
+        .long   sthux                   /* b 4  0x1b7 */
+        .long   0                       /* b 5 */
+        .long   lwbrx                   /* b 6  0x216 */
+        .long   0                       /* b 7 */
+        .long   0                       /* b 8 */
+        .long   0                       /* b 9 */
+        .long   stwbrx                  /* b A  0x296 */
+        .long   0                       /* b B */
+        .long   0                       /* b C */
+        .long   0                       /* b D */
+        .long   lhbrx                   /* b E   0x316 */
+        .long   0                       /* b F */
+        .long   0                       /* b 10 */
+        .long   0                       /* b 11 */
+        .long   sthbrx                  /* b 12  0x396 */
+        .long   0                       /* b 13 */
+        .long   lwarx                   /* b 14  0x014 */
+        .long   dcbz                    /* b 15  0x3f6 */
+        .long   0                       /* b 16 */
+        .long   lwzx                    /* b 17  0x017 */
+        .long   lwzux                   /* b 18  0x037 */
+        .long   0                       /* b 19 */
+        .long   stwcx                   /* b 1A  0x096 */
+        .long   stwx                    /* b 1B  0x097 */
+        .long   stwux                   /* b 1C  0x0B7 */
+        .long   0                       /* b 1D */
+        .long   0                       /* b 1E */
+        .long   lhzx                    /* b 1F 0x117 */
+
+/*
+ * for all handlers
+ *       r4 - Addressability to interrupt context
+ *       r5 - DEAR address (faulting data address)
+ *       r6 - RA field * 4
+ *       r7 - Address of GPR 0 in image
+ *       r8 - RD field * 4
+ *       r9 - Failing instruction
+ */
+
+/*       Load halfword algebraic with update */
+lhau:
+/*       Load halfword algebraic with update indexed */
+lhaux:
+        stwx    r5,r7,r6                /* update RA with effective addr */
+
+/*       Load halfword algebraic */
+lha:
+/*       Load halfword algebraic indexed */
+lhax:
+        lswi    r10,r5,2                /* load two bytes into r10 */
+        srawi   r10,r10,16              /* shift right 2 bytes, extending sign */
+        stwx    r10,r7,r8               /* update reg image */
+        b       align_complete          /* return */
+
+/*       Load Half Word Byte-Reversed Indexed */
+lhbrx:
+        lswi    r10,r5,2                /* load two bytes from DEAR into r10 */
+        rlwinm  r10,r10,0,0,15          /* mask off lower 2 bytes */
+        stwbrx  r10,r7,r8               /* store reversed in reg image */
+        b       align_complete          /* return */
+
+/*       Load Half Word and Zero with Update */
+lhzu:
+/*       Load Half Word and Zero with Update Indexed */
+lhzux:
+        stwx    r5,r7,r6                /* update RA with effective addr */
+
+/*       Load Half Word and Zero */
+lhz:
+/*       Load Half Word and Zero Indexed */
+lhzx:
+        lswi    r10,r5,2                /* load two bytes from DEAR into r10 */
+        rlwinm  r10,r10,16,16,31        /* shift right 2 bytes, with zero fill */
+        stwx    r10,r7,r8               /* update reg image */
+        b       align_complete          /* return */
+
+/*
+ *       Load Multiple Word
+ */
+lmw:
+        lwzx    r9,r6,r7                /* R9 contains saved value of RA */
+        addi    r10,r7,32*4             /* r10 points to r31 in image  + 4 */
+        rlwinm  r8,r8,30,2,31           /* r8 >>= 2  (recovers RT) */
+        subfic  r8,r8,32                /* r8 is reg count to load */
+        mtctr   r8                      /* load counter */
+        addi    r8,r8,-1                /* r8-- */
+        rlwinm  r8,r8,2,2,31            /* r8 *= 4 */
+        add     r5,r5,r8                /* update DEAR to point to last reg */
+lwmloop:
+        lswi    r11,r5,4                /* load r11 with 4 bytes from DEAR */
+        stwu    r11,-4(r10)             /* load image and decrement pointer */
+        addi    r5,r5,-4                /* decrement effective address */
+        bdnz    lwmloop
+        stwx    r9,r6,r7                /* restore RA (in case it was trashed) */
+        b       align_complete          /* return */
+
+/*
+ *       Load Word and Reserve Indexed
+ */
+lwarx:
+        lswi    r10,r5,4                /* load four bytes from DEAR into r10 */
+        stwx    r10,r7,r8               /* update reg image */
+        rlwinm  r5,r5,0,0,29            /* Word align address */
+        lwarx   r10,0,r5                /* Set reservation */
+        b       align_complete          /* return */
+
+/*
+ *       Load Word Byte-Reversed Indexed
+ */
+lwbrx:
+        lswi    r10,r5,4                /* load four bytes from DEAR into r10 */
+        stwbrx  r10,r7,r8               /* store reversed in reg image */
+        b       align_complete          /* return */
+
+/*       Load Word and Zero with Update */
+lwzu:
+/*       Load Word and Zero with Update Indexed */
+lwzux:
+        stwx    r5,r7,r6                /* update RA with effective addr */
+
+/*       Load Word and Zero */
+lwz:
+/*       Load Word and Zero Indexed */
+lwzx:
+        lswi    r10,r5,4                /* load four bytes from DEAR into r10 */
+        stwx    r10,r7,r8               /* update reg image */
+        b       align_complete          /* return */
+
+/*    Store instructions */
+
+/* */
+/*       Store Half Word and Update */
+sthu:
+/*       Store Half Word and Update Indexed */
+sthux:
+        stwx    r5,r7,r6                /* Update RA with effective address */
+
+/*       Store Half Word */
+sth:
+/*       Store Half Word Indexed */
+sthx:
+        lwzx    r10,r8,r7               /* retrieve source register value */
+        rlwinm  r10,r10,16,0,15         /* move two bytes to high end of reg */
+        stswi   r10,r5,2                /* store bytes to DEAR address */
+        b       align_complete          /* return */
+
+/* */
+/*       Store Half Word Byte-Reversed Indexed */
+sthbrx:
+        lwbrx   r10,r8,r7               /* retrieve src reg value byte reversed */
+        stswi   r10,r5,2                /* move two bytes to DEAR address */
+        b       align_complete          /* return */
+
+/* */
+/*       Store Multiple Word */
+stmw:
+        addi    r10,r7,32*4             /* r10 points to r31 in image  + 4 */
+        rlwinm  r8,r8,30,2,31           /* r8 >>= 2  (recovers RT) */
+        subfic  r8,r8,32                /* r8 is reg count to load */
+        mtctr   r8                      /* load counter */
+        addi    r8,r8,-1                /* r8-- */
+        rlwinm  r8,r8,2,2,31            /* r8 *= 4 */
+        add     r5,r5,r8                /* update DEAR to point to last reg */
+stmloop:
+        lwzu    r11,-4(r10)             /* get register value */
+        stswi   r11,r5,4                /* output to DEAR address */
+        addi    r5,r5,-4                /* decrement effective address */
+        bdnz    stmloop
+        b       align_complete          /* return */
+
+/* */
+/*       Store Word and Update */
+stwu:
+/*       Store Word and Update Indexed */
+stwux:
+        stwx    r5,r7,r6                /* Update RA with effective address */
+
+/*       Store Word */
+stw:
+/*       Store Word Indexed */
+stwx:
+        lwzx    r10,r8,r7               /* retrieve source register value */
+        stswi   r10,r5,4                /* store bytes to DEAR address */
+        b       align_complete          /* return */
+
+/* */
+/*       Store Word Byte-Reversed Indexed */
+stwbrx:
+        lwbrx   r10,r8,r7               /* retrieve src reg value byte reversed */
+        stswi   r10,r5,4                /* move two bytes to DEAR address */
+        b       align_complete          /* return */
+
+/* */
+/*       Store Word Conditional Indexed */
+stwcx:
+        rlwinm  r10,r5,0,0,29           /* r10 = word aligned DEAR */
+        lwz     r11,0(r10)              /* save original value of store */
+        stwcx.  r11,r0,r10              /* attempt store to address */
+        bne     stwcx_moveon            /* store failed, move on */
+        stw     r11,0(r10)              /* repair damage */
+        lwzx    r9,r7,r8                /* get register value */
+        stswi   r10,r5,4                /* store bytes to DEAR address */
+stwcx_moveon:
+        mfcr    r11                     /* get condition reg */
+        lwz     r9,Open_cr(r1)          /* get condition reg image */
+        rlwimi  r9,r11,0,0,2            /* insert 3 CR bits into cr image */
+        lwz     r11,Open_xer(r1)        /* get XER reg */
+        rlwimi  r9,r11,29,2,2           /* insert XER SO bit into cr image */
+        stw     r9,Open_cr(r1)          /* store cr image */
+        b       align_complete          /* return */
+
+/* */
+/*       Data Cache Block Zero */
+dcbz:
+        rlwinm  r5,r5,0,0,31-CACHE_SIZE_L2
+                                        /* get address to nearest Cache line */
+        addi    r5,r5,-4                /* adjust by a word */
+        addi    r10,r0,CACHE_SIZE/4     /* set counter value */
+        mtctr   r10
+        addi    r11,r0,0                /* r11 = 0 */
+dcbz_loop:
+        stwu    r11,4(r5)               /* store a word and update EA */
+        bdnz    dcbz_loop
+        b       align_complete          /* return */
+
+align_complete:
+        /*-----------------------------------------------------------------------
+         * Restore regs and return from the interrupt
+         *----------------------------------------------------------------------*/
+        lmw     r24,Open_xer+ALIGN_REGS(r0)
+        mtxer   r24
+        mtlr    r25
+        mtctr   r26
+        mtcrf   0xFF, r27
+        mtspr	srr2, r28		/* SRR 2 */
+        mtspr	srr3, r29		/* SRR 3 */
+        mtspr	srr0, r30		/* SRR 0 */
+        mtspr	srr1, r31		/* SRR 1 */
+        lmw     r1,Open_gpr1+ALIGN_REGS(r0)
+        lwz     r0,Open_gpr0+ALIGN_REGS(r0)
+        rfi
Index: c/src/lib/libbsp/powerpc/psim/vectors/vectors.s
===================================================================
--- c/src/lib/libbsp/powerpc/psim/vectors/vectors.s	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
+++ c/src/lib/libbsp/powerpc/psim/vectors/vectors.s	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
@@ -0,0 +1,116 @@
+/*  vectors.s	1.1 - 95/12/04
+ *
+ *  This file contains the assembly code for the PowerPC 
+ *  interrupt veneers for RTEMS.
+ *
+ */
+
+/*
+ *  The issue with this file is getting it loaded at the right place.
+ *  The first vector MUST be at address 0x????0100.
+ *  How this is achieved is dependant on the tool chain.
+ *
+ *  However the basic mechanism for ELF assemblers is to create a
+ *  section called ".vectors", which will be loaded to an address
+ *  between 0x????0000 and 0x????0100 (inclusive) via a link script.
+ *
+ *  The basic mechanism for XCOFF assemblers is to place it in the
+ *  normal text section, and arrange for this file to be located
+ *  at an appropriate position on the linker command line.
+ *
+ *  The variable 'PPC_VECTOR_FILE_BASE' must be defined to be the
+ *  offset from 0x????0000 to the first location in the file.  This
+ *  will usually be 0x0000 or 0x0100.
+ *
+ *  $Id$
+ */
+
+#include "asm.h"
+
+#ifndef PPC_VECTOR_FILE_BASE
+#error "PPC_VECTOR_FILE_BASE is not defined."
+#endif
+
+	/* Where this file will be loaded */
+	.set	file_base, PPC_VECTOR_FILE_BASE
+
+	/* Offset to store reg 0 */
+
+	.set	IP_LINK, 0
+#if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27)
+	.set	IP_0, (IP_LINK + 56)
+#else
+	.set	IP_0, (IP_LINK + 8)
+#endif
+	.set	IP_2, (IP_0 + 4)
+
+	.set	IP_3, (IP_2 + 4)
+	.set	IP_4, (IP_3 + 4)
+	.set	IP_5, (IP_4 + 4)
+	.set	IP_6, (IP_5 + 4)
+	
+	.set	IP_7, (IP_6 + 4)
+	.set	IP_8, (IP_7 + 4)
+	.set	IP_9, (IP_8 + 4)
+	.set	IP_10, (IP_9 + 4)
+	
+	.set	IP_11, (IP_10 + 4)
+	.set	IP_12, (IP_11 + 4)
+	.set	IP_13, (IP_12 + 4)
+	.set	IP_28, (IP_13 + 4)
+	
+	.set	IP_29, (IP_28 + 4)
+	.set	IP_30, (IP_29 + 4)
+	.set	IP_31, (IP_30 + 4)
+	.set	IP_CR, (IP_31 + 4)
+	
+	.set	IP_CTR, (IP_CR + 4)
+	.set	IP_XER, (IP_CTR + 4)
+	.set	IP_LR, (IP_XER + 4)
+	.set	IP_PC, (IP_LR + 4)
+	
+	.set	IP_MSR, (IP_PC + 4)
+	
+	.set	IP_END, (IP_MSR + 16)
+
+	/* Vector offsets			 */
+	.set    begin_vector,0xFFF00000
+	.set    crit_vector,0xFFF00100
+	.set    mach_vector,0xFFF00200
+	.set    prot_vector,0xFFF00300
+	.set    ext_vector,0xFFF00500
+	.set    align_vector,0xFFF00600
+	.set    prog_vector,0xFFF00700
+	.set    dec_vector,0xFFF00900
+	.set    sys_vector,0xFFF00C00
+	.set    pit_vector,0xFFF01000
+	.set    fit_vector,0xFFF01010
+	.set    wadt_vector,0xFFF01020
+	.set    debug_vector,0xFFF02000
+
+/* Go to the right section */
+#if PPC_ASM == PPC_ASM_ELF
+	.section .vectors,"awx",@progbits
+#elif PPC_ASM == PPC_ASM_XCOFF
+	.csect	.text[PR]
+#endif
+
+	PUBLIC_VAR (__vectors)
+SYM (__vectors):
+	
+/* Decrementer interrupt */
+	.org	dec_vector - file_base
+#if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27)
+#if (PPC_HAS_FPU)
+	stwu	r1, -(20*4 + 18*8 + IP_END)(r1)
+#else
+	stwu	r1, -(20*4 + IP_END)(r1)
+#endif
+#else
+	stwu	r1, -(IP_END)(r1)
+#endif
+	stw	r0, IP_0(r1)
+
+	li      r0, PPC_IRQ_DECREMENTER
+	b       PROC (_ISR_Handler)
+
Index: c/src/lib/libbsp/powerpc/psim/wrapup/Makefile.in
===================================================================
--- c/src/lib/libbsp/powerpc/psim/wrapup/Makefile.in	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
+++ c/src/lib/libbsp/powerpc/psim/wrapup/Makefile.in	(revision 89611889fe6e255dec90a5157a4f25c0f65057b4)
@@ -0,0 +1,59 @@
+#
+#  $Id$
+#
+
+@SET_MAKE@
+srcdir = @srcdir@
+VPATH = @srcdir@
+RTEMS_ROOT = @top_srcdir@
+PROJECT_ROOT = @PROJECT_ROOT@
+
+BSP_PIECES=startup clock console shmsupp timer vectors
+# pieces to pick up out of libcpu/ppc
+CPU_PIECES=
+GENERIC_PIECES=
+
+ifeq ($(HAS_MP),yes)
+GENERIC_PIECES += shmdr
+BSP_PIECES += shmsupp
+endif
+
+# bummer; have to use $foreach since % pattern subst rules only replace 1x
+OBJS=$(foreach piece, $(BSP_PIECES), ../$(piece)/$(ARCH)/$(piece).rel) \
+     $(foreach piece, $(CPU_PIECES), \
+         ../../../../libcpu/$(RTEMS_CPU)/$(piece)/$(ARCH)/$(piece).rel) \
+     $(foreach piece, $(GENERIC_PIECES), \
+         ../../../$(piece)/$(ARCH)/$(piece).rel)
+LIB=$(ARCH)/libbsp.a
+
+include $(RTEMS_ROOT)/make/custom/$(RTEMS_BSP).cfg
+include $(RTEMS_ROOT)/make/lib.cfg
+
+#
+# (OPTIONAL) Add local stuff here using +=
+#
+
+DEFINES  +=
+CPPFLAGS +=
+CFLAGS   +=
+
+LD_PATHS  +=
+LD_LIBS   +=
+LDFLAGS   +=
+
+#
+# Add your list of files to delete here.  The config files
+#  already know how to delete some stuff, so you may want
+#  to just run 'make clean' first to see what gets missed.
+#  'make clobber' already includes 'make clean'
+#
+
+CLEAN_ADDITIONS +=
+CLOBBER_ADDITIONS +=
+
+$(LIB): ${OBJS}
+	$(make-library)
+
+all:	${ARCH} $(SRCS) $(LIB)
+	$(INSTALL_VARIANT) -m 644 $(LIB) ${PROJECT_RELEASE}/lib
+
