Changeset 8937f12 in rtems


Ignore:
Timestamp:
May 31, 2020, 2:22:54 PM (11 months ago)
Author:
Jan Sommer <jan.sommer@…>
Branches:
5, master
Children:
5d4a1edc
Parents:
85d6a760
git-author:
Jan Sommer <jan.sommer@…> (05/31/20 14:22:54)
git-committer:
Chris Johns <chrisj@…> (06/11/20 03:29:03)
Message:

bsp/pc386: Update context switch and restore

Uses similar flow in cpu_asm.S for i386 as for arm.

Location:
cpukit/score/cpu/i386
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • cpukit/score/cpu/i386/cpu_asm.S

    r85d6a760 r8937f12  
    5252SYM (_CPU_Context_switch):
    5353        movl      RUNCONTEXT_ARG(esp),eax  /* eax = running threads context */
     54        GET_SELF_CPU_CONTROL edx           /* edx has address for per_CPU information */
     55        movl      PER_CPU_ISR_DISPATCH_DISABLE(edx),ecx
    5456        pushf                              /* push eflags */
    5557        popl      REG_EFLAGS(eax)          /* save eflags */
     
    5961        movl      esi,REG_ESI(eax)         /* save source register */
    6062        movl      edi,REG_EDI(eax)         /* save destination register */
     63        movl      ecx, I386_CONTEXT_CONTROL_ISR_DISPATCH_DISABLE(eax)
     64
     65        movl      eax,ecx                  /* ecx = running threads context */
     66        movl      HEIRCONTEXT_ARG(esp),eax /* eax = heir threads context */
    6167
    6268#ifdef RTEMS_SMP
    63         /* The executing context no longer executes on this processor */
    64         movb      $0, I386_CONTEXT_CONTROL_IS_EXECUTING_OFFSET(eax)
    65 #endif
    66 
    67         movl      HEIRCONTEXT_ARG(esp),eax /* eax = heir threads context */
    68 
    69 #ifdef RTEMS_SMP
    70         /* Wait for heir context to stop execution */
    71 1:
    72         movb      I386_CONTEXT_CONTROL_IS_EXECUTING_OFFSET(eax), bl
    73         testb     bl, bl
    74         jne       1b
    75 
    76         /* The heir context executes now on this processor */
    77         movb      $1, I386_CONTEXT_CONTROL_IS_EXECUTING_OFFSET(eax)
    78 #endif
    79 
    80 restore:
     69      /*
     70       * The executing thread no longer executes on this processor.  Switch
     71       * the stack to the temporary interrupt stack of this processor.  Mark
     72       * the context of the executing thread as not executing.
     73       */
     74        leal      PER_CPU_INTERRUPT_FRAME_AREA + CPU_INTERRUPT_FRAME_SIZE(edx),esp
     75        movb      $0, I386_CONTEXT_CONTROL_IS_EXECUTING_OFFSET(ecx)
     76
     77.L_check_is_executing:
     78        lock bts  $0,I386_CONTEXT_CONTROL_IS_EXECUTING_OFFSET(eax)  /* Indicator in carry flag */
     79        jc        .L_get_potential_new_heir
     80#endif
     81
     82/* Start restoring context */
     83.L_restore:
     84        movl      I386_CONTEXT_CONTROL_ISR_DISPATCH_DISABLE(eax),ecx
     85        movl      ecx,PER_CPU_ISR_DISPATCH_DISABLE(edx)
    8186        pushl     REG_EFLAGS(eax)          /* push eflags */
    8287        popf                               /* restore eflags */
     
    111116SYM (_CPU_Context_restore):
    112117        movl      NEWCONTEXT_ARG(esp),eax  /* eax = running threads context */
    113         jmp       restore
     118        GET_SELF_CPU_CONTROL edx           /* edx has address for per_CPU information */
     119        jmp       .L_restore
     120
     121#ifdef RTEMS_SMP
     122
     123.L_get_potential_new_heir:
     124
     125        /* We may have a new heir */
     126
     127        /* Read the executing and heir */
     128        movl    PER_CPU_OFFSET_EXECUTING(edx),ebx
     129        movl    PER_CPU_OFFSET_HEIR(edx),esi
     130
     131        /*
     132         * Update the executing only if necessary to avoid cache line
     133         * monopolization.
     134         */
     135        cmp     esi,ebx
     136        je      .L_check_is_executing
     137
     138        /* Calculate the heir context pointer */
     139        addl    esi,eax
     140        subl    ebx,eax
     141
     142        /* Update the executing */
     143        movl    esi,PER_CPU_OFFSET_EXECUTING(edx)
     144
     145        jmp     .L_check_is_executing
     146#endif
    114147
    115148/*void _CPU_Context_save_fp_context( &fp_context_ptr )
  • cpukit/score/cpu/i386/include/rtems/score/cpu.h

    r85d6a760 r8937f12  
    116116#define I386_CONTEXT_CONTROL_GS_0_OFFSET 24
    117117#define I386_CONTEXT_CONTROL_GS_1_OFFSET 28
     118#define I386_CONTEXT_CONTROL_ISR_DISPATCH_DISABLE 32
    118119
    119120#ifdef RTEMS_SMP
    120   #define I386_CONTEXT_CONTROL_IS_EXECUTING_OFFSET 32
     121  #define I386_CONTEXT_CONTROL_IS_EXECUTING_OFFSET 36
    121122#endif
    122123
     
    137138  uint32_t    edi;        /* extended destination index flags register */
    138139  segment_descriptors gs; /* gs segment descriptor                     */
     140  uint32_t isr_dispatch_disable;
    139141#ifdef RTEMS_SMP
    140142  volatile bool is_executing;
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