Changeset 886b962 in rtems

Timestamp:
07/03/16 07:30:20 (8 years ago)
Author:
Pavel Pisa <pisa@…>
Branches:
4.11
Children:
a114f99b
Parents:
eb3af27
git-author:
Pavel Pisa <pisa@…> (07/03/16 07:30:20)
git-committer:
Pavel Pisa <pisa@…> (10/02/16 08:40:33)
Message:

bsp/arm: Report correct maximal cache line length for ARM Cortex-A + L2C-310.

Updates #2782
Updates #2783

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