Changeset 86dc490 in rtems
- Timestamp:
- Oct 5, 1998, 6:21:11 PM (22 years ago)
- Branches:
- 4.10, 4.11, 4.8, 4.9, 5, master
- Children:
- 41a890a
- Parents:
- fe64e9f
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
c/src/lib/libbsp/powerpc/helas403/README
rfe64e9f r86dc490 44 44 ===== 45 45 46 Board description 47 ----------------- 48 clock rate: 25 MHz 49 bus width: 8-bit PROM, 32-bit DRAM 50 ROM: Up to 512KByte (Am29F040), 90 nsec chip select 0 51 RAM: 4 to 32 MByte DRAM SIMM (autodetect), 70 nsec, 52 no parity, at CS7 or CS6+CS7 (for two-bank-SIMMs) 53 54 46 55 helas403 only supports single processor operations. 47 56 57 Porting 58 ------- 59 This board support package is written for a typical PPC403GA 60 system. The rough features of this board are described above. 48 61 62 This BSP contains files for two startup methods: 63 - Direct start from Flash after powerup (with code run out of flash): 64 This is the default configuration, it uses the files 65 flashentry/flashentry.s 66 startup/linkcmds 67 68 Please note, that this configuration is good to startup the system, 69 but it will not gain maximum performance due to slow Flash access (8 70 bit wide only) 71 72 - Start after software download into DRAM: 73 This configuration will use: 74 dlentry/dlentry.s 75 startup/linkcmds.dl 76 77 If you want to use the download configuration, it is sufficient to 78 rename the file "startup/linkcmds.dl" to "startup/linkcmds", it will 79 automatically reference the dlentry.s as entry code. (Renaming is not 80 quite elegant, a more sophisticated solution will follow in future, 81 any hints welcome ;-) 82 83 For adapting this BSP to other boards, the following files should be 84 modified: 85 86 - c/src/lib/libbsp/powerpc/helas403/flashentry/flashentry.s 87 for the memory controller configuration and other basic stuff 88 89 - c/src/lib/libbsp/powerpc/helas403/startup/linkcmds[.dl] 90 for the memory layout required 91 92 - c/src/lib/libbsp/powerpc/helas403/startup/bspstart.c 93 for adaption of BSP_Configuration. here you can select 94 the clock source for the timers and the serial interface 95 (system clock or external clock pin), the clock rates, initial 96 baud rate and other stuff 97 98 - c/src/lib/libbsp/powerpc/helas403/include/bsp.h 99 some BSP-related constants 100 101 The actual drivers are placed in 102 - c/src/lib/libcpu/powerpc/ppc403/* 103 well, they should be generic, so there _should_ be no reason 104 to mess around there (but who knows...) 105 106
Note: See TracChangeset
for help on using the changeset viewer.