Changeset 85f5c14b in rtems for c/src


Ignore:
Timestamp:
04/21/11 19:04:50 (13 years ago)
Author:
Jennifer Averett <Jennifer.Averett@…>
Branches:
4.11, 5, master
Children:
d7c3883
Parents:
0e89af8
Message:

2011-04-21 Jennifer Averett <Jennifer.Averett@…

PR 1777/cpukit

  • src/lib/libbsp/powerpc/shared/startup/panic.c, src/lib/libcpu/sh/sh7032/score/cpu_asm.c, src/lib/libcpu/sh/sh7045/score/cpu_asm.c, src/lib/libcpu/sh/sh7750/score/cpu_asm.c, src/lib/libcpu/sh/shgdb/score/cpu_asm.c: Consolidated access to _Thread_Dispatch_disable_level.
Location:
c/src/lib
Files:
5 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/powerpc/shared/startup/panic.c

    r0e89af8 r85f5c14b  
    1010#include <rtems/error.h>
    1111#include <libcpu/stackTrace.h>
     12#include <rtems/score/thread.h>
     13#include <rtems/score/thread.inl>
    1214
    1315static void
     
    102104  break;
    103105  }
    104   if ( _Thread_Dispatch_disable_level )
     106  if ( _Thread_Dispatch_in_critical_section() )
    105107    printk(
    106108      "  Error occurred in a Thread Dispatching DISABLED context (level %i)\n",
    107       _Thread_Dispatch_disable_level);
     109      _Thread_Dispatch_get_disable_level());
    108110  else
    109111    printk("enabled\n");
  • c/src/lib/libcpu/sh/sh7032/score/cpu_asm.c

    r0e89af8 r85f5c14b  
    135135  _ISR_Disable( level );
    136136
    137   _Thread_Dispatch_disable_level++;
     137  _Thread_Dispatch_increment_disable_level();
    138138
    139139#if (CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
     
    157157  _ISR_Disable( level );
    158158
    159   _Thread_Dispatch_disable_level--;
     159  _Thread_Dispatch_decrement_disable_level();
    160160
    161161  _ISR_Nest_level--;
     
    173173    return;
    174174
    175   if ( _Thread_Dispatch_disable_level ) {
     175  if ( _Thread_Dispatch_in_critical_section() ) {
    176176    return;
    177177  }
  • c/src/lib/libcpu/sh/sh7045/score/cpu_asm.c

    r0e89af8 r85f5c14b  
    137137  _ISR_Disable( level );
    138138
    139   _Thread_Dispatch_disable_level++;
     139  _Thread_Dispatch_increment_disable_level();
    140140
    141141#if (CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
     
    159159  _ISR_Disable( level );
    160160
    161   _Thread_Dispatch_disable_level--;
     161  _Thread_Dispatch_decrement_disable_level();
    162162
    163163  _ISR_Nest_level--;
     
    175175    return;
    176176
    177   if ( _Thread_Dispatch_disable_level ) {
     177  if ( _Thread_Dispatch_in_critical_section() ) {
    178178    return;
    179179  }
  • c/src/lib/libcpu/sh/sh7750/score/cpu_asm.c

    r0e89af8 r85f5c14b  
    6161  _ISR_Disable( level );
    6262
    63   _Thread_Dispatch_disable_level++;
     63   _Thread_Dispatch_increment_disable_level();
    6464
    6565#if (CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
     
    8383  _ISR_Disable( level );
    8484
    85   _Thread_Dispatch_disable_level--;
     85  _Thread_Dispatch_decrement_disable_level();
    8686
    8787  _ISR_Nest_level--;
     
    9898    return;
    9999
    100   if ( _Thread_Dispatch_disable_level ) {
     100  if ( _Thread_Dispatch_in_critical_section() ) {
    101101    return;
    102102  }
  • c/src/lib/libcpu/sh/shgdb/score/cpu_asm.c

    r0e89af8 r85f5c14b  
    3434  _ISR_Disable( level );
    3535
    36   _Thread_Dispatch_disable_level++;
     36  _Thread_Dispatch_increment_disable_level();
    3737
    3838#if (CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
     
    5656  _ISR_Disable( level );
    5757
    58   _Thread_Dispatch_disable_level--;
     58  _Thread_Dispatch_decrement_disable_level();
    5959
    6060  _ISR_Nest_level--;
     
    7272    return;
    7373
    74   if ( _Thread_Dispatch_disable_level ) {
     74  if ( _Thread_Dispatch_in_critical_section() ) {
    7575    return;
    7676  }
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