Changeset 859f17ce in rtems


Ignore:
Timestamp:
May 23, 1996, 3:35:26 PM (24 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, master
Children:
a5f56a43
Parents:
d196e48
Message:

invoke thread stack free routine instead of Workspace free.

Files:
2 edited

Legend:

Unmodified
Added
Removed
  • c/src/exec/score/src/thread.c

    rd196e48 r859f17ce  
    631631
    632632  if ( the_thread->Start.stack )
    633     (void) _Workspace_Free( the_thread->Start.stack );
     633    (void) _Thread_Stack_Free( the_thread->Start.stack );
    634634
    635635  if ( the_thread->extensions )
     
    996996 *  _Thread_Handler
    997997 *
     998 *  This routine is the "primal" entry point for all threads.
     999 *  _Context_Initialize() dummies up the thread's initial context
     1000 *  to cause the first Context_Switch() to jump to _Thread_Handler().
     1001 *
    9981002 *  This routine is the default thread exitted error handler.  It is
    9991003 *  returned to when a thread exits.  The configured fatal error handler
    10001004 *  is invoked to process the exit.
    10011005 *
     1006 *  NOTE:
     1007 *
     1008 *  On entry, it is assumed all interrupts are blocked and that this
     1009 *  routine needs to set the initial isr level.  This may or may not
     1010 *  actually be needed by the context switch routine and as a result
     1011 *  interrupts may already be at there proper level.  Either way,
     1012 *  setting the initial isr level properly here is safe.
     1013 * 
     1014 *  Currently this is only really needed for the posix port,
     1015 *  ref: _Context_Switch in unix/cpu.c
     1016 *
    10021017 *  Input parameters:   NONE
    10031018 *
     
    10071022void _Thread_Handler( void )
    10081023{
     1024  ISR_Level  level;
    10091025  Thread_Control *executing;
    1010 
     1026 
    10111027  executing = _Thread_Executing;
     1028 
     1029  /*
     1030   * have to put level into a register for those cpu's that use
     1031   * inline asm here
     1032   */
     1033 
     1034  level = executing->Start.isr_level;
     1035  _ISR_Enable(level);
    10121036
    10131037  /*
  • cpukit/score/src/thread.c

    rd196e48 r859f17ce  
    631631
    632632  if ( the_thread->Start.stack )
    633     (void) _Workspace_Free( the_thread->Start.stack );
     633    (void) _Thread_Stack_Free( the_thread->Start.stack );
    634634
    635635  if ( the_thread->extensions )
     
    996996 *  _Thread_Handler
    997997 *
     998 *  This routine is the "primal" entry point for all threads.
     999 *  _Context_Initialize() dummies up the thread's initial context
     1000 *  to cause the first Context_Switch() to jump to _Thread_Handler().
     1001 *
    9981002 *  This routine is the default thread exitted error handler.  It is
    9991003 *  returned to when a thread exits.  The configured fatal error handler
    10001004 *  is invoked to process the exit.
    10011005 *
     1006 *  NOTE:
     1007 *
     1008 *  On entry, it is assumed all interrupts are blocked and that this
     1009 *  routine needs to set the initial isr level.  This may or may not
     1010 *  actually be needed by the context switch routine and as a result
     1011 *  interrupts may already be at there proper level.  Either way,
     1012 *  setting the initial isr level properly here is safe.
     1013 * 
     1014 *  Currently this is only really needed for the posix port,
     1015 *  ref: _Context_Switch in unix/cpu.c
     1016 *
    10021017 *  Input parameters:   NONE
    10031018 *
     
    10071022void _Thread_Handler( void )
    10081023{
     1024  ISR_Level  level;
    10091025  Thread_Control *executing;
    1010 
     1026 
    10111027  executing = _Thread_Executing;
     1028 
     1029  /*
     1030   * have to put level into a register for those cpu's that use
     1031   * inline asm here
     1032   */
     1033 
     1034  level = executing->Start.isr_level;
     1035  _ISR_Enable(level);
    10121036
    10131037  /*
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