Changeset 84ff9a47 in rtems


Ignore:
Timestamp:
Nov 12, 2012, 10:53:16 AM (7 years ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
4.11, master
Children:
8863338
Parents:
7121cac0
git-author:
Sebastian Huber <sebastian.huber@…> (11/12/12 10:53:16)
git-committer:
Sebastian Huber <sebastian.huber@…> (11/13/12 08:38:02)
Message:

score: Fix per CPU member offsets

Offset calculation was wrong for 16-bit and 64-bit pointer targets.

Remove unused offsets. Move Per_CPU_Control::dispatch_necessary after
Per_CPU_Control::isr_nest_level. Move SMP members to end of structure.
All assembler relevant members are now at the structure beginning.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • cpukit/score/include/rtems/score/percpu.h

    r7121cac0 r84ff9a47  
    9898 */
    9999typedef struct {
     100  #if (CPU_ALLOCATE_INTERRUPT_STACK == TRUE) || \
     101      (CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
     102    /**
     103     * This contains a pointer to the lower range of the interrupt stack for
     104     * this CPU.  This is the address allocated and freed.
     105     */
     106    void  *interrupt_stack_low;
     107
     108    /**
     109     * This contains a pointer to the interrupt stack pointer for this CPU.
     110     * It will be loaded at the beginning on an ISR.
     111     */
     112    void  *interrupt_stack_high;
     113  #endif
     114
     115  /**
     116   *  This contains the current interrupt nesting level on this
     117   *  CPU.
     118   */
     119  uint32_t isr_nest_level;
     120
     121  /** This is set to true when this CPU needs to run the dispatcher. */
     122  volatile bool dispatch_necessary;
     123
     124  /** This is the thread executing on this CPU. */
     125  Thread_Control *executing;
     126
     127  /** This is the heir thread for this this CPU. */
     128  Thread_Control *heir;
     129
     130  /** This is the idle thread for this CPU. */
     131  Thread_Control *idle;
     132
     133  /** This is the time of the last context switch on this CPU. */
     134  Timestamp_Control time_of_last_context_switch;
     135
    100136  #if defined(RTEMS_SMP)
    101137    /** This element is used to lock this structure */
     
    112148    uint32_t                          message;
    113149  #endif
    114 
    115 #if (CPU_ALLOCATE_INTERRUPT_STACK == TRUE) || \
    116     (CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
    117   /**
    118    * This contains a pointer to the lower range of the interrupt stack for
    119    * this CPU.  This is the address allocated and freed.
    120    */
    121   void  *interrupt_stack_low;
    122 
    123   /**
    124    * This contains a pointer to the interrupt stack pointer for this CPU.
    125    * It will be loaded at the beginning on an ISR.
    126    */
    127   void  *interrupt_stack_high;
    128 #endif
    129 
    130   /**
    131    *  This contains the current interrupt nesting level on this
    132    *  CPU.
    133    */
    134   uint32_t isr_nest_level;
    135 
    136   /** This is the thread executing on this CPU. */
    137   Thread_Control *executing;
    138 
    139   /** This is the heir thread for this this CPU. */
    140   Thread_Control *heir;
    141 
    142   /** This is the idle thread for this CPU. */
    143   Thread_Control *idle;
    144 
    145   /** This is set to true when this CPU needs to run the dispatcher. */
    146   volatile bool dispatch_necessary;
    147 
    148   /** This is the time of the last context switch on this CPU. */
    149   Timestamp_Control time_of_last_context_switch;
    150150} Per_CPU_Control;
    151151#endif
    152152
    153 #ifdef ASM
    154 #if defined(RTEMS_SMP)
    155   #define PER_CPU_LOCK     0
    156   #define PER_CPU_STATE    (1 * __RTEMS_SIZEOF_VOID_P__)
    157   #define PER_CPU_MESSAGE  (2 * __RTEMS_SIZEOF_VOID_P__)
    158   #define PER_CPU_END_SMP  (3 * __RTEMS_SIZEOF_VOID_P__)
    159 #else
    160   #define PER_CPU_END_SMP  0
    161 #endif
     153#if defined(ASM)
    162154
    163155#if (CPU_ALLOCATE_INTERRUPT_STACK == TRUE) || \
     
    165157  /*
    166158   *  If this CPU target lets RTEMS allocates the interrupt stack, then
    167    *  we need to have places in the per cpu table to hold them.
    168    */
    169   #define PER_CPU_INTERRUPT_STACK_LOW   PER_CPU_END_SMP
    170   #define PER_CPU_INTERRUPT_STACK_HIGH  \
    171           PER_CPU_INTERRUPT_STACK_LOW + (1 * __RTEMS_SIZEOF_VOID_P__)
     159   *  we need to have places in the per CPU table to hold them.
     160   */
     161  #define PER_CPU_INTERRUPT_STACK_LOW \
     162    0
     163  #define PER_CPU_INTERRUPT_STACK_HIGH \
     164    PER_CPU_INTERRUPT_STACK_LOW + __RTEMS_SIZEOF_VOID_P__
    172165  #define PER_CPU_END_STACK             \
    173           PER_CPU_INTERRUPT_STACK_HIGH + (1 * __RTEMS_SIZEOF_VOID_P__)
     166    PER_CPU_INTERRUPT_STACK_HIGH + __RTEMS_SIZEOF_VOID_P__
     167
     168  #define INTERRUPT_STACK_LOW \
     169    (SYM(_Per_CPU_Information) + PER_CPU_INTERRUPT_STACK_LOW)
     170  #define INTERRUPT_STACK_HIGH \
     171    (SYM(_Per_CPU_Information) + PER_CPU_INTERRUPT_STACK_HIGH)
    174172#else
    175   #define PER_CPU_END_STACK             PER_CPU_END_SMP
     173  #define PER_CPU_END_STACK \
     174    0
    176175#endif
    177176
     
    180179 */
    181180#define PER_CPU_ISR_NEST_LEVEL \
    182           PER_CPU_END_STACK + 0
    183 #define PER_CPU_EXECUTING \
    184           PER_CPU_END_STACK + (1 * __RTEMS_SIZEOF_VOID_P__)
    185 #define PER_CPU_HEIR \
    186           PER_CPU_END_STACK + (2 * __RTEMS_SIZEOF_VOID_P__)
    187 #define PER_CPU_IDLE \
    188           PER_CPU_END_STACK + (3 * __RTEMS_SIZEOF_VOID_P__)
     181  PER_CPU_END_STACK
    189182#define PER_CPU_DISPATCH_NEEDED \
    190           PER_CPU_END_STACK + (4 * __RTEMS_SIZEOF_VOID_P__)
     183  PER_CPU_ISR_NEST_LEVEL + 4
    191184
    192185#define ISR_NEST_LEVEL \
    193          (SYM(_Per_CPU_Information) + PER_CPU_ISR_NEST_LEVEL)
     186  (SYM(_Per_CPU_Information) + PER_CPU_ISR_NEST_LEVEL)
    194187#define DISPATCH_NEEDED \
    195          (SYM(_Per_CPU_Information) + PER_CPU_DISPATCH_NEEDED)
    196 
    197 /*
    198  * Do not define these offsets if they are not in the table.
    199  */
    200 #if (CPU_ALLOCATE_INTERRUPT_STACK == TRUE) || \
    201     (CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE)
    202   #define INTERRUPT_STACK_LOW \
    203       (SYM(_Per_CPU_Information) + PER_CPU_INTERRUPT_STACK_LOW)
    204   #define INTERRUPT_STACK_HIGH \
    205       (SYM(_Per_CPU_Information) + PER_CPU_INTERRUPT_STACK_HIGH)
    206 #endif
    207 
    208 #endif
     188  (SYM(_Per_CPU_Information) + PER_CPU_DISPATCH_NEEDED)
     189
     190#endif /* defined(ASM) */
    209191
    210192#ifndef ASM
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