Changeset 8264d23 in rtems for cpukit/score/cpu/mips/idtcpu.h
- Timestamp:
- 03/08/02 16:24:48 (20 years ago)
- Branches:
- 4.10, 4.11, 4.8, 4.9, 5, master
- Children:
- ffdc659
- Parents:
- 9f9871f
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
cpukit/score/cpu/mips/idtcpu.h
r9f9871f r8264d23 59 59 #if __mips == 1 60 60 #define UT_VEC K0BASE /* utlbmiss vector */ 61 #define E_VEC (K0BASE+0x80) /* exception vevtor */ 61 #define DB_VEC (K0BASE+0x40) /* debug vector */ 62 #define E_VEC (K0BASE+0x80) /* exception vector */ 62 63 #elif __mips == 3 63 64 #define T_VEC (K0BASE+0x000) /* tlbmiss vector */ … … 254 255 255 256 #if __mips == 1 257 258 259 /* definitions for Debug and Cache Invalidate control (DCIC) register bits */ 260 #define DCIC_TR 0x80000000 /* Trap enable */ 261 #define DCIC_UD 0x40000000 /* User debug enable */ 262 #define DCIC_KD 0x20000000 /* Kernel debug enable */ 263 #define DCIC_TE 0x10000000 /* Trace enable */ 264 #define DCIC_DW 0x08000000 /* Enable data breakpoints on write */ 265 #define DCIC_DR 0x04000000 /* Enable data breakpoints on read */ 266 #define DCIC_DAE 0x02000000 /* Enable data addresss breakpoints */ 267 #define DCIC_PCE 0x01000000 /* Enable instruction breakpoints */ 268 #define DCIC_DE 0x00800000 /* Debug enable */ 269 #define DCIC_DL 0x00008000 /* Data cache line invalidate */ 270 #define DCIC_IL 0x00004000 /* Instruction cache line invalidate */ 271 #define DCIC_D 0x00002000 /* Data cache invalidate enable */ 272 #define DCIC_I 0x00001000 /* Instr. cache invalidate enable */ 273 #define DCIC_T 0x00000020 /* Trace, set by CPU */ 274 #define DCIC_W 0x00000010 /* Write reference, set by CPU */ 275 #define DCIC_R 0x00000008 /* Read reference, set by CPU */ 276 #define DCIC_DA 0x00000004 /* Data address, set by CPU */ 277 #define DCIC_PC 0x00000002 /* Program counter, set by CPU */ 278 #define DCIC_DB 0x00000001 /* Debug, set by CPU */ 279 280 281 282 256 283 #define SR_CUMASK 0xf0000000 /* coproc usable bits */ 257 284 #define SR_CU3 0x80000000 /* Coprocessor 3 usable */
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