Changeset 819a6b35 in rtems


Ignore:
Timestamp:
Jan 14, 2016, 7:07:06 AM (4 years ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
master
Children:
c40dd4ed
Parents:
3252126
git-author:
Sebastian Huber <sebastian.huber@…> (01/14/16 07:07:06)
git-committer:
Sebastian Huber <sebastian.huber@…> (01/15/16 13:23:38)
Message:

arm: Honor cache for Cortex-M7 support

File:
1 edited

Legend:

Unmodified
Added
Removed
  • cpukit/score/cpu/arm/armv7m-exception-handler-set.c

    r3252126 r819a6b35  
    66
    77/*
    8  * Copyright (c) 2011 Sebastian Huber.  All rights reserved.
     8 * Copyright (c) 2011, 2016 Sebastian Huber.  All rights reserved.
    99 *
    1010 *  embedded brains GmbH
    11  *  Obere Lagerstr. 30
     11 *  Dornierstr. 4
    1212 *  82178 Puchheim
    1313 *  Germany
     
    2424
    2525#include <rtems/score/armv7m.h>
     26#include <rtems/rtems/cache.h>
    2627
    2728#ifdef ARM_MULTILIB_ARCH_V7M
     
    3435  if ( _ARMV7M_SCB->vtor [index] != handler ) {
    3536    _ARMV7M_SCB->vtor [index] = handler;
     37    rtems_cache_flush_multiple_data_lines(
     38      &_ARMV7M_SCB->vtor [index],
     39      sizeof(_ARMV7M_SCB->vtor [index])
     40    );
     41    rtems_cache_invalidate_multiple_instruction_lines(
     42      &_ARMV7M_SCB->vtor [index],
     43      sizeof(_ARMV7M_SCB->vtor [index])
     44    );
    3645  }
    3746}
Note: See TracChangeset for help on using the changeset viewer.