Changeset 801b5d8 in rtems


Ignore:
Timestamp:
Feb 17, 2014, 8:23:59 AM (6 years ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
4.11, master
Children:
92f50c3
Parents:
c2934b96
git-author:
Sebastian Huber <sebastian.huber@…> (02/17/14 08:23:59)
git-committer:
Sebastian Huber <sebastian.huber@…> (02/19/14 08:59:38)
Message:

powerpc: Change interrupt disable implemetation

Instead of SPRG0 (= special purpose register 272) use the new global
symbol _PPC_INTERRUPT_DISABLE_MASK to store the interrupt disable mask.
The benefit is that it is now possible to disable interrupts without
further run-time initialization in boot_card().

At least on Freescale e500 cores this leads also to a faster execution
since the mfmsr and mfspr instruction require four cycles to complete.
The instructions to load the mask value can execute while the mfmsr is
in progress.

Files:
1 added
26 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/powerpc/beatnik/startup/bspstart.c

    rc2934b96 r801b5d8  
    243243   * Initialize default raw exception handlers. See vectors/vectors_init.c
    244244   */
    245   ppc_exc_initialize(
    246                   PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
    247                   intrStackStart,
    248                   intrStackSize
    249                   );
     245  ppc_exc_initialize(intrStackStart, intrStackSize);
    250246
    251247  printk("CPU: %s\n", get_ppc_cpu_type_name(current_ppc_cpu));
  • c/src/lib/libbsp/powerpc/ep1a/startup/bspstart.c

    rc2934b96 r801b5d8  
    324324   * Initialize default raw exception hanlders.
    325325   */
    326   ppc_exc_initialize(
    327     PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
    328     intrStackStart,
    329     intrStackSize
    330   );
     326  ppc_exc_initialize(intrStackStart, intrStackSize);
    331327
    332328  /*
  • c/src/lib/libbsp/powerpc/gen5200/startup/bspstart.c

    rc2934b96 r801b5d8  
    171171  ppc_exc_cache_wb_check = 0;
    172172  ppc_exc_initialize(
    173     PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
    174173    (uintptr_t) bsp_interrupt_stack_start,
    175174    (uintptr_t) bsp_interrupt_stack_size
  • c/src/lib/libbsp/powerpc/gen83xx/startup/bspstart.c

    rc2934b96 r801b5d8  
    137137#endif
    138138  ppc_exc_initialize(
    139     PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
    140139    (uintptr_t) bsp_section_work_begin,
    141140    rtems_configuration_get_interrupt_stack_size()
  • c/src/lib/libbsp/powerpc/haleakala/startup/bspstart.c

    rc2934b96 r801b5d8  
    207207   */
    208208  ppc_exc_initialize(
    209     PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
    210209    (uintptr_t) intrStack_start,
    211210    (uintptr_t) intrStack_size
  • c/src/lib/libbsp/powerpc/mbx8xx/startup/bspstart.c

    rc2934b96 r801b5d8  
    115115  /* Initialize exception handler */
    116116  ppc_exc_initialize(
    117     PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
    118117    (uintptr_t) IntrStack_start,
    119118    (uintptr_t) intrStack - (uintptr_t) IntrStack_start
  • c/src/lib/libbsp/powerpc/mpc55xxevb/startup/bspstart.c

    rc2934b96 r801b5d8  
    109109        /* Initialize exceptions */
    110110        ppc_exc_initialize_with_vector_base(
    111                 PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
    112111                (uintptr_t) bsp_section_work_begin,
    113112                rtems_configuration_get_interrupt_stack_size(),
  • c/src/lib/libbsp/powerpc/mpc8260ads/startup/bspstart.c

    rc2934b96 r801b5d8  
    175175  /* FIXME: Interrupt stack begin and size */
    176176  ppc_exc_initialize(
    177     PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
    178177    (uintptr_t) IntrStack_start,
    179178    (uintptr_t) intrStack - (uintptr_t) IntrStack_start
  • c/src/lib/libbsp/powerpc/mvme3100/startup/bspstart.c

    rc2934b96 r801b5d8  
    271271         * Initialize default raw exception handlers.
    272272         */
    273         ppc_exc_initialize(
    274                 PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
    275                 intrStackStart,
    276                 intrStackSize
    277         );
     273        ppc_exc_initialize(intrStackStart, intrStackSize);
    278274
    279275        printk("CPU 0x%x - rev 0x%x\n", myCpu, myCpuRevision);
  • c/src/lib/libbsp/powerpc/mvme5500/startup/bspstart.c

    rc2934b96 r801b5d8  
    246246   * Initialize default raw exception handlers.
    247247   */
    248   ppc_exc_initialize(
    249     PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
    250     intrStackStart,
    251     intrStackSize
    252   );
     248  ppc_exc_initialize(intrStackStart, intrStackSize);
    253249
    254250  /*
  • c/src/lib/libbsp/powerpc/psim/startup/bspstart.c

    rc2934b96 r801b5d8  
    100100   */
    101101  ppc_exc_initialize_with_vector_base(
    102     PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
    103102    (uintptr_t) bsp_section_work_begin,
    104103    rtems_configuration_get_interrupt_stack_size(),
  • c/src/lib/libbsp/powerpc/qemuppc/startup/bspstart.c

    rc2934b96 r801b5d8  
    9595   * Initialize default raw exception handlers.
    9696   */
    97   ppc_exc_initialize(
    98     PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
    99     intrStackStart,
    100     intrStackSize
    101   );
     97  ppc_exc_initialize(intrStackStart, intrStackSize);
    10298
    10399  /* Install default handler for the decrementer exception */
  • c/src/lib/libbsp/powerpc/qoriq/startup/bspstart.c

    rc2934b96 r801b5d8  
    111111  /* Initialize exception handler */
    112112  ppc_exc_initialize_with_vector_base(
    113     PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
    114113    (uintptr_t) bsp_section_work_begin,
    115114    rtems_configuration_get_interrupt_stack_size(),
  • c/src/lib/libbsp/powerpc/qoriq/startup/smp.c

    rc2934b96 r801b5d8  
    117117  /* Initialize exception handler */
    118118  ppc_exc_initialize_with_vector_base(
    119     PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
    120119    (uintptr_t) second_cpu->interrupt_stack_low,
    121120    rtems_configuration_get_interrupt_stack_size(),
  • c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c

    rc2934b96 r801b5d8  
    195195   * Initialize default raw exception handlers.
    196196   */
    197   ppc_exc_initialize(
    198     PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
    199     intrStackStart,
    200     intrStackSize
    201   );
     197  ppc_exc_initialize(intrStackStart, intrStackSize);
    202198
    203199  msr_value = 0x2030;
  • c/src/lib/libbsp/powerpc/shared/startup/bspstart.c

    rc2934b96 r801b5d8  
    233233   * Initialize default raw exception handlers.
    234234   */
    235   ppc_exc_initialize(
    236     PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
    237     intrStackStart,
    238     intrStackSize
    239   );
     235  ppc_exc_initialize(intrStackStart, intrStackSize);
    240236
    241237  boardManufacturer   =  checkPrepBoardType(&residualCopy);
  • c/src/lib/libbsp/powerpc/t32mppc/startup/bspstart.c

    rc2934b96 r801b5d8  
    6969  /* Initialize exception handler */
    7070  ppc_exc_initialize_with_vector_base(
    71     PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
    7271    (uintptr_t) bsp_section_work_begin,
    7372    rtems_configuration_get_interrupt_stack_size(),
  • c/src/lib/libbsp/powerpc/tqm8xx/startup/bspstart.c

    rc2934b96 r801b5d8  
    184184
    185185  /* Initialize exception handler */
    186   ppc_exc_initialize(
    187     PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
    188     interrupt_stack_start,
    189     interrupt_stack_size
    190   );
     186  ppc_exc_initialize(interrupt_stack_start, interrupt_stack_size);
    191187
    192188  /* Initalize interrupt support */
  • c/src/lib/libbsp/powerpc/virtex/startup/bspstart.c

    rc2934b96 r801b5d8  
    9696   */
    9797  ppc_exc_initialize_with_vector_base(
    98     PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
    9998    (uintptr_t) bsp_section_work_begin,
    10099    rtems_configuration_get_interrupt_stack_size(),
  • c/src/lib/libbsp/powerpc/virtex4/startup/bspstart.c

    rc2934b96 r801b5d8  
    209209  intrStackSize  = rtems_configuration_get_interrupt_stack_size();
    210210
    211   ppc_exc_initialize(PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
    212                      intrStackStart,
    213                      intrStackSize);
     211  ppc_exc_initialize(intrStackStart, intrStackSize);
    214212
    215213  /* Let the user know what parameters we were compiled with */
  • c/src/lib/libbsp/powerpc/virtex5/startup/bspstart.c

    rc2934b96 r801b5d8  
    229229  intrStackSize  = rtems_configuration_get_interrupt_stack_size();
    230230
    231   ppc_exc_initialize(PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
    232                      intrStackStart,
    233                      intrStackSize);
     231  ppc_exc_initialize(intrStackStart, intrStackSize);
    234232
    235233  /* Let the user know what parameters we were compiled with */
  • c/src/lib/libbsp/shared/bootcard.c

    rc2934b96 r801b5d8  
    6868{
    6969  rtems_interrupt_level  bsp_isr_level;
    70 
    71   /*
    72    * Special case for PowerPC: The interrupt disable mask is stored in SPRG0.
    73    * It must be valid before we can use rtems_interrupt_disable().
    74    */
    75   #ifdef PPC_INTERRUPT_DISABLE_MASK_DEFAULT
    76     ppc_interrupt_set_disable_mask( PPC_INTERRUPT_DISABLE_MASK_DEFAULT );
    77   #endif /* PPC_INTERRUPT_DISABLE_MASK_DEFAULT */
    7870
    7971  /*
  • c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_initialize.c

    rc2934b96 r801b5d8  
    150150
    151151void ppc_exc_initialize_with_vector_base(
    152   uint32_t interrupt_disable_mask,
    153152  uintptr_t interrupt_stack_begin,
    154153  uintptr_t interrupt_stack_size,
     
    191190  PPC_SET_SPECIAL_PURPOSE_REGISTER(SPRG1, interrupt_stack_pointer);
    192191  PPC_SET_SPECIAL_PURPOSE_REGISTER(SPRG2, interrupt_stack_begin);
    193 
    194   ppc_interrupt_set_disable_mask(interrupt_disable_mask);
    195192
    196193#ifndef PPC_EXC_CONFIG_BOOKE_ONLY
  • c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/vectors.h

    rc2934b96 r801b5d8  
    362362 */
    363363void ppc_exc_initialize_with_vector_base(
    364   uint32_t interrupt_disable_mask,
    365364  uintptr_t interrupt_stack_begin,
    366365  uintptr_t interrupt_stack_size,
     
    382381 */
    383382static inline void ppc_exc_initialize(
    384   uint32_t interrupt_disable_mask,
    385383  uintptr_t interrupt_stack_begin,
    386384  uintptr_t interrupt_stack_size
     
    388386{
    389387  ppc_exc_initialize_with_vector_base(
    390     interrupt_disable_mask,
    391388    interrupt_stack_begin,
    392389    interrupt_stack_size,
  • cpukit/score/cpu/powerpc/Makefile.am

    rc2934b96 r801b5d8  
    1717libscorecpu_a_SOURCES += ppc-context-volatile-clobber.S
    1818libscorecpu_a_SOURCES += ppc-context-validate.S
     19libscorecpu_a_SOURCES += ppc-isr-disable-mask.S
    1920libscorecpu_a_SOURCES += ppc-isr-vector-install.c
    2021libscorecpu_a_CPPFLAGS = $(AM_CPPFLAGS)
  • cpukit/score/cpu/powerpc/rtems/powerpc/registers.h

    rc2934b96 r801b5d8  
    582582 * @brief Default value for the interrupt disable mask.
    583583 *
    584  * The interrupt disable mask is stored in the SPRG0 (= special purpose
    585  * register 272).
     584 * The interrupt disable mask is stored in the global symbol
     585 * _PPC_INTERRUPT_DISABLE_MASK.
    586586 */
    587587#define PPC_INTERRUPT_DISABLE_MASK_DEFAULT MSR_EE
     
    604604{ __asm__ volatile ("mtmsr %0" : "=&r" ((_msr_value)) : "0" ((_msr_value))); }
    605605
    606 static inline void ppc_interrupt_set_disable_mask( uint32_t mask )
    607 {
    608   __asm__ volatile (
    609     "mtspr 272, %0"
    610     :
    611     : "r" (mask)
    612   );
    613 }
     606/**
     607 * @brief A global symbol used to disable interrupts in the MSR.
     608 *
     609 * A one bit means that this bit should be cleared.
     610 */
     611extern char _PPC_INTERRUPT_DISABLE_MASK[];
    614612
    615613static inline uint32_t ppc_interrupt_get_disable_mask( void )
    616614{
    617   uint32_t mask;
    618 
    619   __asm__ volatile (
    620     "mfspr %0, 272"
    621     : "=r" (mask)
    622   );
    623 
    624   return mask;
     615  return (uint32_t) _PPC_INTERRUPT_DISABLE_MASK;
    625616}
    626617
     
    632623  __asm__ volatile (
    633624    "mfmsr %0;"
    634     "mfspr %1, 272;"
     625    "lis %1, _PPC_INTERRUPT_DISABLE_MASK@h;"
     626    "ori %1, %1, _PPC_INTERRUPT_DISABLE_MASK@l;"
    635627    "andc %1, %0, %1;"
    636628    "mtmsr %1"
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