Changeset 7f8c11c in rtems


Ignore:
Timestamp:
Nov 30, 2000, 2:02:33 PM (20 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
43b6f75
Parents:
88d7985
Message:

2000-11-30 Joel Sherrill <joel@…>

  • cpu_asm.S: Changed "_CPU_Ccontext_switch_restore: typo to correct name of _CPU_Context_switch_restore. Added dummy version of exc_utlb_code() so applications would link.
Files:
4 edited

Legend:

Unmodified
Added
Removed
  • c/src/exec/score/cpu/mips/ChangeLog

    r88d7985 r7f8c11c  
     12000-11-30      Joel Sherrill <joel@OARcorp.com>
     2
     3        * cpu_asm.S: Changed "_CPU_Ccontext_switch_restore: typo to
     4        correct name of _CPU_Context_switch_restore.  Added dummy
     5        version of exc_utlb_code() so applications would link.
     6
    172000-11-09      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
    28
  • c/src/exec/score/cpu/mips/cpu_asm.S

    r88d7985 r7f8c11c  
    482482FRAME(_CPU_Context_restore,sp,0,ra)
    483483        add  a1,a0,zero
    484         j _CPU_Ccontext_switch_restore
     484        j _CPU_Context_switch_restore
    485485        nop
    486486ENDFRAME(_CPU_Context_restore)
     
    868868   */
    869869        /* k0 has the SR interrupt bits */
    870         la t3, _ISR_vector_table
     870        la t3, _ISR_Vector_table
    871871
    872872        /* The bits you look at can be prioritized here just by */
     
    13281328ENDFRAME(init_exc_vecs)
    13291329
     1330FRAME(exc_utlb_code,sp,0,ra)
     1331        la      k0, _ISR_Handler /* XXX not right -- but need to link*/
     1332        j       k0
     1333        nop
     1334ENDFRAME(exc_utlb_code)
     1335
    13301336FRAME(exc_norm_code,sp,0,ra)
    13311337        la      k0, _ISR_Handler /* generic external int hndlr */
  • cpukit/score/cpu/mips/ChangeLog

    r88d7985 r7f8c11c  
     12000-11-30      Joel Sherrill <joel@OARcorp.com>
     2
     3        * cpu_asm.S: Changed "_CPU_Ccontext_switch_restore: typo to
     4        correct name of _CPU_Context_switch_restore.  Added dummy
     5        version of exc_utlb_code() so applications would link.
     6
    172000-11-09      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
    28
  • cpukit/score/cpu/mips/cpu_asm.S

    r88d7985 r7f8c11c  
    482482FRAME(_CPU_Context_restore,sp,0,ra)
    483483        add  a1,a0,zero
    484         j _CPU_Ccontext_switch_restore
     484        j _CPU_Context_switch_restore
    485485        nop
    486486ENDFRAME(_CPU_Context_restore)
     
    868868   */
    869869        /* k0 has the SR interrupt bits */
    870         la t3, _ISR_vector_table
     870        la t3, _ISR_Vector_table
    871871
    872872        /* The bits you look at can be prioritized here just by */
     
    13281328ENDFRAME(init_exc_vecs)
    13291329
     1330FRAME(exc_utlb_code,sp,0,ra)
     1331        la      k0, _ISR_Handler /* XXX not right -- but need to link*/
     1332        j       k0
     1333        nop
     1334ENDFRAME(exc_utlb_code)
     1335
    13301336FRAME(exc_norm_code,sp,0,ra)
    13311337        la      k0, _ISR_Handler /* generic external int hndlr */
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