Changeset 7ee59313 in rtems


Ignore:
Timestamp:
Jun 1, 2018, 5:11:12 AM (11 months ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
master
Children:
196ce18
Parents:
718a84af
git-author:
Sebastian Huber <sebastian.huber@…> (06/01/18 05:11:12)
git-committer:
Sebastian Huber <sebastian.huber@…> (06/27/18 06:58:16)
Message:

Remove Clock_driver_support_shutdown_hardware()

The aim of this clock driver hook was to stop clock tick interrupts at
some late point in the exit() procedure.

The use of atexit() pulls in malloc() which pulls in errno. It is
incompatible with the intention of the
CONFIGURE_DISABLE_NEWLIB_REENTRANCY configuration option.

The exit() function must be called from thread context, so accompanied
clock tick interrupts should cause no harm. On the contrary, someone
may assume a normal operating system operation, e.g. working timeouts.

Remove the Clock_driver_support_shutdown_hardware() clock driver hook.

Close #3436.

Location:
bsps
Files:
40 edited

Legend:

Unmodified
Added
Removed
  • bsps/arm/beagle/clock/clock.c

    r718a84af r7ee59313  
    291291}
    292292
    293 static void beagle_clock_cleanup(void)
    294 {
    295   rtems_status_code sc = RTEMS_SUCCESSFUL;
    296 
    297   /* Disable timer */
    298   mmio_clear(timer->base + timer->regs->TCLR, OMAP3_TCLR_ST);
    299 
    300   /* Remove interrupt handler */
    301   sc = rtems_interrupt_handler_remove(
    302     timer->irq_nr,
    303     clock_isr,
    304     NULL
    305   );
    306   if (sc != RTEMS_SUCCESSFUL) {
    307     rtems_fatal_error_occurred(0xdeadbeef);
    308   }
    309   clock_isr = NULL;
    310 
    311   /* stop frclock */
    312   mmio_clear(fr_timer->base + fr_timer->regs->TCLR, OMAP3_TCLR_ST);
    313 }
    314 
    315293#define Clock_driver_support_at_tick() beagle_clock_at_tick()
    316294#define Clock_driver_support_initialize_hardware() beagle_clock_initialize()
     
    318296  beagle_clock_handler_install(isr)
    319297
    320 #define Clock_driver_support_shutdown_hardware() beagle_clock_cleanup()
    321 
    322298/* Include shared source clock driver code */
    323299#include "../../shared/dev/clock/clockimpl.h"
  • bsps/arm/csb336/clock/clockdrv.c

    r718a84af r7ee59313  
    8383
    8484/**
    85  * Do whatever you need to shut the clock down and remove the
    86  * interrupt handler. Since this normally only gets called on
    87  * RTEMS shutdown, you may not need to do anything other than
    88  * remove the ISR.
    89  */
    90 #define Clock_driver_support_shutdown_hardware()                        \
    91   do {                                                                  \
    92     /* Disable timer */ \
    93     MC9328MXL_TMR1_TCTL = 0; \
    94     BSP_remove_rtems_irq_handler(&clock_isr_data);                  \
    95   } while (0)
    96 
    97 /**
    9885 * Enables clock interrupt.
    9986 *
  • bsps/arm/csb337/clock/clock.c

    r718a84af r7ee59313  
    104104  } while (0)
    105105
    106 #define Clock_driver_support_shutdown_hardware() \
    107   do { \
    108     BSP_remove_rtems_irq_handler(&clock_isr_data); \
    109   } while (0)
    110 
    111106#define CLOCK_DRIVER_USE_DUMMY_TIMECOUNTER
    112107
  • bsps/arm/edb7312/clock/clockdrv.c

    r718a84af r7ee59313  
    5757  } while (0)
    5858
    59 #define Clock_driver_support_shutdown_hardware()    \
    60   do {                                              \
    61     rtems_status_code status = RTEMS_SUCCESSFUL;    \
    62     status = rtems_interrupt_handler_remove(        \
    63         BSP_TC1OI,                                  \
    64         Clock_isr,                                  \
    65         NULL                                        \
    66     );                                              \
    67     assert(status == RTEMS_SUCCESSFUL);             \
    68   } while (0)
    69 
    7059#define CLOCK_DRIVER_USE_DUMMY_TIMECOUNTER
    7160
  • bsps/arm/gumstix/clock/clock.c

    r718a84af r7ee59313  
    109109  } while (0)
    110110
    111 #define Clock_driver_support_shutdown_hardware() \
    112   do { \
    113     BSP_remove_rtems_irq_handler(&clock_isr_data); \
    114   } while (0)
    115 
    116111#define CLOCK_DRIVER_USE_DUMMY_TIMECOUNTER
    117112
  • bsps/arm/raspberrypi/clock/clockdrv.c

    r718a84af r7ee59313  
    9696}
    9797
    98 static void raspberrypi_clock_cleanup(void)
    99 {
    100   bsp_interrupt_vector_disable(BCM2835_IRQ_ID_GPU_TIMER_M3);
    101 }
    102 
    10398#define Clock_driver_support_at_tick() raspberrypi_clock_at_tick()
    10499
    105100#define Clock_driver_support_initialize_hardware() raspberrypi_clock_initialize_hardware()
    106 
    107 #define Clock_driver_support_shutdown_hardware() raspberrypi_clock_cleanup()
    108101
    109102#define Clock_driver_support_install_isr(clock_isr) \
  • bsps/arm/rtl22xx/clock/clockdrv.c

    r718a84af r7ee59313  
    128128
    129129/**
    130  * Do whatever you need to shut the clock down and remove the
    131  * interrupt handler. Since this normally only gets called on
    132  * RTEMS shutdown, you may not need to do anything other than
    133  * remove the ISR.
    134  */
    135 #define Clock_driver_support_shutdown_hardware()                        \
    136   do {                                                                  \
    137     /* Disable timer */ \
    138     T0TCR&=~0x02; \
    139     BSP_remove_rtems_irq_handler(&clock_isr_data);                  \
    140   } while (0)
    141 
    142 /**
    143130 * Enables clock interrupt.
    144131 *
  • bsps/arm/shared/clock/clock-a9mpcore.c

    r718a84af r7ee59313  
    170170}
    171171
    172 static void a9mpcore_clock_cleanup_isr(void *arg)
    173 {
    174   volatile a9mpcore_gt *gt = A9MPCORE_GT;
    175 
    176   (void) arg;
    177 
    178   gt->ctrl &= A9MPCORE_GT_CTRL_TMR_EN;
    179   gt->irqst = A9MPCORE_GT_IRQST_EFLG;
    180 }
    181 
    182 static void a9mpcore_clock_cleanup(void)
    183 {
    184   rtems_status_code sc;
    185 
    186   /*
    187    * The relevant registers / bits of the global timer are banked and chances
    188    * are on an SPM system, that we are executing on the wrong CPU to reset
    189    * them. Thus we will have the actual cleanup done with the next clock tick.
    190    * The ISR will execute on the right CPU for the cleanup.
    191    */
    192   sc = rtems_interrupt_handler_install(
    193     A9MPCORE_IRQ_GT,
    194     "Clock",
    195     RTEMS_INTERRUPT_REPLACE,
    196     a9mpcore_clock_cleanup_isr,
    197     NULL
    198   );
    199   if (sc != RTEMS_SUCCESSFUL) {
    200     bsp_fatal(BSP_ARM_A9MPCORE_FATAL_CLOCK_IRQ_REMOVE);
    201   }
    202 }
    203 
    204172#define Clock_driver_support_at_tick() \
    205173  a9mpcore_clock_at_tick()
     
    211179  a9mpcore_clock_handler_install()
    212180
    213 #define Clock_driver_support_shutdown_hardware() \
    214   a9mpcore_clock_cleanup()
    215 
    216181/* Include shared source clock driver code */
    217182#include "../../shared/dev/clock/clockimpl.h"
  • bsps/arm/shared/clock/clock-armv7m.c

    r718a84af r7ee59313  
    8989);
    9090
    91 static void _ARMV7M_Clock_cleanup(void)
    92 {
    93   volatile ARMV7M_Systick *systick = _ARMV7M_Systick;
    94 
    95   systick->csr = 0;
    96 }
    97 
    9891#define Clock_driver_support_initialize_hardware() \
    9992  _ARMV7M_Clock_initialize()
     
    10295  _ARMV7M_Clock_handler_install()
    10396
    104 #define Clock_driver_support_shutdown_hardware() \
    105   _ARMV7M_Clock_cleanup()
    106 
    10797/* Include shared source clock driver code */
    10898#include "../../../shared/dev/clock/clockimpl.h"
  • bsps/arm/shared/clock/clock-nxp-lpc.c

    r718a84af r7ee59313  
    106106}
    107107
    108 static void lpc_clock_cleanup(void)
    109 {
    110   rtems_status_code sc = RTEMS_SUCCESSFUL;
    111 
    112   /* Disable timer */
    113   lpc_clock->tcr = 0x0;
    114 
    115   /* Remove interrupt handler */
    116   sc = rtems_interrupt_handler_remove(
    117     LPC_CLOCK_INTERRUPT,
    118     (rtems_interrupt_handler) Clock_isr,
    119     NULL
    120   );
    121   if (sc != RTEMS_SUCCESSFUL) {
    122     rtems_fatal_error_occurred(0xdeadbeef);
    123   }
    124 }
    125 
    126108#define Clock_driver_support_at_tick() lpc_clock_at_tick()
    127109#define Clock_driver_support_initialize_hardware() lpc_clock_initialize()
     
    129111  lpc_clock_handler_install()
    130112
    131 #define Clock_driver_support_shutdown_hardware() lpc_clock_cleanup()
    132 
    133113/* Include shared source clock driver code */
    134114#include "../../../shared/dev/clock/clockimpl.h"
  • bsps/arm/smdk2410/clock/clockdrv.c

    r718a84af r7ee59313  
    7777
    7878/**
    79  * Do whatever you need to shut the clock down and remove the
    80  * interrupt handler. Since this normally only gets called on
    81  * RTEMS shutdown, you may not need to do anything other than
    82  * remove the ISR.
    83  */
    84 #define Clock_driver_support_shutdown_hardware()                        \
    85   do {                                                                  \
    86         /* Disable timer */ \
    87         BSP_remove_rtems_irq_handler(&clock_isr_data);                  \
    88      } while (0)
    89 
    90 /**
    9179 * Enables clock interrupt.
    9280 *
  • bsps/arm/tms570/clock/clock.c

    r718a84af r7ee59313  
    160160}
    161161
    162 /**
    163  * @brief disables RTI interrupt
    164  *
    165  * Called when closing clock driver
    166  *
    167  * @retval Void
    168  */
    169 static void tms570_clock_driver_support_shutdown_hardware( void )
    170 {
    171   /* turn off the timer interrupts */
    172   TMS570_RTI.CLEARINTENA = TMS570_RTI_CLEARINTENA_CLEAROVL0INT |
    173                            TMS570_RTI_CLEARINTENA_CLEARINT0; 
    174 }
    175 
    176162#define Clock_driver_support_initialize_hardware \
    177163                        tms570_clock_driver_support_initialize_hardware
     
    180166#define Clock_driver_support_initialize_hardware \
    181167                        tms570_clock_driver_support_initialize_hardware
    182 #define Clock_driver_support_shutdown_hardware \
    183                         tms570_clock_driver_support_shutdown_hardware
    184168
    185169#define Clock_driver_support_install_isr(Clock_isr) \
  • bsps/i386/pc386/clock/ckinit.c

    r718a84af r7ee59313  
    3939/* forward declaration */
    4040void Clock_isr(void *param);
    41 static void clockOff(void);
    4241static void Clock_isr_handler(void *param);
    4342
     
    174173}
    175174
    176 static void clockOff(void)
    177 {
    178   rtems_interrupt_lock_context lock_context;
    179   rtems_interrupt_lock_acquire(&rtems_i386_i8254_access_lock, &lock_context);
    180   /* reset timer mode to standard (BIOS) value */
    181   outport_byte(TIMER_MODE, TIMER_SEL0 | TIMER_16BIT | TIMER_RATEGEN);
    182   outport_byte(TIMER_CNTR0, 0);
    183   outport_byte(TIMER_CNTR0, 0);
    184   rtems_interrupt_lock_release(&rtems_i386_i8254_access_lock, &lock_context);
    185 } /* Clock_exit */
    186 
    187175bool Clock_isr_enabled = false;
    188176static void Clock_isr_handler(void *param)
     
    248236}
    249237
    250 #define Clock_driver_support_shutdown_hardware() \
    251   do { \
    252     rtems_status_code status; \
    253     clockOff(); \
    254     status = rtems_interrupt_handler_remove(  \
    255       BSP_PERIODIC_TIMER, \
    256       Clock_isr_handler,  \
    257       NULL  \
    258     );  \
    259     assert(status == RTEMS_SUCCESSFUL); \
    260   } while (0)
    261 
    262238#include "../../../shared/dev/clock/clockimpl.h"
  • bsps/lm32/shared/clock/ckinit.c

    r718a84af r7ee59313  
    6666}
    6767
    68 #define Clock_driver_support_shutdown_hardware() \
    69   do { \
    70     /* Disable clock interrupts and stop */ \
    71     lm32_interrupt_unmask(CLOCK_IRQMASK); \
    72     clockwrite(LM32_CLOCK_CR, LM32_CLOCK_CR_STOP); \
    73   } while (0)
    74 
    7568#define CLOCK_DRIVER_USE_DUMMY_TIMECOUNTER
    7669
  • bsps/lm32/shared/milkymist_clock/ckinit.c

    r718a84af r7ee59313  
    4242}
    4343
    44 #define Clock_driver_support_shutdown_hardware() \
    45   do { \
    46     bsp_interrupt_vector_disable(MM_IRQ_TIMER0); \
    47     MM_WRITE(MM_TIMER0_CONTROL, 0); \
    48   } while (0)
    49 
    5044#define CLOCK_DRIVER_USE_DUMMY_TIMECOUNTER
    5145
  • bsps/m68k/av5282/clock/clock.c

    r718a84af r7ee59313  
    2727
    2828/*
    29  * Turn off the clock
    30  */
    31 #define Clock_driver_support_shutdown_hardware()   \
    32     do {                                           \
    33         MCF5282_PIT3_PCSR &= ~MCF5282_PIT_PCSR_EN; \
    34     } while(0)
    35 
    36 /*
    3729 * Set up the clock hardware
    3830 *
  • bsps/m68k/gen68360/clock/clock.c

    r718a84af r7ee59313  
    5656
    5757/*
    58  * Turn off the clock
    59  */
    60 #define Clock_driver_support_shutdown_hardware() \
    61     do {                       \
    62         m360.pitr &= ~0xFF;    \
    63     } while(0)
    64 
    65 /*
    6658 * Set up the clock hardware
    6759 *     The rate at which the periodic interval timer
  • bsps/m68k/genmcf548x/clock/clock.c

    r718a84af r7ee59313  
    7474
    7575/*
    76  * Turn off the clock
    77  */
    78 #define Clock_driver_support_shutdown_hardware()                         \
    79     do {                                                                 \
    80         MCF548X_SLT_SCR0 &= ~(MCF548X_SLT_SCR_TEN | MCF548X_SLT_SCR_RUN | MCF548X_SLT_SCR_IEN); \
    81     } while(0)
    82 
    83 /*
    8476 * Set up the clock hardware
    8577 *
  • bsps/m68k/mcf52235/clock/clock.c

    r718a84af r7ee59313  
    5454
    5555/*
    56  * Turn off the clock
    57  */
    58 #define Clock_driver_support_shutdown_hardware() \
    59   do { \
    60     MCF_PIT1_PCSR &= ~MCF_PIT_PCSR_EN; \
    61   } while (0)
    62 
    63 /*
    6456 * Set up the clock hardware
    6557 *
  • bsps/m68k/mcf5225x/clock/clock.c

    r718a84af r7ee59313  
    5454
    5555/*
    56  * Turn off the clock
    57  */
    58 #define Clock_driver_support_shutdown_hardware() \
    59   do { \
    60     MCF_PIT1_PCSR &= ~MCF_PIT_PCSR_EN; \
    61   } while (0)
    62 
    63 /*
    6456 * Set up the clock hardware
    6557 *
  • bsps/m68k/mcf5235/clock/clock.c

    r718a84af r7ee59313  
    2727
    2828/*
    29  * Turn off the clock
    30  */
    31 #define Clock_driver_support_shutdown_hardware()   \
    32     do {                                           \
    33         MCF5235_PIT_PCSR3 &= ~MCF5235_PIT_PCSR_EN; \
    34     } while(0)
    35 
    36 /*
    3729 * Set up the clock hardware
    3830 *
  • bsps/m68k/mcf5329/clock/clock.c

    r718a84af r7ee59313  
    5454
    5555/*
    56  * Turn off the clock
    57  */
    58 #define Clock_driver_support_shutdown_hardware() \
    59   do { \
    60     MCF_PIT3_PCSR &= ~MCF_PIT_PCSR_EN; \
    61   } while (0)
    62 
    63 /*
    6456 * Set up the clock hardware
    6557 *
  • bsps/m68k/uC5282/clock/clock.c

    r718a84af r7ee59313  
    8080
    8181/*
    82  * Turn off the clock
    83  */
    84 #define Clock_driver_support_shutdown_hardware()   \
    85     do {                                           \
    86         MCF5282_PIT3_PCSR &= ~MCF5282_PIT_PCSR_EN; \
    87     } while(0)
    88 
    89 /*
    9082 * Set up the clock hardware
    9183 *
  • bsps/mips/csb350/clock/clockdrv.c

    r718a84af r7ee59313  
    8484  } while(0)
    8585
    86 #define Clock_driver_support_shutdown_hardware()
    87 
    8886#define CLOCK_DRIVER_USE_DUMMY_TIMECOUNTER
    8987
  • bsps/mips/jmr3904/clock/clockdrv.c

    r718a84af r7ee59313  
    4444  } while(0)
    4545
    46 #define Clock_driver_support_shutdown_hardware()
    47 
    4846#define CLOCK_DRIVER_USE_DUMMY_TIMECOUNTER
    4947
  • bsps/mips/rbtx4925/clock/clockdrv.c

    r718a84af r7ee59313  
    104104
    105105
    106 #define Clock_driver_support_shutdown_hardware() \
    107   do { \
    108         uint32_t temp; \
    109     temp = TX4925_REG_READ( TX4925_REG_BASE, TX4925_TIMER0_BASE + TX4925_TIMER_ITMR ); /* Disable interval timer interrupt */ \
    110     temp &= ~TIMER_INT_ENABLE_MASK; \
    111     TX4925_REG_WRITE( TX4925_REG_BASE, TX4925_TIMER0_BASE + TX4925_TIMER_ITMR, temp ); \
    112     temp = TX4925_REG_READ( TX4925_REG_BASE, TX4925_TIMER0_BASE + TX4925_TIMER_PGMR ); /* Disable pulse generator interrupt */ \
    113     temp &= ~(TPIAE | TPIBE); \
    114     TX4925_REG_WRITE( TX4925_REG_BASE, TX4925_TIMER0_BASE + TX4925_TIMER_PGMR, temp ); \
    115     TX4925_REG_WRITE( TX4925_REG_BASE, TX4925_TIMER0_BASE + TX4925_TIMER_TCR, 0x0 ); /* Disable timer */ \
    116   } while(0)
    117 
    118106#define CLOCK_DRIVER_USE_DUMMY_TIMECOUNTER
    119107
  • bsps/mips/rbtx4938/clock/clockdrv.c

    r718a84af r7ee59313  
    101101
    102102
    103 
    104 #define Clock_driver_support_shutdown_hardware() \
    105   do { \
    106         uint32_t temp; \
    107     temp = TX4938_REG_READ( TX4938_REG_BASE, TX4938_TIMER0_BASE + TX4938_TIMER_ITMR ); /* Disable interval timer interrupt */ \
    108     temp &= ~TIMER_INT_ENABLE_MASK; \
    109     TX4938_REG_WRITE( TX4938_REG_BASE, TX4938_TIMER0_BASE + TX4938_TIMER_ITMR, temp ); \
    110     temp = TX4938_REG_READ( TX4938_REG_BASE, TX4938_TIMER0_BASE + TX4938_TIMER_PGMR ); /* Disable pulse generator interrupt */ \
    111     temp &= ~(TPIAE | TPIBE); \
    112     TX4938_REG_WRITE( TX4938_REG_BASE, TX4938_TIMER0_BASE + TX4938_TIMER_PGMR, temp ); \
    113     TX4938_REG_WRITE( TX4938_REG_BASE, TX4938_TIMER0_BASE + TX4938_TIMER_TCR, 0x0 ); /* Disable timer */ \
    114   } while(0)
    115 
    116 
    117103#define CLOCK_DRIVER_USE_DUMMY_TIMECOUNTER
    118104
  • bsps/mips/shared/clock/clockdrv.c

    r718a84af r7ee59313  
    4040  } while(0)
    4141
    42 #define Clock_driver_support_shutdown_hardware() \
    43   do { \
    44     mips_disable_in_interrupt_mask(CLOCK_VECTOR_MASK); \
    45   } while (0)
    46 
    4742#define CLOCK_DRIVER_USE_DUMMY_TIMECOUNTER
    4843
  • bsps/nios2/nios2_iss/clock/clock.c

    r718a84af r7ee59313  
    2121#define Clock_driver_support_install_isr(_new) \
    2222  set_vector(_new, CLOCK_VECTOR, 1)
    23 
    24 /*
    25  * Turn off the clock
    26  */
    27 #define Clock_driver_support_shutdown_hardware() \
    28   do { \
    29     CLOCK_REGS->control = ALTERA_AVALON_TIMER_CONTROL_STOP_MSK; \
    30   } while (0)
    3123
    3224/*
  • bsps/or1k/generic_or1k/clock/clockdrv.c

    r718a84af r7ee59313  
    113113}
    114114
    115 static void generic_or1k_clock_cleanup(void)
    116 {
    117  uint32_t sr;
    118 
    119   sr = _OR1K_mfspr(CPU_OR1K_SPR_SR);
    120 
    121   /* Disable tick timer exceptions */
    122   _OR1K_mtspr(CPU_OR1K_SPR_SR, (sr & ~CPU_OR1K_SPR_SR_IEE)
    123   & ~CPU_OR1K_SPR_SR_TEE);
    124 
    125   /* Invalidate tick timer config registers */
    126   _OR1K_mtspr(CPU_OR1K_SPR_TTCR, 0);
    127   _OR1K_mtspr(CPU_OR1K_SPR_TTMR, 0);
    128 }
    129 
    130115CPU_Counter_ticks _CPU_Counter_difference(
    131116  CPU_Counter_ticks second,
     
    143128  generic_or1k_clock_handler_install(isr)
    144129
    145 #define Clock_driver_support_shutdown_hardware() generic_or1k_clock_cleanup()
    146 
    147130#include "../../../shared/dev/clock/clockimpl.h"
  • bsps/powerpc/mpc55xxevb/clock/clock-config.c

    r718a84af r7ee59313  
    236236}
    237237
    238 static void mpc55xx_clock_cleanup(void)
    239 {
    240   volatile PIT_RTI_CHANNEL_tag *channel =
    241     &PIT_RTI.CHANNEL [MPC55XX_CLOCK_PIT_CHANNEL];
    242 
    243   channel->TCTRL.R = 0;
    244 }
    245 
    246238#endif
    247239
     
    251243#define Clock_driver_support_install_isr(isr) \
    252244  mpc55xx_clock_handler_install(isr)
    253 #define Clock_driver_support_shutdown_hardware() \
    254   mpc55xx_clock_cleanup()
    255245
    256246/* Include shared source clock driver code */
  • bsps/powerpc/qoriq/clock/clock-config.c

    r718a84af r7ee59313  
    145145}
    146146
    147 static void qoriq_clock_cleanup(void)
    148 {
    149   rtems_status_code sc = RTEMS_SUCCESSFUL;
    150 
    151   qoriq_clock->bcr = GTBCR_CI;
    152 
    153   sc = rtems_interrupt_handler_remove(
    154     CLOCK_INTERRUPT,
    155     Clock_isr,
    156     NULL
    157   );
    158   if (sc != RTEMS_SUCCESSFUL) {
    159     rtems_fatal_error_occurred(0xdeadbeef);
    160   }
    161 }
    162 
    163147#define Clock_driver_support_install_isr(clock_isr) \
    164148  qoriq_clock_handler_install()
     
    166150#define Clock_driver_support_set_interrupt_affinity(online_processors) \
    167151  bsp_interrupt_set_affinity(CLOCK_INTERRUPT, online_processors)
    168 
    169 #define Clock_driver_support_shutdown_hardware() \
    170   qoriq_clock_cleanup()
    171152
    172153#endif /* QORIQ_IS_HYPERVISOR_GUEST */
  • bsps/riscv/riscv_generic/clock/clockdrv.c

    r718a84af r7ee59313  
    105105}
    106106
    107 static void riscv_generic_clock_cleanup(void)
    108 {
    109   /* Disable mtimer interrupts */
    110   clear_csr(mie, MIP_MTIP);
    111   clear_csr(mip, MIP_MTIP);
    112 }
    113 
    114107CPU_Counter_ticks _CPU_Counter_difference(
    115108  CPU_Counter_ticks second,
     
    127120  riscv_generic_clock_handler_install(isr)
    128121
    129 #define Clock_driver_support_shutdown_hardware() riscv_generic_clock_cleanup()
    130 
    131122#include "../../../shared/dev/clock/clockimpl.h"
  • bsps/shared/dev/clock/clock-simidle.c

    r718a84af r7ee59313  
    1212#define CLOCK_VECTOR 0
    1313
    14 volatile bool clock_driver_enabled;
    15 
    1614#define Clock_driver_support_initialize_hardware() \
    17   do { \
    18     clock_driver_enabled = true; \
    19   } while (0)
    20 
    21 #define Clock_driver_support_shutdown_hardware() \
    22   do { \
    23     clock_driver_enabled = false; \
    24   } while (0)
     15  do { } while (0)
    2516
    2617#define CLOCK_DRIVER_USE_DUMMY_TIMECOUNTER
     
    4738{
    4839  for( ; ; ) {
    49     if ( clock_driver_enabled ) {
    50       Per_CPU_Control *cpu = _Thread_Dispatch_disable();
    51       _ISR_Nest_level++;
    52       rtems_clock_tick();
    53       _ISR_Nest_level--;
    54       _Thread_Dispatch_enable( cpu );
    55       BSP_CLOCK_DRIVER_DELAY();
    56     }
     40    Per_CPU_Control *cpu = _Thread_Dispatch_disable();
     41    _ISR_Nest_level++;
     42    rtems_clock_tick();
     43    _ISR_Nest_level--;
     44    _Thread_Dispatch_enable( cpu );
     45    BSP_CLOCK_DRIVER_DELAY();
    5746  }
    5847  return 0;   /* to avoid warning */
  • bsps/shared/dev/clock/clockimpl.h

    r718a84af r7ee59313  
    111111
    112112#ifdef Clock_driver_support_shutdown_hardware
    113 void Clock_exit( void );
     113#error "Clock_driver_support_shutdown_hardware() is no longer supported"
    114114#endif
    115115
     
    191191}
    192192
    193 #ifdef Clock_driver_support_shutdown_hardware
    194 /**
    195  *  @brief Clock_exit
    196  *
    197  *  This routine allows the clock driver to exit by masking the interrupt and
    198  *  disabling the clock's counter.
    199  */
    200 void Clock_exit( void )
    201 {
    202   Clock_driver_support_shutdown_hardware();
    203 
    204   /* do not restore old vector */
    205 }
    206 #endif
    207 
    208193/**
    209194 * @brief Clock_initialize
     
    246231  Clock_driver_support_initialize_hardware();
    247232
    248 #ifdef Clock_driver_support_shutdown_hardware
    249   atexit( Clock_exit );
    250 #endif
    251 
    252233  /*
    253234   *  If we are counting ISRs per tick, then initialize the counter.
  • bsps/sparc/erc32/clock/ckinit.c

    r718a84af r7ee59313  
    123123#define Clock_driver_timecounter_tick() erc32_tc_tick()
    124124
    125 #define Clock_driver_support_shutdown_hardware() \
    126   do { \
    127     ERC32_Mask_interrupt( ERC32_INTERRUPT_REAL_TIME_CLOCK ); \
    128      \
    129     ERC32_MEC_Set_Real_Time_Clock_Timer_Control( \
    130       ERC32_MEC_TIMER_COUNTER_DISABLE_COUNTING \
    131     ); \
    132   } while (0)
    133 
    134125#include "../../../shared/dev/clock/clockimpl.h"
    135126
  • bsps/sparc/leon2/clock/ckinit.c

    r718a84af r7ee59313  
    9292  } while (0)
    9393
    94 #define Clock_driver_support_shutdown_hardware() \
    95   do { \
    96     LEON_Mask_interrupt( LEON_INTERRUPT_TIMER1 ); \
    97     LEON_REG.Timer_Control_1 = 0; \
    98   } while (0)
    99 
    10094#define Clock_driver_timecounter_tick() leon2_tc_tick()
    10195
  • bsps/sparc/leon3/clock/ckinit.c

    r718a84af r7ee59313  
    268268  leon3_clock_initialize()
    269269
    270 #define Clock_driver_support_shutdown_hardware() \
    271   do { \
    272     LEON_Mask_interrupt(LEON_TRAP_TYPE(clkirq)); \
    273     LEON3_Timer_Regs->timer[LEON3_CLOCK_INDEX].ctrl = 0; \
    274   } while (0)
    275 
    276270#define Clock_driver_timecounter_tick() leon3_tc_do_tick()
    277271
  • bsps/sparc/shared/btimer/tlib_ckinit.c

    r718a84af r7ee59313  
    175175}
    176176
    177 static void tlib_clock_shutdown_hardware(void)
    178 {
    179   if (priv.tlib_tick) {
    180     tlib_stop(priv.tlib_tick);
    181     priv.tlib_tick = NULL;
    182   }
    183   if (priv.ops->shutdown_hardware) {
    184     priv.ops->shutdown_hardware();
    185   }
    186 }
    187 
    188177/** Simple counter **/
    189178static uint32_t simple_tlib_tc_get(rtems_timecounter_simple *tc)
     
    433422  } while (0)
    434423
    435 #define Clock_driver_support_shutdown_hardware() \
    436   tlib_clock_shutdown_hardware()
    437 
    438424#define Clock_driver_timecounter_tick() \
    439425  tlib_clock_timecounter_tick()
  • bsps/sparc64/shared/clock/ckinit.c

    r718a84af r7ee59313  
    112112}
    113113
    114 #define Clock_driver_support_shutdown_hardware( ) \
    115   do { \
    116     \
    117   } while ( 0 )
    118 
    119114#define CLOCK_DRIVER_USE_DUMMY_TIMECOUNTER
    120115
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