Changeset 7ed8ad0 in rtems


Ignore:
Timestamp:
Jul 19, 2017, 1:54:16 PM (2 years ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
master
Children:
5f1ae90e
Parents:
0ea7ca9
git-author:
Sebastian Huber <sebastian.huber@…> (07/19/17 13:54:16)
git-committer:
Sebastian Huber <sebastian.huber@…> (07/19/17 13:55:44)
Message:

bsps/sparc: Fix cache support

Fix infinite loop in rtems_invalidate_multiple_instruction_lines().
Implement this function.

Close #3080.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libcpu/sparc/cache/cache_.h

    r0ea7ca9 r7ed8ad0  
    2020#define CPU_INSTRUCTION_CACHE_ALIGNMENT 0
    2121
     22#define CPU_CACHE_SUPPORT_PROVIDES_RANGE_FUNCTIONS
     23
    2224static inline void _CPU_cache_invalidate_entire_instruction ( void )
    2325{
     
    2527}
    2628
     29static inline void _CPU_cache_invalidate_instruction_range(
     30  const void *i_addr,
     31  size_t      n_bytes
     32)
     33{
     34  __asm__ volatile ("flush");
     35}
     36
    2737/* XXX these need to be addressed */
    28 
    29 static inline void _CPU_cache_invalidate_1_instruction_line (
    30   const void * i_addr )
    31 {
    32 }
    3338
    3439static inline void _CPU_cache_freeze_instruction ( void )
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