Changeset 7e85bfbe in rtems for c/src/lib/libbsp/powerpc/shared/bootloader/exception.S

Timestamp:

Aug 24, 2011, 9:48:56 AM (10 years ago)

Author:

Sebastian Huber <sebastian.huber@…>

Branches:

4.11, 5, master

Children:

01750d5

Parents:

1d367a49

Message:

2011-08-24 Sebastian Huber <sebastian.huber@…>

• shared/bootloader/exception.S, shared/bootloader/misc.c, shared/bootloader/mm.c, shared/console/polled_io.c, shared/startup/probeMemEnd.c: Update due to API changes.

File:

• c/src/lib/libbsp/powerpc/shared/bootloader/exception.S (modified) (5 diffs)

c/src/lib/libbsp/powerpc/shared/bootloader/exception.S

@@ -153 +153 @@
         andi.   r3,r1,8       # check for guarded memory
         bne-    5f
-        mtspr   RPA,r1
+        mtspr   PPC_RPA,r1
         mfsrr1  r3
         tlbli   r0
@@ -169 +169 @@
         mfsrr1  r3            # get saved cr0 bits now to dual issue
         ori     r1,r1,0x100
-        mtspr   RPA,r1
+        mtspr   PPC_RPA,r1
         tlbli   r0
 /* Do not update PTE if R bit already set, this will save one cache line
@@ -249 +249 @@
         mfspr   r0,DMISS      # get miss address during load delay
 #ifdef ASSUME_REF_SET
-        mtspr   RPA,r1
+        mtspr   PPC_RPA,r1
         mfsrr1  r3
         tlbld   r0
@@ -256 +256 @@
         mfsrr1  r3            # get saved cr0 bits now to dual issue
         ori     r1,r1,0x100
-        mtspr   RPA,r1
+        mtspr   PPC_RPA,r1
         tlbld   r0
 /* Do not update PTE if R bit already set, this will save one cache line
@@ -327 +327 @@
         beq-    5f            # if (C==0) go to check protection
 3:      mfsrr1  r3            # get the saved cr0 bits
-        mtspr   RPA,r1        # set the pte
+        mtspr   PPC_RPA,r1        # set the pte
         tlbld   r0            # load the dtlb
         mtcrf   0x80,r3       # restore CR0