Changeset 7e278aa in rtems


Ignore:
Timestamp:
Dec 18, 2006, 10:21:19 PM (13 years ago)
Author:
Till Straumann <strauman@…>
Children:
3f933c9
Parents:
36cb812
Message:
  • startup/bspstart.c: Changed BSP_installVME_isr() so that the special handling of a 'FPGA interrupt' [this FPGA is *not* present on the uC5282 module but is externally connected to IRQ1 on Eric Norum's particular 'motherboard'] is only activated when connecting to the special vectors > 192. The change allows us ordinary users [:-)] to use IRQ1 normally, simply by connecting an ISR to vector 64+1... Also, BSP_enable_irq_at_pic(), BSP_disable_irq_at_pic(), BSP_irq_is_enabled_at_pic() were introduced (compat. with some PPC BSPs).
Location:
c/src/lib/libbsp/m68k/uC5282
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/m68k/uC5282/ChangeLog

    r36cb812 r7e278aa  
     12006-12-18      Till Straumann <strauman@slac.stanford.edu>
     2
     3        * startup/bspstart.c: Changed BSP_installVME_isr() so that
     4        the special handling of a 'FPGA interrupt' [this FPGA is *not*
     5        present on the uC5282 module but is externally connected to
     6        IRQ1 on Eric Norum's particular 'motherboard'] is only
     7        activated when connecting to the special vectors > 192.
     8        The change allows us ordinary users [:-)] to use IRQ1
     9        normally, simply by connecting an ISR to vector 64+1...
     10        Also, BSP_enable_irq_at_pic(), BSP_disable_irq_at_pic(),
     11        BSP_irq_is_enabled_at_pic() were introduced (compat. with
     12        some PPC BSPs).
     13
    1142006-12-02      Ralf Corsépius <ralf.corsepius@rtems.org>
    215
  • c/src/lib/libbsp/m68k/uC5282/startup/bspstart.c

    r36cb812 r7e278aa  
    466466
    467467static rtems_isr
     468fpga_trampoline (rtems_vector_number v)
     469{
     470        /*
     471         * Handle FPGA interrupts until all have been consumed
     472         */
     473        int loopcount = 0;
     474        while (((v = FPGA_IRQ_INFO) & 0x80) != 0) {
     475                v = 192 + (v & 0x3f);
     476                if (++loopcount >= 50) {
     477                        rtems_interrupt_level level;
     478                        rtems_interrupt_disable(level);
     479                        printk("\nTOO MANY FPGA INTERRUPTS (LAST WAS 0x%x) -- DISABLING ALL FPGA INTERRUPTS.\n", v & 0x3f);
     480                        MCF5282_INTC0_IMRL |= MCF5282_INTC_IMRL_INT1;
     481                        rtems_interrupt_enable(level);
     482                        return;
     483                }
     484                if (handlerTab[v].func)  {
     485                        (*handlerTab[v].func)(handlerTab[v].arg, (unsigned long)v);
     486                }
     487                else {
     488                        rtems_interrupt_level level;
     489                        rtems_vector_number nv;
     490                        rtems_interrupt_disable(level);
     491                        printk("\nSPURIOUS FPGA INTERRUPT (0x%x).\n", v & 0x3f);
     492                        if ((((nv = FPGA_IRQ_INFO) & 0x80) != 0)
     493                                        && ((nv & 0x3f) == (v & 0x3f))) {
     494                                printk("DISABLING ALL FPGA INTERRUPTS.\n");
     495                                MCF5282_INTC0_IMRL |= MCF5282_INTC_IMRL_INT1;
     496                        }
     497                        rtems_interrupt_enable(level);
     498                        return;
     499                }
     500        }
     501}
     502
     503static rtems_isr
    468504trampoline (rtems_vector_number v)
    469505{
    470     /*
    471      * Handle FPGA interrupts until all have been consumed
    472      */
    473     if (v == FPGA_VECTOR) {
    474         int loopcount = 0;
    475         while (((v = FPGA_IRQ_INFO) & 0x80) != 0) {
    476             v = 192 + (v & 0x3f);
    477             if (++loopcount >= 50) {
    478                 rtems_interrupt_level level;
    479                 rtems_interrupt_disable(level);
    480                 printk("\nTOO MANY FPGA INTERRUPTS (LAST WAS 0x%x) -- DISABLING ALL FPGA INTERRUPTS.\n", v & 0x3f);
    481                 MCF5282_INTC0_IMRL |= MCF5282_INTC_IMRL_INT1;
    482                 rtems_interrupt_enable(level);
    483                 return;
    484             }
    485             if (handlerTab[v].func)  {
    486                 (*handlerTab[v].func)(handlerTab[v].arg, (unsigned long)v);
    487             }
    488             else {
    489                 rtems_interrupt_level level;
    490                 rtems_vector_number nv;
    491                 rtems_interrupt_disable(level);
    492                 printk("\nSPURIOUS FPGA INTERRUPT (0x%x).\n", v & 0x3f);
    493                 if ((((nv = FPGA_IRQ_INFO) & 0x80) != 0)
    494                  && ((nv & 0x3f) == (v & 0x3f))) {
    495                     printk("DISABLING ALL FPGA INTERRUPTS.\n");
    496                     MCF5282_INTC0_IMRL |= MCF5282_INTC_IMRL_INT1;
    497                 }
    498                 rtems_interrupt_enable(level);
    499                 return;
    500             }
    501         }
    502     }
    503     else if (handlerTab[v].func)
     506    if (handlerTab[v].func)
    504507        (*handlerTab[v].func)(handlerTab[v].arg, (unsigned long)v);
    505508}
    506509
     510static void
     511enable_irq(unsigned source)
     512{
     513rtems_interrupt_level level;
     514        rtems_interrupt_disable(level);
     515        if (source >= 32)
     516                MCF5282_INTC0_IMRH &= ~(1 << (source - 32));
     517        else
     518                MCF5282_INTC0_IMRL &= ~((1 << source) |
     519                                MCF5282_INTC_IMRL_MASKALL);
     520        rtems_interrupt_enable(level);
     521}
     522
     523static void
     524disable_irq(unsigned source)
     525{
     526rtems_interrupt_level level;
     527
     528        rtems_interrupt_disable(level);
     529        if (source >= 32)
     530                MCF5282_INTC0_IMRH |= (1 << (source - 32));
     531        else
     532                MCF5282_INTC0_IMRL |= (1 << source);
     533        rtems_interrupt_enable(level);
     534}
     535
     536void
     537BSP_enable_irq_at_pic(rtems_vector_number v)
     538{
     539int                   source = v - 64;
     540
     541        if ( source > 0 && source < 64 ) {
     542                enable_irq(source);
     543        }
     544}
     545
     546void
     547BSP_disable_irq_at_pic(rtems_vector_number v)
     548{
     549int                   source = v - 64;
     550
     551        if ( source > 0 && source < 64 ) {
     552                disable_irq(source);
     553        }
     554}
     555
    507556int
    508 BSP_installVME_isr(unsigned long vector, BSP_VME_ISR_t handler, void *usrArg)
    509 {
    510     rtems_isr_entry old_handler;
    511     rtems_interrupt_level level;
    512 
    513     /*
    514      * Register the handler information
    515      */
    516     if (vector >= NVECTOR)
    517         return -1;
    518     handlerTab[vector].func = handler;
    519     handlerTab[vector].arg = usrArg;
    520 
    521     /*
    522      * If this is an external FPGA ('VME') vector set up the real IRQ.
    523      */
    524     if ((vector >= 192) && (vector <= 255)) {
    525         int i;
    526         static volatile int setupDone;
    527         rtems_interrupt_disable(level);
    528         if (setupDone) {
    529             rtems_interrupt_enable(level);
    530             return 0;
    531         }
    532         MCF5282_EPORT_EPPAR &= ~FPGA_EPPAR;
    533         MCF5282_EPORT_EPDDR &= ~FPGA_EPDDR;
    534         MCF5282_EPORT_EPIER |=  FPGA_EPIER;
    535         MCF5282_INTC0_IMRL &= ~(MCF5282_INTC_IMRL_INT1 |
    536                                 MCF5282_INTC_IMRL_MASKALL);
    537         setupDone = 1;
    538         i = BSP_installVME_isr(FPGA_VECTOR, NULL, NULL);
    539         rtems_interrupt_enable(level);
    540         return i;
    541     }
    542 
    543     /*
    544      * Make the connection between the interrupt and the local handler
    545      */
    546     rtems_interrupt_catch(trampoline, vector, &old_handler);
     557BSP_irq_is_enabled_at_pic(rtems_vector_number v)
     558{
     559int                   source = v - 64;
     560
     561        if ( source > 0 && source < 64 ) {
     562                return ! ((source >= 32) ?
     563                        MCF5282_INTC0_IMRH & (1 << (source - 32)) :
     564                        MCF5282_INTC0_IMRL & (1 << source));
     565        }
     566        return -1;
     567}
     568
     569
     570static int
     571init_intc0_bit(unsigned long vector)
     572{
     573rtems_interrupt_level level;
    547574
    548575    /*
     
    551578     * Interrupt sources 1 through 7 are fixed level/priority
    552579     */
     580
    553581    if ((vector >= 65) && (vector <= 127)) {
    554582        int l, p;
     
    571599                                                       MCF5282_INTC_ICR_IL(l) |
    572600                                                       MCF5282_INTC_ICR_IP(p);
    573                     rtems_interrupt_disable(level);
    574                     if (source >= 32)
    575                         MCF5282_INTC0_IMRH &= ~(1 << (source - 32));
    576                     else
    577                         MCF5282_INTC0_IMRL &= ~((1 << source) |
    578                                                 MCF5282_INTC_IMRL_MASKALL);
    579                     rtems_interrupt_enable(level);
     601                                        enable_irq(source);
    580602                    return 0;
    581603                }
     
    584606        return -1;
    585607    }
    586     return 0;
     608        return 0;
     609}
     610
     611int
     612BSP_installVME_isr(unsigned long vector, BSP_VME_ISR_t handler, void *usrArg)
     613{
     614    rtems_isr_entry old_handler;
     615    rtems_interrupt_level level;
     616
     617    /*
     618     * Register the handler information
     619     */
     620    if (vector >= NVECTOR)
     621        return -1;
     622    handlerTab[vector].func = handler;
     623    handlerTab[vector].arg = usrArg;
     624
     625    /*
     626     * If this is an external FPGA ('VME') vector set up the real IRQ.
     627     */
     628    if ((vector >= 192) && (vector <= 255)) {
     629        int i;
     630        static volatile int setupDone;
     631        rtems_interrupt_disable(level);
     632        if (setupDone) {
     633            rtems_interrupt_enable(level);
     634            return 0;
     635        }
     636        MCF5282_EPORT_EPPAR &= ~FPGA_EPPAR;
     637        MCF5282_EPORT_EPDDR &= ~FPGA_EPDDR;
     638        MCF5282_EPORT_EPIER |=  FPGA_EPIER;
     639        MCF5282_INTC0_IMRL &= ~(MCF5282_INTC_IMRL_INT1 |
     640                                MCF5282_INTC_IMRL_MASKALL);
     641        setupDone = 1;
     642        handlerTab[vector].func = NULL;
     643        handlerTab[vector].arg  = NULL;
     644                rtems_interrupt_catch(fpga_trampoline, FPGA_VECTOR, &old_handler);
     645        i = init_intc0_bit(FPGA_VECTOR);
     646        rtems_interrupt_enable(level);
     647        return i;
     648    }
     649
     650    /*
     651     * Make the connection between the interrupt and the local handler
     652     */
     653    rtems_interrupt_catch(trampoline, vector, &old_handler);
     654
     655    return init_intc0_bit(vector);
    587656}
    588657
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