Changeset 7cb93250 in rtems


Ignore:
Timestamp:
03/06/17 10:14:23 (7 years ago)
Author:
Martin Aberg <maberg@…>
Branches:
5, master
Children:
fd9fb21
Parents:
f600458d
git-author:
Martin Aberg <maberg@…> (03/06/17 10:14:23)
git-committer:
Daniel Hellstrom <daniel@…> (05/02/17 10:34:45)
Message:

leon, apbuart: added register defines: FIFO, delay int

The FIFOs available capability bit is available in the UART Control Register:
FIFOs available (FA) - Set to 1 when receiver and transmitter FIFOs are
available. When 0, only holding register is available.

Delay interrupt can delay a receive character interrupt to better handle RX bursts.

File:
1 edited

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