Index: c/src/lib/libbsp/m68k/uC5282/ChangeLog
===================================================================
--- c/src/lib/libbsp/m68k/uC5282/ChangeLog	(revision 7a6d1a341f2cd4770c1d2b074baa326f7479cad4)
+++ c/src/lib/libbsp/m68k/uC5282/ChangeLog	(revision 7c7184a49f274498c62440f593b1802f1e8f60f9)
@@ -1,2 +1,7 @@
+2005-02-01  Eric Norum <norume@aps.anl.gov>
+
+	* start/start.S, network/network.c: Place FEC buffer descriptors in SRAM.
+	  No longer need to worry about buffer descriptor caching.
+
 2005-01-31  Eric Norum <norume@aps.anl.gov>
 
Index: c/src/lib/libbsp/m68k/uC5282/network/network.c
===================================================================
--- c/src/lib/libbsp/m68k/uC5282/network/network.c	(revision 7a6d1a341f2cd4770c1d2b074baa326f7479cad4)
+++ c/src/lib/libbsp/m68k/uC5282/network/network.c	(revision 7c7184a49f274498c62440f593b1802f1e8f60f9)
@@ -124,5 +124,5 @@
 
 /*
- * Allocate buffer descriptors
+ * Allocate buffer descriptors from (non-cached) on-chip static RAM
  * Ensure 128-bit (16-byte) alignment
  */
@@ -130,11 +130,11 @@
 mcf5282_bd_allocate(unsigned int count)
 {
-    mcf5282BufferDescriptor_t *p;
-
-    p = malloc((count * sizeof(mcf5282BufferDescriptor_t)) + 15, 0, M_NOWAIT);
-    if (!p)
-        rtems_panic("FEC BD");
-    if ((int)p & 0xF)
-        p = (mcf5282BufferDescriptor_t *)((char *)p + (16 - ((int)p & 0xF)));
+    extern char __SRAMBASE[];
+    static mcf5282BufferDescriptor_t *bdp = (mcf5282BufferDescriptor_t *)__SRAMBASE;
+    mcf5282BufferDescriptor_t *p = bdp;
+
+    bdp += count;
+    if ((int)bdp & 0xF)
+        bdp = (mcf5282BufferDescriptor_t *)((char *)bdp + (16 - ((int)bdp & 0xF)));
     return p;
 }
@@ -303,13 +303,7 @@
 {
     struct mbuf *m, *n;
-    volatile mcf5282BufferDescriptor_t *txBd;
-
-    for (;;) {
-        if (sc->txBdActiveCount == 0)
-            return;
-        txBd = sc->txBdBase + sc->txBdTail;
-        rtems_cache_invalidate_multiple_data_lines(txBd, sizeof *txBd);
-        if ((txBd->status & MCF5282_FEC_TxBD_R) != 0)
-            return;
+
+    while ((sc->txBdActiveCount != 0)
+        && ((sc->txBdBase[sc->txBdTail].status & MCF5282_FEC_TxBD_R) == 0)) {
         m = sc->txMbuf[sc->txBdTail];
         MFREE(m, n);
@@ -360,7 +354,5 @@
          * Wait for packet if there's not one ready
          */
-        rtems_cache_invalidate_multiple_data_lines(rxBd, sizeof *rxBd);
         if ((status = rxBd->status) & MCF5282_FEC_RxBD_E) {
-int chkCount=0 ;
             /*
              * Clear old events.
@@ -374,11 +366,7 @@
              * `if' above, and the clearing of the RXF bit in the EIR.
              */
-            for (;;) {
+            while ((status = rxBd->status) & MCF5282_FEC_RxBD_E) {
                 rtems_event_set events;
                 int level;
-
-                rtems_cache_invalidate_multiple_data_lines(rxBd, sizeof *rxBd);
-                if (((status = rxBd->status) & MCF5282_FEC_RxBD_E) == 0)
-                    break;
 
                 rtems_interrupt_disable(level);
@@ -404,5 +392,5 @@
 
             /*
-             * Invalidate the cache and push the packet up
+             * Invalidate the cache and push the packet up.
              * The cache is so small that it's more efficient to just
              * invalidate the whole thing unless the packet is very small.
Index: c/src/lib/libbsp/m68k/uC5282/start/start.S
===================================================================
--- c/src/lib/libbsp/m68k/uC5282/start/start.S	(revision 7a6d1a341f2cd4770c1d2b074baa326f7479cad4)
+++ c/src/lib/libbsp/m68k/uC5282/start/start.S	(revision 7c7184a49f274498c62440f593b1802f1e8f60f9)
@@ -314,9 +314,5 @@
     PUBLIC (start)
 SYM(start):
-    move.w  #0x2700,sr                  | Disable interrupts
-
-    move.l  #__SRAMBASE+1,d0     | Enable the MCF5282 internal SRAM
-    movec   d0,%rambar          | ...so we have a stack
-    move.l  #__SRAMBASE+SRAM_SIZE-4,sp   | Overwrite the fake stack pointer
+    move.w  #0x2700,sr                 | Disable interrupts
 
     /*
@@ -324,7 +320,11 @@
      * moved the IPSBAR, we're doomed........
      */
-    move.l  #__IPSBAR+1,d0      | Enable the MCF5282 internal peripherals
+    move.l  #__IPSBAR+1,d0             | Enable the MCF5282 internal peripherals
     move.l  d0,DEFAULT_IPSBAR
-    
+    move.l  #__SRAMBASE+0x201,d0       | Enable the MCF5282 internal SRAM
+    movec   d0,%rambar                 | CPU-space copy of RAMBAR
+    move.l  d0,DEFAULT_IPSBAR+8        | Memory-space copy of RAMBAR
+    move.l  #__SRAMBASE+SRAM_SIZE-4,sp | Overwrite the fake stack pointer
+
     /*
      * Copy the vector table to address 0 (VBR must be 0 mod 2^20)
