Changeset 7afe5a2 in rtems


Ignore:
Timestamp:
Jun 3, 2006, 3:14:07 AM (14 years ago)
Author:
Jay Monkman <jtm@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
bc19e2a
Parents:
ada5201
Message:

2006-06-02 Jay Monkman

  • at91rm9200/irq/bsp_irq_init.c, mc9328mxl/clock/clockdrv.c, mc9328mxl/irq/bsp_irq_asm.S, mc9328mxl/irq/bsp_irq_init.c, mc9328mxl/irq/irq.c, mc9328mxl/irq/irq.h, s3c2400/irq/bsp_irq_init.c: Changed interrupt handling to use shared rtems_irq_connect_data struct.
Location:
c/src/lib/libcpu/arm
Files:
9 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libcpu/arm/ChangeLog

    rada5201 r7afe5a2  
     12006-06-02      Jay Monkman
     2
     3        * shared/arm920/mmu.c: Fixed bug in mmu_get_ctrl(),
     4        added mmu_set_cpu_async() function.
     5
    162006-06-02      Jay Monkman
    27
  • c/src/lib/libcpu/arm/at91rm9200/irq/bsp_irq_init.c

    rada5201 r7afe5a2  
    2424void BSP_rtems_irq_mngt_init()
    2525{
     26    long *vectorTable;
     27    int i;
     28
     29    vectorTable = (long *) VECTOR_TABLE;
     30
     31    /* Initialize the vector table contents with default handler */
     32    for (i=0; i<BSP_MAX_INT; i++) {
     33        *(vectorTable + i) = (long)(default_int_handler);
     34    }
     35
    2636    /* disable all interrupts */
    2737    AIC_CTL_REG(AIC_IDCR) = 0xffffffff;
  • c/src/lib/libcpu/arm/mc9328mxl/clock/clockdrv.c

    rada5201 r7afe5a2  
    2929
    3030/* Replace the first value with the clock's interrupt name. */
    31 rtems_irq_connect_data clock_isr_data = {BSP_INT_TIMER1,
    32                                          (rtems_irq_hdl)Clock_isr,
    33                                          clock_isr_on,
    34                                          clock_isr_off,
    35                                          clock_isr_is_on,
    36                                          3,     /* unused for ARM cpus */
    37                                          0 };   /* unused for ARM cpus */
     31rtems_irq_connect_data clock_isr_data = {
     32    .name   = BSP_INT_TIMER1,
     33    .hdl    = (rtems_irq_hdl)Clock_isr,
     34    .handle = (void *)BSP_INT_TIMER1,
     35    .on     = clock_isr_on,
     36    .off    = clock_isr_off,
     37    .isOn   = clock_isr_is_on,
     38};
    3839
    3940/* If you follow the code, this is never used, so any value
     
    8384        freq = get_perclk1_freq(); \
    8485        printk("perclk1 freq is %d\n", freq); \
    85         cnt = ((freq / 1000) * BSP_Configuration.microseconds_per_tick) / 1000;\
     86        cnt = ((long long)freq * BSP_Configuration.microseconds_per_tick + 500000) / 1000000;\
    8687        printk("cnt freq is %d\n", cnt); \
    8788        MC9328MXL_TMR1_TCMP = cnt; \
  • c/src/lib/libcpu/arm/mc9328mxl/irq/bsp_irq_asm.S

    rada5201 r7afe5a2  
    3232  /* find the ISR's address based on the vector */     
    3333  ldr   r0, =bsp_vector_table
    34   ldr   r0, [r0, r1, LSL #2]    /* Read the address */
    35 
     34  mov   r1, r1, LSL #3          /* Shift vector to get offset into table */
     35  add   r1, r0, r1              /* r1 has address of vector entry */
     36  ldr   r0, [r1, #4]            /* Get the data pointer */
     37  ldr   r1, [r1]                /* Get the vector */
    3638
    3739  stmdb   sp!,{lr}
    3840  ldr     lr, =IRQ_return         /* prepare the return from handler  */
    3941
    40   mov     pc, r0                /* EXECUTE INT HANDLER */
     42  mov     pc, r1                /* EXECUTE INT HANDLER */
    4143
    4244IRQ_return:
  • c/src/lib/libcpu/arm/mc9328mxl/irq/bsp_irq_init.c

    rada5201 r7afe5a2  
    2424void BSP_rtems_irq_mngt_init()
    2525{
    26 #if 0
    27     /* disable all interrupts */
    28     AIC_CTL_REG(AIC_IDCR) = 0xffffffff;
    29 #endif
     26    int i;
    3027
     28    for (i = 0; i < BSP_MAX_INT; i++) {
     29        bsp_vector_table[i].vector = default_int_handler;
     30        bsp_vector_table[i].data   = NULL;
     31    }
    3132}
    3233
  • c/src/lib/libcpu/arm/mc9328mxl/irq/irq.c

    rada5201 r7afe5a2  
    1616#include <rtems/score/apiext.h>
    1717#include <mc9328mxl.h>
     18
     19mc9328mxl_irq_info_t bsp_vector_table[BSP_MAX_INT];
    1820
    1921/*
     
    3739{
    3840    rtems_interrupt_level level;
    39     rtems_irq_hdl *bsp_tbl;
    40 
    41     bsp_tbl = (rtems_irq_hdl *)&bsp_vector_table;
    4241   
    4342    if (!isValidInterrupt(irq->name)) {
     
    4847     * Check if default handler is actually connected. If not issue an error.
    4948     */
    50     if (bsp_tbl[irq->name] != default_int_handler) {
    51       return 0;
     49    if (bsp_vector_table[irq->name].vector != default_int_handler) {
     50        return 0;
    5251    }
    5352
     
    5756     * store the new handler
    5857     */
    59     bsp_tbl[irq->name] = irq->hdl;
     58    bsp_vector_table[irq->name].vector = irq->hdl;
     59    bsp_vector_table[irq->name].data = irq->handle;
    6060
    6161    /*
     
    8181{
    8282    rtems_interrupt_level level;
    83     rtems_irq_hdl *bsp_tbl;
    8483
    85     bsp_tbl = (rtems_irq_hdl *)&bsp_vector_table;
    86  
    8784    if (!isValidInterrupt(irq->name)) {
    8885      return 0;
     
    9188     * Check if the handler is actually connected. If not issue an error.
    9289     */
    93     if (bsp_tbl[irq->name] != irq->hdl) {
    94       return 0;
     90    if (bsp_vector_table[irq->name].vector != irq->hdl) {
     91        return 0;
    9592    }
    9693
     
    107104     * restore the default irq value
    108105     */
    109     bsp_tbl[irq->name] = default_int_handler;
    110    
     106    bsp_vector_table[irq->name].vector = default_int_handler;
     107    bsp_vector_table[irq->name].data = NULL;
    111108
    112109    _CPU_ISR_Enable(level);
  • c/src/lib/libcpu/arm/mc9328mxl/irq/irq.h

    rada5201 r7afe5a2  
    1515#ifndef __IRQ_H__
    1616#define __IRQ_H__
     17
     18#include <rtems/irq.h>
    1719
    1820#ifdef __cplusplus
     
    3537 **********************************************************************/
    3638
    37 /* possible interrupt sources on the AT91RM9200 */
     39/* possible interrupt sources on the MC9328MXL */
    3840#define BSP_INT_UART3_PFERR       0
    3941#define BSP_INT_UART3_RTS         1     
     
    102104#define BSP_MAX_INT              64
    103105             
    104 typedef unsigned char  rtems_irq_level;
    105 typedef unsigned char  rtems_irq_trigger;
     106typedef struct {
     107    rtems_irq_hdl       vector;
     108    rtems_irq_hdl_param data;
     109} mc9328mxl_irq_info_t;
    106110
    107 typedef unsigned int rtems_irq_number;
    108 struct  __rtems_irq_connect_data__;     /* forward declaratiuon */
    109111
    110 typedef void (*rtems_irq_hdl)       (void);
    111 typedef void (*rtems_irq_enable)    (const struct __rtems_irq_connect_data__*);
    112 typedef void (*rtems_irq_disable)   (const struct __rtems_irq_connect_data__*);
    113 typedef int  (*rtems_irq_is_enabled)(const struct __rtems_irq_connect_data__*);
    114112
    115 extern rtems_irq_hdl bsp_vector_table[BSP_MAX_INT];
    116 #define VECTOR_TABLE bsp_vector_table
    117                                                                                            
    118 typedef struct __rtems_irq_connect_data__ {
    119     /* IRQ line */
    120     rtems_irq_number              name;
    121 
    122     /* Handler */
    123     rtems_irq_hdl                 hdl;
    124 
    125     /* function for enabling interrupts at device level. */
    126     rtems_irq_enable              on;
    127 
    128     /* function for disabling interrupts at device level. */
    129     rtems_irq_disable             off;
    130 
    131     /* Function to test if interrupt is enabled */
    132     rtems_irq_is_enabled        isOn;
    133 
    134     /* priority level of interrupt */
    135     rtems_irq_level               irqLevel;
    136 
    137     /* Trigger method (rising/falling edge or high/low level) */
    138     rtems_irq_trigger             irqTrigger;
    139 } rtems_irq_connect_data;
     113extern mc9328mxl_irq_info_t bsp_vector_table[BSP_MAX_INT];
    140114
    141115/*
     
    144118void BSP_rtems_irq_mngt_init();
    145119
    146 
    147 /*
    148  * function to connect a particular irq handler.
    149  */
    150 int BSP_install_rtems_irq_handler       (const rtems_irq_connect_data*);
    151 
    152 /*
    153  * function to get the current RTEMS irq handler for ptr->name.
    154  */
    155 int BSP_get_current_rtems_irq_handler   (rtems_irq_connect_data* ptr);
    156 
    157 /*
    158  * function to disconnect the RTEMS irq handler for ptr->name.
    159  */
    160 int BSP_remove_rtems_irq_handler        (const rtems_irq_connect_data*);
    161120
    162121#endif /* __asm__ */
  • c/src/lib/libcpu/arm/s3c2400/irq/bsp_irq_init.c

    rada5201 r7afe5a2  
    2121void BSP_rtems_irq_mngt_init()
    2222{
     23    long *vectorTable;
     24    int i;
     25
     26    vectorTable = (long *) VECTOR_TABLE;
     27
     28    /* Initialize the vector table contents with default handler */
     29    for (i=0; i<BSP_MAX_INT; i++) {
     30        *(vectorTable + i) = (long)(default_int_handler);
     31    }
     32
    2333    /*
    2434     * Here is the code to initialize the INT for
  • c/src/lib/libcpu/arm/shared/arm920/mmu.c

    rada5201 r7afe5a2  
    152152{
    153153    uint32_t val;
    154     asm volatile ("msr 15, 0, %0, cr1, cr0\n" : "=r" (val));
     154    asm volatile ("mrc 15, 0, %0, cr1, cr0\n" : "=r" (val));
    155155    return val;
    156156}
     
    241241    }
    242242}
     243
     244
     245void mmu_set_cpu_async_mode(void)
     246{
     247    uint32_t reg;
     248    reg = mmu_get_ctrl();
     249    reg |= 0xc0000000;
     250    mmu_set_ctrl(reg);
     251}
     252   
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