Index: c/src/lib/libbsp/arm/lpc24xx/ChangeLog
===================================================================
--- c/src/lib/libbsp/arm/lpc24xx/ChangeLog	(revision d1be26b9efd7dca78a304d52104d9ff53f44298c)
+++ c/src/lib/libbsp/arm/lpc24xx/ChangeLog	(revision 7ae27751322a9b29ea9ff2adc146f064237127eb)
@@ -4,4 +4,16 @@
 	RTEMS_BSP_BOOTCARD_OPTIONS. Add RTEMS_BSP_CLEANUP_OPTIONS so all BSPs
 	have the same options.
+
+2009-07-15	Sebastian Huber <sebastian.huber@embedded-brains.de>
+
+	* i2c/i2c.c, include/i2c.h, include/idle.h, include/io.h, misc/idle.c,
+	misc/io.c: New files.
+	* Makefile.am, README, configure.ac, preinstall.am,
+	clock/clock-config.c, console/console-config.c, include/irq.h,
+	include/dma.h, include/lpc24xx.h, include/system-clocks.h, irq/irq.c,
+	misc/dma.c, misc/system-clocks.c, network/network.c, rtc/rtc-config.c,
+	startup/bspreset.c, startup/bspstart.c, startup/linkcmds,
+	startup/linkcmds.lpc2478, startup/linkcmds.lpc2478_ncs,
+	startup/linkcmds.lpc2478_ncs_ram: Changes throughout.
 
 2009-02-27	Sebastian Huber <sebastian.huber@embedded-brains.de>
Index: c/src/lib/libbsp/arm/lpc24xx/Makefile.am
===================================================================
--- c/src/lib/libbsp/arm/lpc24xx/Makefile.am	(revision d1be26b9efd7dca78a304d52104d9ff53f44298c)
+++ c/src/lib/libbsp/arm/lpc24xx/Makefile.am	(revision 7ae27751322a9b29ea9ff2adc146f064237127eb)
@@ -31,4 +31,5 @@
 include_bsp_HEADERS += ../../shared/include/irq-generic.h
 include_bsp_HEADERS += ../../shared/include/irq-info.h
+include_bsp_HEADERS += ../../shared/include/stackalloc.h
 include_bsp_HEADERS += ../../shared/tod.h
 include_bsp_HEADERS += ../shared/include/linker-symbols.h
@@ -40,4 +41,7 @@
 include_bsp_HEADERS += include/ssp.h
 include_bsp_HEADERS += include/dma.h
+include_bsp_HEADERS += include/idle.h
+include_bsp_HEADERS += include/i2c.h
+include_bsp_HEADERS += include/io.h
 
 include_HEADERS += ../../shared/include/tm27.h
@@ -54,5 +58,4 @@
 
 dist_project_lib_DATA += ../shared/startup/linkcmds.base \
-	../shared/startup/linkcmds.rom \
 	startup/linkcmds.lpc2478 \
 	startup/linkcmds.lpc2478_ncs \
@@ -77,4 +80,5 @@
 	../../shared/gnatinstallhandler.c \
 	../../shared/sbrk.c \
+	../../shared/src/stackalloc.c \
 	../shared/abort/simple_abort.c
 
@@ -88,5 +92,4 @@
 	../../shared/src/irq-info.c \
 	../../shared/src/irq-shell.c \
-	../shared/irq/irq_asm.S \
 	irq/irq.c
 
@@ -107,8 +110,13 @@
 # Misc
 libbsp_a_SOURCES += misc/system-clocks.c \
-	misc/dma.c
+	misc/dma.c \
+	misc/idle.c \
+	misc/io.c
 
 # SSP
 libbsp_a_SOURCES += ssp/ssp.c
+
+# I2C
+libbsp_a_SOURCES += i2c/i2c.c
 
 ###############################################################################
Index: c/src/lib/libbsp/arm/lpc24xx/README
===================================================================
--- c/src/lib/libbsp/arm/lpc24xx/README	(revision d1be26b9efd7dca78a304d52104d9ff53f44298c)
+++ c/src/lib/libbsp/arm/lpc24xx/README	(revision 7ae27751322a9b29ea9ff2adc146f064237127eb)
@@ -2,4 +2,6 @@
 #  $Id$
 #
+
+Note: A Binutils version with REGION_ALIAS feature is required to link the BSP.
 
 Development Board: QVGA Base Board from Embedded Artists
@@ -14,4 +16,5 @@
 	o SSP (SPI mode): This driver is in active development.  Use with care.
 	o Network
+	o I2C
 
 Howto setup QVGA Base Board?
Index: c/src/lib/libbsp/arm/lpc24xx/clock/clock-config.c
===================================================================
--- c/src/lib/libbsp/arm/lpc24xx/clock/clock-config.c	(revision d1be26b9efd7dca78a304d52104d9ff53f44298c)
+++ c/src/lib/libbsp/arm/lpc24xx/clock/clock-config.c	(revision 7ae27751322a9b29ea9ff2adc146f064237127eb)
@@ -26,4 +26,5 @@
 #include <bsp/lpc24xx.h>
 #include <bsp/irq.h>
+#include <bsp/io.h>
 #include <bsp/system-clocks.h>
 
@@ -56,9 +57,6 @@
     * (uint64_t) rtems_configuration_get_microseconds_per_tick()) / 1000000;
 
-  /* Set timer pclk to cclk */
-  rtems_interrupt_disable( level);
-  PCONP = SET_FLAGS( PCONP, 0x02);
-  PCLKSEL0 = SET_FLAGS( PCLKSEL0, 0x04);
-  rtems_interrupt_enable( level);
+  /* Enable module power */
+  lpc24xx_module_enable( LPC24XX_MODULE_TIMER, 0, LPC24XX_MODULE_CCLK);
 
   /* Reset timer */
Index: c/src/lib/libbsp/arm/lpc24xx/configure.ac
===================================================================
--- c/src/lib/libbsp/arm/lpc24xx/configure.ac	(revision d1be26b9efd7dca78a304d52104d9ff53f44298c)
+++ c/src/lib/libbsp/arm/lpc24xx/configure.ac	(revision 7ae27751322a9b29ea9ff2adc146f064237127eb)
@@ -25,25 +25,46 @@
 
 RTEMS_BSPOPTS_SET([LPC24XX_OSCILLATOR_MAIN],[*],[12000000U])
-RTEMS_BSPOPTS_HELP([LPC24XX_OSCILLATOR_MAIN],[Main oscillator frequency in Hz])
+RTEMS_BSPOPTS_HELP([LPC24XX_OSCILLATOR_MAIN],[main oscillator frequency in Hz])
 
-RTEMS_BSPOPTS_SET([LPC24XX_OSCILLATOR_RTC],[*],[32768])
+RTEMS_BSPOPTS_SET([LPC24XX_OSCILLATOR_RTC],[*],[32768U])
 RTEMS_BSPOPTS_HELP([LPC24XX_OSCILLATOR_RTC],[RTC oscillator frequency in Hz])
 
-RTEMS_BSPOPTS_SET([LPC24XX_CCLK],[*],[72000000])
+RTEMS_BSPOPTS_SET([LPC24XX_CCLK],[*],[72000000U])
 RTEMS_BSPOPTS_HELP([LPC24XX_CCLK],[CPU clock in Hz])
 
-RTEMS_BSPOPTS_SET([LPC24XX_UART_BAUD],[*],[115200])
-RTEMS_BSPOPTS_HELP([LPC24XX_UART_BAUD],[Baud for UARTs])
+RTEMS_BSPOPTS_SET([LPC24XX_UART_BAUD],[*],[115200U])
+RTEMS_BSPOPTS_HELP([LPC24XX_UART_BAUD],[baud for UARTs])
 
 RTEMS_BSPOPTS_SET([LPC24XX_HAS_UBOOT],[lpc2478],[1])
 RTEMS_BSPOPTS_SET([LPC24XX_HAS_UBOOT],[lpc2478_ncs_ram],[1])
-RTEMS_BSPOPTS_HELP([LPC24XX_HAS_UBOOT],[Enable U-Boot startup])
+RTEMS_BSPOPTS_HELP([LPC24XX_HAS_UBOOT],[enable U-Boot startup])
 
 RTEMS_BSPOPTS_SET([LPC24XX_ETHERNET_RMII],[lpc2478_ncs],[1])
 RTEMS_BSPOPTS_SET([LPC24XX_ETHERNET_RMII],[lpc2478_ncs_ram],[1])
-RTEMS_BSPOPTS_HELP([LPC24XX_ETHERNET_RMII],[Enable RMII for Ethernet])
+RTEMS_BSPOPTS_HELP([LPC24XX_ETHERNET_RMII],[enable RMII for Ethernet])
 
 RTEMS_BSPOPTS_SET([LPC24XX_EMC_MICRON],[lpc2478_ncs],[1])
-RTEMS_BSPOPTS_HELP([LPC24XX_EMC_MICRON],[Enable RMII for Ethernet])
+RTEMS_BSPOPTS_HELP([LPC24XX_EMC_MICRON],[use Micron configuration for EMC])
+
+RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_CONSOLE],[*],[0])
+RTEMS_BSPOPTS_HELP([LPC24XX_CONFIG_CONSOLE],[configuration for console (UART 0)])
+
+RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_UART_1],[*],[])
+RTEMS_BSPOPTS_HELP([LPC24XX_CONFIG_UART_1],[configuration for UART 1])
+
+RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_UART_2],[*],[])
+RTEMS_BSPOPTS_HELP([LPC24XX_CONFIG_UART_2],[configuration for UART 2])
+
+RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_UART_3],[*],[])
+RTEMS_BSPOPTS_HELP([LPC24XX_CONFIG_UART_3],[configuration for UART 3])
+
+RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_I2C_0],[lpc2478_ncs_ram],[0])
+RTEMS_BSPOPTS_HELP([LPC24XX_CONFIG_I2C_0],[configuration for I2C 0])
+
+RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_I2C_1],[*],[])
+RTEMS_BSPOPTS_HELP([LPC24XX_CONFIG_I2C_1],[configuration for I2C 1])
+
+RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_I2C_2],[*],[])
+RTEMS_BSPOPTS_HELP([LPC24XX_CONFIG_I2C_2],[configuration for I2C 2])
 
 RTEMS_BSP_BOOTCARD_OPTIONS
Index: c/src/lib/libbsp/arm/lpc24xx/console/console-config.c
===================================================================
--- c/src/lib/libbsp/arm/lpc24xx/console/console-config.c	(revision d1be26b9efd7dca78a304d52104d9ff53f44298c)
+++ c/src/lib/libbsp/arm/lpc24xx/console/console-config.c	(revision 7ae27751322a9b29ea9ff2adc146f064237127eb)
@@ -26,6 +26,4 @@
 #include <bsp/irq.h>
 
-#define LPC24XX_UART_NUMBER 1
-
 static uint8_t lpc24xx_uart_register( uint32_t addr, uint8_t i)
 {
@@ -42,29 +40,97 @@
 }
 
+rtems_device_minor_number Console_Port_Minor = 0;
+
+console_tbl Console_Port_Tbl [] = {
+  #ifdef LPC24XX_CONFIG_CONSOLE
+    {
+      .sDeviceName = "/dev/ttyS0",
+      .deviceType = SERIAL_NS16550,
+      .pDeviceFns = &ns16550_fns,
+      .deviceProbe = NULL,
+      .pDeviceFlow = NULL,
+      .ulMargin = 16,
+      .ulHysteresis = 8,
+      .pDeviceParams = (void *) LPC24XX_UART_BAUD,
+      .ulCtrlPort1 = UART0_BASE_ADDR,
+      .ulCtrlPort2 = 0,
+      .ulDataPort = UART0_BASE_ADDR,
+      .getRegister = lpc24xx_uart_register,
+      .setRegister = lpc24xx_uart_set_register,
+      .getData = NULL,
+      .setData = NULL,
+      .ulClock = LPC24XX_CCLK,
+      .ulIntVector = LPC24XX_IRQ_UART_0
+    },
+  #endif
+  #ifdef LPC24XX_CONFIG_UART_1
+    {
+      .sDeviceName = "/dev/ttyS1",
+      .deviceType = SERIAL_NS16550,
+      .pDeviceFns = &ns16550_fns,
+      .deviceProbe = NULL,
+      .pDeviceFlow = NULL,
+      .ulMargin = 16,
+      .ulHysteresis = 8,
+      .pDeviceParams = (void *) LPC24XX_UART_BAUD,
+      .ulCtrlPort1 = UART1_BASE_ADDR,
+      .ulCtrlPort2 = 0,
+      .ulDataPort = UART1_BASE_ADDR,
+      .getRegister = lpc24xx_uart_register,
+      .setRegister = lpc24xx_uart_set_register,
+      .getData = NULL,
+      .setData = NULL,
+      .ulClock = LPC24XX_CCLK,
+      .ulIntVector = LPC24XX_IRQ_UART_1
+    },
+  #endif
+  #ifdef LPC24XX_CONFIG_UART_2
+    {
+      .sDeviceName = "/dev/ttyS2",
+      .deviceType = SERIAL_NS16550,
+      .pDeviceFns = &ns16550_fns,
+      .deviceProbe = NULL,
+      .pDeviceFlow = NULL,
+      .ulMargin = 16,
+      .ulHysteresis = 8,
+      .pDeviceParams = (void *) LPC24XX_UART_BAUD,
+      .ulCtrlPort1 = UART2_BASE_ADDR,
+      .ulCtrlPort2 = 0,
+      .ulDataPort = UART2_BASE_ADDR,
+      .getRegister = lpc24xx_uart_register,
+      .setRegister = lpc24xx_uart_set_register,
+      .getData = NULL,
+      .setData = NULL,
+      .ulClock = LPC24XX_CCLK,
+      .ulIntVector = LPC24XX_IRQ_UART_2
+    },
+  #endif
+  #ifdef LPC24XX_CONFIG_UART_3
+    {
+      .sDeviceName = "/dev/ttyS3",
+      .deviceType = SERIAL_NS16550,
+      .pDeviceFns = &ns16550_fns,
+      .deviceProbe = NULL,
+      .pDeviceFlow = NULL,
+      .ulMargin = 16,
+      .ulHysteresis = 8,
+      .pDeviceParams = (void *) LPC24XX_UART_BAUD,
+      .ulCtrlPort1 = UART3_BASE_ADDR,
+      .ulCtrlPort2 = 0,
+      .ulDataPort = UART3_BASE_ADDR,
+      .getRegister = lpc24xx_uart_register,
+      .setRegister = lpc24xx_uart_set_register,
+      .getData = NULL,
+      .setData = NULL,
+      .ulClock = LPC24XX_CCLK,
+      .ulIntVector = LPC24XX_IRQ_UART_3
+    },
+  #endif
+};
+
+#define LPC24XX_UART_NUMBER \
+  (sizeof( Console_Port_Tbl) / sizeof( Console_Port_Tbl [0]))
+
 unsigned long Console_Port_Count = LPC24XX_UART_NUMBER;
 
-rtems_device_minor_number  Console_Port_Minor = 0;
-
-console_data  Console_Port_Data [LPC24XX_UART_NUMBER];
-
-console_tbl Console_Port_Tbl [LPC24XX_UART_NUMBER] = {
-  {
-    .sDeviceName = "/dev/ttyS0",
-    .deviceType = SERIAL_NS16550,
-    .pDeviceFns = &ns16550_fns,
-    .deviceProbe = NULL,
-    .pDeviceFlow = NULL,
-    .ulMargin = 16,
-    .ulHysteresis = 8,
-    .pDeviceParams = (void *) LPC24XX_UART_BAUD,
-    .ulCtrlPort1 = UART0_BASE_ADDR,
-    .ulCtrlPort2 = 0,
-    .ulDataPort = UART0_BASE_ADDR,
-    .getRegister = lpc24xx_uart_register,
-    .setRegister = lpc24xx_uart_set_register,
-    .getData = NULL,
-    .setData = NULL,
-    .ulClock = LPC24XX_CCLK,
-    .ulIntVector = LPC24XX_IRQ_UART_0
-  }
-};
+console_data Console_Port_Data [LPC24XX_UART_NUMBER];
Index: c/src/lib/libbsp/arm/lpc24xx/include/dma.h
===================================================================
--- c/src/lib/libbsp/arm/lpc24xx/include/dma.h	(revision d1be26b9efd7dca78a304d52104d9ff53f44298c)
+++ c/src/lib/libbsp/arm/lpc24xx/include/dma.h	(revision 7ae27751322a9b29ea9ff2adc146f064237127eb)
@@ -8,6 +8,6 @@
 
 /*
- * Copyright (c) 2008
- * Embedded Brains GmbH
+ * Copyright (c) 2008, 2009
+ * embedded brains GmbH
  * Obere Lagerstr. 30
  * D-82178 Puchheim
@@ -22,5 +22,5 @@
 #define LIBBSP_ARM_LPC24XX_DMA_H
 
-#include <stdbool.h>
+#include <rtems.h>
 
 #ifdef __cplusplus
@@ -28,11 +28,11 @@
 #endif /* __cplusplus */
 
-void lpc24xx_dma_initialize( void);
+void lpc24xx_dma_initialize(void);
 
-bool lpc24xx_dma_channel_obtain( unsigned channel);
+rtems_status_code lpc24xx_dma_channel_obtain(unsigned channel);
 
-void lpc24xx_dma_channel_release( unsigned channel);
+void lpc24xx_dma_channel_release(unsigned channel);
 
-void lpc24xx_dma_channel_disable( unsigned channel, bool force);
+void lpc24xx_dma_channel_disable(unsigned channel, bool force);
 
 #ifdef __cplusplus
Index: c/src/lib/libbsp/arm/lpc24xx/include/irq.h
===================================================================
--- c/src/lib/libbsp/arm/lpc24xx/include/irq.h	(revision d1be26b9efd7dca78a304d52104d9ff53f44298c)
+++ c/src/lib/libbsp/arm/lpc24xx/include/irq.h	(revision 7ae27751322a9b29ea9ff2adc146f064237127eb)
@@ -67,4 +67,7 @@
 #define LPC24XX_IRQ_I2S 31
 
+#define LPC24XX_IRQ_PRIORITY_VALUE_MIN 0
+#define LPC24XX_IRQ_PRIORITY_VALUE_MAX 15
+
 /**
  * @brief Minimum vector number.
@@ -77,4 +80,10 @@
 #define BSP_INTERRUPT_VECTOR_MAX LPC24XX_IRQ_I2S
 
+void bsp_interrupt_dispatch( void);
+
+void lpc24xx_irq_set_priority( rtems_vector_number vector, unsigned priority);
+
+unsigned lpc24xx_irq_priority( rtems_vector_number vector);
+
 /** @} */
 
Index: c/src/lib/libbsp/arm/lpc24xx/include/lpc24xx.h
===================================================================
--- c/src/lib/libbsp/arm/lpc24xx/include/lpc24xx.h	(revision d1be26b9efd7dca78a304d52104d9ff53f44298c)
+++ c/src/lib/libbsp/arm/lpc24xx/include/lpc24xx.h	(revision 7ae27751322a9b29ea9ff2adc146f064237127eb)
@@ -39,5 +39,5 @@
 #define VICSWPrioMask  (*(volatile uint32_t *) (VIC_BASE_ADDR + 0x024))
 
-#define VICVectAddrBase ((uint32_t *) (VIC_BASE_ADDR + 0x100))
+#define VICVectAddrBase ((volatile uint32_t *) (VIC_BASE_ADDR + 0x100))
 #define VICVectAddr0   (*(volatile uint32_t *) (VIC_BASE_ADDR + 0x100))
 #define VICVectAddr1   (*(volatile uint32_t *) (VIC_BASE_ADDR + 0x104))
@@ -73,6 +73,5 @@
 #define VICVectAddr31  (*(volatile uint32_t *) (VIC_BASE_ADDR + 0x17C))
 
-#define VICVectPriorityBase ((uint32_t *) (VIC_BASE_ADDR + 0x200))
-#define VICVectPriority( i) (*((volatile uint32_t *) (VIC_BASE_ADDR + 0x200) + (i)))
+#define VICVectPriorityBase ((volatile uint32_t *) (VIC_BASE_ADDR + 0x200))
 #define VICVectPriority0   (*(volatile uint32_t *) (VIC_BASE_ADDR + 0x200))
 #define VICVectPriority1   (*(volatile uint32_t *) (VIC_BASE_ADDR + 0x204))
@@ -124,4 +123,5 @@
 #define PINSEL9        (*(volatile uint32_t *) (PINSEL_BASE_ADDR + 0x24))
 #define PINSEL10       (*(volatile uint32_t *) (PINSEL_BASE_ADDR + 0x28))
+#define PINSEL11       (*(volatile uint32_t *) (PINSEL_BASE_ADDR + 0x2C))
 
 #define PINMODE0        (*(volatile uint32_t *) (PINSEL_BASE_ADDR + 0x40))
@@ -795,4 +795,5 @@
 #define AD0GDR         (*(volatile uint32_t *) (AD0_BASE_ADDR + 0x04))
 #define AD0INTEN       (*(volatile uint32_t *) (AD0_BASE_ADDR + 0x0C))
+#define AD0_DATA_START ((volatile uint32_t *) (AD0_BASE_ADDR + 0x10))
 #define AD0DR0         (*(volatile uint32_t *) (AD0_BASE_ADDR + 0x10))
 #define AD0DR1         (*(volatile uint32_t *) (AD0_BASE_ADDR + 0x14))
@@ -1122,61 +1123,35 @@
 #define MAC_MODULEID        (*(volatile uint32_t *) (MAC_BASE_ADDR + 0xFFC)) /* Module ID reg (RO) */
 
+/* LCD Controller */    
+
+#define LCD_BASE_ADDR 0xFFE10000                               
+#define LCD_CFG       (*(volatile uint32_t *) 0xE01FC1B8)
+#define LCD_TIMH      (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x000))
+#define LCD_TIMV      (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x004))
+#define LCD_POL       (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x008))
+#define LCD_LE        (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x00C))
+#define LCD_UPBASE    (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x010))
+#define LCD_LPBASE    (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x014))
+#define LCD_CTRL      (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x018))
+#define LCD_INTMSK    (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x01C))
+#define LCD_INTRAW    (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x020))
+#define LCD_INTSTAT   (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x024))
+#define LCD_INTCLR    (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x028))
+#define LCD_UPCURR    (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x02C))
+#define LCD_LPCURR    (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x030))
+#define LCD_PAL_ADDR  (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x200))
+#define CRSR_IMG      (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x800))
+#define CRSR_CTLR     (*(volatile uint32_t *) (LCD_BASE_ADDR + 0xC00))
+#define CRSR_CFG      (*(volatile uint32_t *) (LCD_BASE_ADDR + 0xC04))
+#define CRSR_PAL0     (*(volatile uint32_t *) (LCD_BASE_ADDR + 0xC08))
+#define CRSR_PAL1     (*(volatile uint32_t *) (LCD_BASE_ADDR + 0xC0C))
+#define CRSR_XY       (*(volatile uint32_t *) (LCD_BASE_ADDR + 0xC10))
+#define CRSR_CLIP     (*(volatile uint32_t *) (LCD_BASE_ADDR + 0xC14))
+#define CRSR_INTMSK   (*(volatile uint32_t *) (LCD_BASE_ADDR + 0xC20))
+#define CRSR_INTCLR   (*(volatile uint32_t *) (LCD_BASE_ADDR + 0xC24))
+#define CRSR_INTRAW   (*(volatile uint32_t *) (LCD_BASE_ADDR + 0xC28))
+#define CRSR_INTSTAT  (*(volatile uint32_t *) (LCD_BASE_ADDR + 0xC2C))
+
 /* Register Fields */
-
-/* PCONP */
-
-#define PCONP_PCTIM0 0x00000002U
-
-#define PCONP_PCTIM1 0x00000004U
-
-#define PCONP_PCUART0 0x00000008U
-
-#define PCONP_PCUART1 0x00000010U
-
-#define PCONP_PCPWM0 0x00000020U
-
-#define PCONP_PCPWM1 0x00000040U
-
-#define PCONP_PCI2C0 0x00000080U
-
-#define PCONP_PCSPI 0x00000100U
-
-#define PCONP_PCRTC 0x00000200U
-
-#define PCONP_PCSSP1 0x00000400U
-
-#define PCONP_PCEMC 0x00000800U
-
-#define PCONP_PCAD 0x00001000U
-
-#define PCONP_PCCAN1 0x00002000U
-
-#define PCONP_PCCAN2 0x00004000U
-
-#define PCONP_PCI2C1 0x00080000U
-
-#define PCONP_PCLCD 0x00100000U
-
-#define PCONP_PCSSP0 0x00200000U
-
-#define PCONP_PCTIM2 0x00400000U
-
-#define PCONP_PCTIM3 0x00800000U
-
-#define PCONP_PCUART2 0x01000000U
-
-#define PCONP_PCUART3 0x02000000U
-
-#define PCONP_PCI2C2 0x04000000U
-
-#define PCONP_PCI2S 0x08000000U
-
-#define PCONP_PCSDC 0x10000000U
-
-#define PCONP_PCGPDMA 0x20000000U
-
-#define PCONP_PCENET 0x40000000U
-
-#define PCONP_PCUSB 0x80000000U
 
 /* CLKSRCSEL */
@@ -2023,4 +1998,10 @@
 #define ETH_CMD_FULL_DUPLEX 0x00000400U
 
+/* ETH_STAT */
+
+#define ETH_STAT_RX_ACTIVE 0x00000001U
+
+#define ETH_STAT_TX_ACTIVE 0x00000002U
+
 /* AHBCFG */
 
@@ -2107,3 +2088,42 @@
 #define EMC_DYN_CTRL_CMD_NOP 0x00000180U
 
+/* I2C */
+
+typedef struct {
+  uint32_t conset;
+  uint32_t stat;
+  uint32_t dat;
+  uint32_t adr;
+  uint32_t sclh;
+  uint32_t scll;
+  uint32_t conclr;
+} lpc24xx_i2c;
+
+#define LPC24XX_I2C_AA (1U << 2U)
+
+#define LPC24XX_I2C_SI (1U << 3U)
+
+#define LPC24XX_I2C_STO (1U << 4U)
+
+#define LPC24XX_I2C_STA (1U << 5U)
+
+#define LPC24XX_I2C_EN (1U << 6U)
+
+/* IO */
+
+typedef struct {
+  uint32_t dir;
+  uint32_t reserved [3];
+  uint32_t mask;
+  uint32_t pin;
+  uint32_t set;
+  uint32_t clr;
+} lpc24xx_fio;
+
+static volatile uint32_t * const LPC24XX_PINSEL = &PINSEL0;
+
+static volatile uint32_t * const LPC24XX_PINMODE = &PINMODE0;
+
+static volatile lpc24xx_fio * const LPC24XX_FIO = (volatile lpc24xx_fio *) FIO_BASE_ADDR;
+
 #endif /* LIBBSP_ARM_LPC24XX_LPC24XX_H */
Index: c/src/lib/libbsp/arm/lpc24xx/include/system-clocks.h
===================================================================
--- c/src/lib/libbsp/arm/lpc24xx/include/system-clocks.h	(revision d1be26b9efd7dca78a304d52104d9ff53f44298c)
+++ c/src/lib/libbsp/arm/lpc24xx/include/system-clocks.h	(revision 7ae27751322a9b29ea9ff2adc146f064237127eb)
@@ -28,4 +28,6 @@
 void lpc24xx_micro_seconds_delay( unsigned us);
 
+unsigned lpc24xx_pllclk( void);
+
 unsigned lpc24xx_cclk( void);
 
Index: c/src/lib/libbsp/arm/lpc24xx/irq/irq.c
===================================================================
--- c/src/lib/libbsp/arm/lpc24xx/irq/irq.c	(revision d1be26b9efd7dca78a304d52104d9ff53f44298c)
+++ c/src/lib/libbsp/arm/lpc24xx/irq/irq.c	(revision 7ae27751322a9b29ea9ff2adc146f064237127eb)
@@ -8,6 +8,6 @@
 
 /*
- * Copyright (c) 2008
- * Embedded Brains GmbH
+ * Copyright (c) 2008, 2009
+ * embedded brains GmbH
  * Obere Lagerstr. 30
  * D-82178 Puchheim
@@ -24,19 +24,52 @@
 #include <bsp/lpc24xx.h>
 
-void ExecuteITHandler( void)
+static inline bool lpc24xx_irq_is_valid( rtems_vector_number vector)
+{
+  return vector <= BSP_INTERRUPT_VECTOR_MAX;
+}
+
+void lpc24xx_irq_set_priority( rtems_vector_number vector, unsigned priority)
+{
+  if (lpc24xx_irq_is_valid( vector)) {
+    if (priority > LPC24XX_IRQ_PRIORITY_VALUE_MAX) {
+      priority = LPC24XX_IRQ_PRIORITY_VALUE_MAX;
+    }
+
+    VICVectPriorityBase [vector] = priority;
+  }
+}
+
+unsigned lpc24xx_irq_priority( rtems_vector_number vector)
+{
+  if (lpc24xx_irq_is_valid( vector)) {
+    return VICVectPriorityBase [vector];
+  } else {
+    return LPC24XX_IRQ_PRIORITY_VALUE_MIN - 1;
+  }
+}
+
+void bsp_interrupt_dispatch( void)
 {
   /* Read current vector number */
   rtems_vector_number vector = VICVectAddr;
 
-  /* Acknowledge interrupt */
-  VICVectAddr = 0;
+  /* Enable interrupts in program status register */
+  uint32_t psr = arm_status_irq_enable();
 
   /* Dispatch interrupt handlers */
   bsp_interrupt_handler_dispatch( vector);
+
+  /* Restore program status register */
+  arm_status_restore( psr);
+
+  /* Acknowledge interrupt */
+  VICVectAddr = 0;
 }
 
 rtems_status_code bsp_interrupt_vector_enable( rtems_vector_number vector)
 {
-  VICIntEnable = 1U << vector;
+  if (lpc24xx_irq_is_valid( vector)) {
+    VICIntEnable = 1U << vector;
+  }
 
   return RTEMS_SUCCESSFUL;
@@ -45,8 +78,13 @@
 rtems_status_code bsp_interrupt_vector_disable( rtems_vector_number vector)
 {
-  VICIntEnClear = 1U << vector;
+  if (lpc24xx_irq_is_valid( vector)) {
+    VICIntEnClear = 1U << vector;
+  }
 
   return RTEMS_SUCCESSFUL;
 }
+
+/* FIXME */
+void arm_exc_interrupt( void);
 
 rtems_status_code bsp_interrupt_facility_initialize( void)
@@ -80,5 +118,5 @@
 
   /* Install the IRQ exception handler */
-  _CPU_ISR_install_vector( ARM_EXCEPTION_IRQ, _ISR_Handler, NULL);
+  _CPU_ISR_install_vector( ARM_EXCEPTION_IRQ, arm_exc_interrupt, NULL);
 
   return RTEMS_SUCCESSFUL;
@@ -87,4 +125,4 @@
 void bsp_interrupt_handler_default( rtems_vector_number vector)
 {
-  printk( "Spurious interrupt: %u\n", vector);
+  printk( "spurious interrupt: %u\n", vector);
 }
Index: c/src/lib/libbsp/arm/lpc24xx/misc/dma.c
===================================================================
--- c/src/lib/libbsp/arm/lpc24xx/misc/dma.c	(revision d1be26b9efd7dca78a304d52104d9ff53f44298c)
+++ c/src/lib/libbsp/arm/lpc24xx/misc/dma.c	(revision 7ae27751322a9b29ea9ff2adc146f064237127eb)
@@ -8,6 +8,6 @@
 
 /*
- * Copyright (c) 2008
- * Embedded Brains GmbH
+ * Copyright (c) 2008, 2009
+ * embedded brains GmbH
  * Obere Lagerstr. 30
  * D-82178 Puchheim
@@ -23,4 +23,5 @@
 #include <bsp/lpc24xx.h>
 #include <bsp/dma.h>
+#include <bsp/io.h>
 
 /**
@@ -32,12 +33,10 @@
  * @brief Initializes the general purpose DMA.
  */
-void lpc24xx_dma_initialize( void)
+void lpc24xx_dma_initialize(void)
 {
   rtems_interrupt_level level;
 
-  /* Enable power */
-  rtems_interrupt_disable( level);
-  PCONP = SET_FLAG( PCONP, PCONP_PCGPDMA);
-  rtems_interrupt_enable( level);
+  /* Enable module power */
+  lpc24xx_module_enable(LPC24XX_MODULE_GPDMA, 0, LPC24XX_MODULE_PCLK_DEFAULT);
 
   /* Disable module */
@@ -60,40 +59,40 @@
 
 /**
- * @brief Returns true if the channel @a channel was obtained.
+ * @brief Tries to obtain the channel @a channel.
  *
- * If the channel number @a channel is out of range the last valid channel will
- * be used.
+ * @retval RTEMS_SUCCESSFUL Successful operation.
+ * @retval RTEMS_INVALID_ID Invalid channel number.
+ * @retval RTEMS_RESOURCE_IN_USE Channel already occupied.
  */
-bool lpc24xx_dma_channel_obtain( unsigned channel)
+rtems_status_code lpc24xx_dma_channel_obtain(unsigned channel)
 {
-  rtems_interrupt_level level;
-  bool occupation = true;
+  if (channel < GPDMA_CH_NUMBER) {
+    rtems_interrupt_level level;
+    bool occupation = true;
 
-  if (channel > GPDMA_CH_NUMBER) {
-    channel = GPDMA_CH_NUMBER - 1;
+    rtems_interrupt_disable(level);
+    occupation = lpc24xx_dma_channel_occupation [channel];
+    lpc24xx_dma_channel_occupation [channel] = true;
+    rtems_interrupt_enable(level);
+
+    return occupation ? RTEMS_RESOURCE_IN_USE : RTEMS_SUCCESSFUL;
+  } else {
+    return RTEMS_INVALID_ID;
   }
-
-  rtems_interrupt_disable( level);
-  occupation = lpc24xx_dma_channel_occupation [channel];
-  lpc24xx_dma_channel_occupation [channel] = true;
-  rtems_interrupt_enable( level);
-
-  return !occupation;
 }
 
 /**
- * @brief Releases the channel @a channel.  You must have obtained this channel
- * with lpc24xx_dma_channel_obtain() previously.
+ * @brief Releases the channel @a channel.
  *
- * If the channel number @a channel is out of range the last valid channel will
- * be used.
+ * You must have obtained this channel with lpc24xx_dma_channel_obtain()
+ * previously.
+ *
+ * If the channel number @a channel is out of range nothing will happen.
  */
-void lpc24xx_dma_channel_release( unsigned channel)
+void lpc24xx_dma_channel_release(unsigned channel)
 {
-  if (channel > GPDMA_CH_NUMBER) {
-    channel = GPDMA_CH_NUMBER - 1;
+  if (channel < GPDMA_CH_NUMBER) {
+    lpc24xx_dma_channel_occupation [channel] = false;
   }
-
-  lpc24xx_dma_channel_occupation [channel] = false;
 }
 
@@ -102,23 +101,24 @@
  *
  * If @a force is false the channel will be halted and disabled when the
- * channel is inactive.  If the channel number @a channel is out of range the
- * last valid channel will be used.
+ * channel is inactive.
+ *
+ * If the channel number @a channel is out of range the behaviour is undefined.
  */
-void lpc24xx_dma_channel_disable( unsigned channel, bool force)
+void lpc24xx_dma_channel_disable(unsigned channel, bool force)
 {
-  volatile lpc24xx_dma_channel *ch = GPDMA_CH_BASE_ADDR( channel);
+  volatile lpc24xx_dma_channel *ch = GPDMA_CH_BASE_ADDR(channel);
   uint32_t cfg = ch->cfg;
 
   if (!force) {
     /* Halt */
-    ch->cfg = SET_FLAG( cfg, GPDMA_CH_CFG_HALT);
+    ch->cfg = SET_FLAG(cfg, GPDMA_CH_CFG_HALT);
 
     /* Wait for inactive */
     do {
       cfg = ch->cfg;
-    } while (IS_FLAG_SET( cfg, GPDMA_CH_CFG_ACTIVE));
+    } while (IS_FLAG_SET(cfg, GPDMA_CH_CFG_ACTIVE));
   }
 
   /* Disable */
-  ch->cfg = CLEAR_FLAG( cfg, GPDMA_CH_CFG_EN);
+  ch->cfg = CLEAR_FLAG(cfg, GPDMA_CH_CFG_EN);
 }
Index: c/src/lib/libbsp/arm/lpc24xx/misc/system-clocks.c
===================================================================
--- c/src/lib/libbsp/arm/lpc24xx/misc/system-clocks.c	(revision d1be26b9efd7dca78a304d52104d9ff53f44298c)
+++ c/src/lib/libbsp/arm/lpc24xx/misc/system-clocks.c	(revision 7ae27751322a9b29ea9ff2adc146f064237127eb)
@@ -69,14 +69,13 @@
 
 /**
- * @brief Returns the CPU clock frequency in [Hz].
+ * @brief Returns the PLL output clock frequency in [Hz].
  *
- * Return zero in case of an unexpected PLL input frequency.
+ * Returns zero in case of an unexpected PLL input frequency.
  */
-unsigned lpc24xx_cclk( void)
+unsigned lpc24xx_pllclk( void)
 {
   unsigned clksrc = GET_CLKSRCSEL_CLKSRC( CLKSRCSEL);
   unsigned pllinclk = 0;
   unsigned pllclk = 0;
-  unsigned cclk = 0;
 
   /* Get PLL input frequency */
@@ -106,6 +105,19 @@
   }
 
-  /* Get CPU clock frequency */
-  cclk = pllclk / (GET_CCLKCFG_CCLKSEL( CCLKCFG) + 1);
+  return pllclk;
+}
+
+/**
+ * @brief Returns the CPU clock frequency in [Hz].
+ *
+ * Returns zero in case of an unexpected PLL input frequency.
+ */
+unsigned lpc24xx_cclk( void)
+{
+  /* Get PLL output frequency */
+  unsigned pllclk = lpc24xx_pllclk();
+
+  /* Get CPU frequency */
+  unsigned cclk = pllclk / (GET_CCLKCFG_CCLKSEL( CCLKCFG) + 1);
 
   return cclk;
Index: c/src/lib/libbsp/arm/lpc24xx/network/network.c
===================================================================
--- c/src/lib/libbsp/arm/lpc24xx/network/network.c	(revision d1be26b9efd7dca78a304d52104d9ff53f44298c)
+++ c/src/lib/libbsp/arm/lpc24xx/network/network.c	(revision 7ae27751322a9b29ea9ff2adc146f064237127eb)
@@ -44,4 +44,5 @@
 #include <bsp/lpc24xx.h>
 #include <bsp/irq.h>
+#include <bsp/io.h>
 #include <bsp/utility.h>
 
@@ -142,20 +143,15 @@
     + LPC24XX_ETH_TRANSMIT_UNIT_NUMBER * ETH_TRANSMIT_STATUS_SIZE)
 
-#define LPC24XX_ETH_EVENT_TRANSMIT RTEMS_EVENT_1
-
-#define LPC24XX_ETH_EVENT_TRANSMIT_START RTEMS_EVENT_2
-
-#define LPC24XX_ETH_EVENT_TRANSMIT_ERROR RTEMS_EVENT_3
-
-#define LPC24XX_ETH_EVENT_RECEIVE RTEMS_EVENT_4
-
-#define LPC24XX_ETH_EVENT_RECEIVE_ERROR RTEMS_EVENT_5
-
-#define LPC24XX_ETH_TIMEOUT 10
+#define LPC24XX_ETH_EVENT_INITIALIZE RTEMS_EVENT_1
+
+#define LPC24XX_ETH_EVENT_START RTEMS_EVENT_2
+
+#define LPC24XX_ETH_EVENT_INTERRUPT RTEMS_EVENT_3
 
 #define LPC24XX_ETH_INTERRUPT_RECEIVE \
   (ETH_INT_RX_ERROR | ETH_INT_RX_FINISHED | ETH_INT_RX_DONE)
 
-#define LPC24XX_ETH_INTERRUPT_TRANSMIT (ETH_INT_TX_DONE | ETH_INT_TX_FINISHED | ETH_INT_TX_ERROR)
+#define LPC24XX_ETH_INTERRUPT_TRANSMIT \
+  (ETH_INT_TX_DONE | ETH_INT_TX_FINISHED | ETH_INT_TX_ERROR)
 
 #define LPC24XX_ETH_RX_STAT_ERRORS \
@@ -273,11 +269,8 @@
   /* Check receive interrupts */
   if (IS_FLAG_SET( is, ETH_INT_RX_OVERRUN)) {
-    re = LPC24XX_ETH_EVENT_RECEIVE_ERROR;
+    re = LPC24XX_ETH_EVENT_INITIALIZE;
     ++e->receive_fatal_errors;
-    /* FIXME */
-    printk( "%s: fatal receive error\n", __func__);
-    while (1);
   } else if (IS_ANY_FLAG_SET( is, LPC24XX_ETH_INTERRUPT_RECEIVE)) {
-    re = LPC24XX_ETH_EVENT_RECEIVE;
+    re = LPC24XX_ETH_EVENT_INTERRUPT;
     ie = SET_FLAGS( ie, LPC24XX_ETH_INTERRUPT_RECEIVE);
   }
@@ -291,11 +284,8 @@
   /* Check transmit interrupts */
   if (IS_FLAG_SET( is, ETH_INT_TX_UNDERRUN)) {
-    te = LPC24XX_ETH_EVENT_TRANSMIT_ERROR;
+    te = LPC24XX_ETH_EVENT_INITIALIZE;
     ++e->transmit_fatal_errors;
-    /* FIXME */
-    printk( "%s: fatal transmit error\n", __func__);
-    while (1);
   } else if (IS_ANY_FLAG_SET( is, LPC24XX_ETH_INTERRUPT_TRANSMIT)) {
-    te = LPC24XX_ETH_EVENT_TRANSMIT;
+    te = LPC24XX_ETH_EVENT_INTERRUPT;
     ie = SET_FLAGS( ie, LPC24XX_ETH_INTERRUPT_TRANSMIT);
   }
@@ -380,5 +370,5 @@
   volatile lpc24xx_eth_transfer_descriptor *desc,
   struct mbuf **mbuf_table,
-  unsigned i,
+  uint32_t i,
   bool wait
 )
@@ -417,5 +407,5 @@
   struct mbuf **const mbuf_table =
     (struct mbuf **) LPC24XX_ETH_RECEIVE_MBUF_START;
-  uint32_t index_max = e->receive_unit_number - 1;
+  uint32_t index_max = 0;
   uint32_t produce_index = 0;
   uint32_t consume_index = 0;
@@ -424,51 +414,4 @@
   LPC24XX_ETH_PRINTF( "%s\n", __func__);
 
-  /* Disable receive interrupts */
-  lpc24xx_eth_disable_receive_interrupts();
-
-  /* Disable receiver */
-  MAC_COMMAND = CLEAR_FLAG( MAC_COMMAND, ETH_CMD_RX_ENABLE);
-
-  /* Clear receive interrupts */
-  MAC_INTCLEAR = LPC24XX_ETH_INTERRUPT_RECEIVE;
-
-  /* Fill receive queue */
-  for (produce_index = 0; produce_index <= index_max; ++produce_index) {
-    if (
-      !lpc24xx_eth_add_new_mbuf( ifp, desc, mbuf_table, produce_index, false)
-    ) {
-      break;
-    }
-  }
-
-  /* Check if the queue is full */
-  if (produce_index == 0) {
-    RTEMS_DO_CLEANUP(
-      cleanup,
-      "no buffers to fill receive queue: terminate receive task\n"
-    );
-  } else if (produce_index <= index_max) {
-    /* Reduce the queue size */
-    index_max = produce_index - 1;
-
-    RTEMS_SYSLOG_ERROR( "not enough buffers to fill receive queue");
-  }
-
-  /* Receive descriptor table */
-  MAC_RXDESCRIPTORNUM = index_max;
-  MAC_RXDESCRIPTOR = (uint32_t) desc;
-  MAC_RXSTATUS = (uint32_t) info;
-
-  /* Initialize indices */
-  produce_index = MAC_RXPRODUCEINDEX;
-  consume_index = MAC_RXCONSUMEINDEX;
-  receive_index = consume_index;
-
-  /* Enable receiver */
-  MAC_COMMAND = SET_FLAG( MAC_COMMAND, ETH_CMD_RX_ENABLE);
-
-  /* Enable receive interrupts */
-  lpc24xx_eth_enable_receive_interrupts();
-
   /* Main event loop */
   while (true) {
@@ -477,5 +420,5 @@
     /* Wait for events */
     sc = rtems_bsdnet_event_receive(
-      LPC24XX_ETH_EVENT_RECEIVE, 
+      LPC24XX_ETH_EVENT_INITIALIZE | LPC24XX_ETH_EVENT_INTERRUPT, 
       RTEMS_EVENT_ANY | RTEMS_WAIT,
       RTEMS_NO_TIMEOUT,
@@ -486,4 +429,77 @@
     LPC24XX_ETH_PRINTF( "rx: wake up: 0x%08" PRIx32 "\n", events);
 
+    /* Initialize receiver? */
+    if (IS_FLAG_SET( events, LPC24XX_ETH_EVENT_INITIALIZE)) {
+      /* Disable receive interrupts */
+      lpc24xx_eth_disable_receive_interrupts();
+
+      /* Disable receiver */
+      MAC_COMMAND = CLEAR_FLAG( MAC_COMMAND, ETH_CMD_RX_ENABLE);
+
+      /* Wait for inactive status */
+      while (IS_FLAG_SET( MAC_STATUS, ETH_STAT_RX_ACTIVE)) {
+        /* Wait */
+      }
+
+      /* Reset */
+      MAC_COMMAND = SET_FLAG( MAC_COMMAND, ETH_CMD_RX_RESET);
+
+      /* Clear receive interrupts */
+      MAC_INTCLEAR = LPC24XX_ETH_INTERRUPT_RECEIVE;
+
+      /* Index maximum (determines queue size) */
+      index_max = e->receive_unit_number - 1;
+
+      /* Move existing mbufs to the front */
+      consume_index = 0;
+      for (produce_index = 0; produce_index <= index_max; ++produce_index) {
+        if (mbuf_table [produce_index] != NULL) {
+          mbuf_table [consume_index] = mbuf_table [produce_index];
+          ++consume_index;
+        }
+      }
+
+      /* Fill receive queue */
+      for (produce_index = consume_index; produce_index <= index_max; ++produce_index) {
+        if (
+          !lpc24xx_eth_add_new_mbuf( ifp, desc, mbuf_table, produce_index, false)
+        ) {
+          break;
+        }
+      }
+
+      /* Check if the queue is full */
+      if (produce_index == 0) {
+        RTEMS_DO_CLEANUP(
+          cleanup,
+          "no mbufs to fill receive queue: terminate receive task\n"
+        );
+      } else if (produce_index <= index_max) {
+        /* Reduce the queue size */
+        index_max = produce_index - 1;
+
+        RTEMS_SYSLOG_ERROR( "not enough mbufs to fill receive queue");
+      }
+
+      /* Receive descriptor table */
+      MAC_RXDESCRIPTORNUM = index_max;
+      MAC_RXDESCRIPTOR = (uint32_t) desc;
+      MAC_RXSTATUS = (uint32_t) info;
+
+      /* Initialize indices */
+      produce_index = MAC_RXPRODUCEINDEX;
+      consume_index = MAC_RXCONSUMEINDEX;
+      receive_index = consume_index;
+
+      /* Enable receiver */
+      MAC_COMMAND = SET_FLAG( MAC_COMMAND, ETH_CMD_RX_ENABLE);
+
+      /* Enable receive interrupts */
+      lpc24xx_eth_enable_receive_interrupts();
+
+      /* Wait for events */
+      continue;
+    }
+
     while (true) {
       /* Clear receive interrupt status */
@@ -497,4 +513,7 @@
         struct mbuf *m = mbuf_table [receive_index];
         uint32_t stat = info [receive_index].status;
+
+        /* Remove mbuf from table */
+        mbuf_table [receive_index] = NULL;
 
         if (
@@ -586,4 +605,7 @@
 cleanup:
 
+  /* Clear task ID */
+  e->receive_task = RTEMS_ID_NONE;
+
   /* Release network semaphore */
   rtems_bsdnet_semaphore_release();
@@ -666,34 +688,9 @@
   LPC24XX_ETH_PRINTF( "%s\n", __func__);
 
-  /* Disable transmit interrupts */
-  lpc24xx_eth_disable_transmit_interrupts();
-
-  /* Disable transmitter */
-  MAC_COMMAND = CLEAR_FLAG( MAC_COMMAND, ETH_CMD_TX_ENABLE);
-
-  /* Clear transmit interrupts */
-  MAC_INTCLEAR = LPC24XX_ETH_INTERRUPT_TRANSMIT;
-
   /* Initialize descriptor table */
   for (produce_index = 0; produce_index <= index_max; ++produce_index) {
     desc [produce_index].start =
       (uint32_t) (buf + produce_index * LPC24XX_ETH_TRANSMIT_BUFFER_SIZE);
-    desc [produce_index].control = 0;
-  }
-
-  /* Transmit descriptors */
-  MAC_TXDESCRIPTORNUM = index_max;
-  MAC_TXDESCRIPTOR = (uint32_t) desc;
-  MAC_TXSTATUS = (uint32_t) status;
-
-  /* Initialize indices */
-  produce_index = MAC_TXPRODUCEINDEX;
-  consume_index = MAC_TXCONSUMEINDEX;
-
-  /* Frame buffer start */
-  frame_buffer = (char *) desc [produce_index].start;
-
-  /* Enable transmitter */
-  MAC_COMMAND = SET_FLAG( MAC_COMMAND, ETH_CMD_TX_ENABLE);
+  }
 
   /* Main event loop */
@@ -701,5 +698,7 @@
     /* Wait for events */
     sc = rtems_bsdnet_event_receive(
-      LPC24XX_ETH_EVENT_TRANSMIT | LPC24XX_ETH_EVENT_TRANSMIT_START, 
+      LPC24XX_ETH_EVENT_INITIALIZE
+        | LPC24XX_ETH_EVENT_START 
+        | LPC24XX_ETH_EVENT_INTERRUPT,
       RTEMS_EVENT_ANY | RTEMS_WAIT,
       RTEMS_NO_TIMEOUT,
@@ -709,4 +708,39 @@
 
     LPC24XX_ETH_PRINTF( "tx: wake up: 0x%08" PRIx32 "\n", events);
+
+    /* Initialize transmitter? */
+    if (IS_FLAG_SET( events, LPC24XX_ETH_EVENT_INITIALIZE)) {
+      /* Disable transmit interrupts */
+      lpc24xx_eth_disable_transmit_interrupts();
+
+      /* Disable transmitter */
+      MAC_COMMAND = CLEAR_FLAG( MAC_COMMAND, ETH_CMD_TX_ENABLE);
+
+      /* Wait for inactive status */
+      while (IS_FLAG_SET( MAC_STATUS, ETH_STAT_TX_ACTIVE)) {
+        /* Wait */
+      }
+
+      /* Reset */
+      MAC_COMMAND = SET_FLAG( MAC_COMMAND, ETH_CMD_TX_RESET);
+
+      /* Clear transmit interrupts */
+      MAC_INTCLEAR = LPC24XX_ETH_INTERRUPT_TRANSMIT;
+
+      /* Transmit descriptors */
+      MAC_TXDESCRIPTORNUM = index_max;
+      MAC_TXDESCRIPTOR = (uint32_t) desc;
+      MAC_TXSTATUS = (uint32_t) status;
+
+      /* Initialize indices */
+      produce_index = MAC_TXPRODUCEINDEX;
+      consume_index = MAC_TXCONSUMEINDEX;
+
+      /* Frame buffer start */
+      frame_buffer = (char *) desc [produce_index].start;
+
+      /* Enable transmitter */
+      MAC_COMMAND = SET_FLAG( MAC_COMMAND, ETH_CMD_TX_ENABLE);
+    }
 
     /* Free consumed fragments */
@@ -750,7 +784,4 @@
         }
 
-        /* Reinitialize control field */
-        desc [c].control = 0;
-
         /* Next consume index */
         c = lpc24xx_eth_increment( c, index_max);
@@ -850,4 +881,7 @@
 cleanup:
 
+  /* Clear task ID */
+  e->transmit_task = RTEMS_ID_NONE;
+
   /* Release network semaphore */
   rtems_bsdnet_semaphore_release();
@@ -859,4 +893,5 @@
 static void lpc24xx_eth_interface_init( void *arg)
 {
+  rtems_status_code sc = RTEMS_SUCCESSFUL;
   lpc24xx_eth_driver_entry *e = (lpc24xx_eth_driver_entry *) arg;
   struct ifnet *ifp = &e->arpcom.ac_if;
@@ -866,26 +901,23 @@
   if (e->state == LPC24XX_ETH_INITIALIZED) {
     #ifndef LPC24XX_HAS_UBOOT
-      rtems_interrupt_level level;
-
-      rtems_interrupt_disable( level);
-
-      /* Enable power */
-      PCONP = SET_FLAGS( PCONP, 0x40000000);
-
-      /* Set PIN selects */
+      /* Enable module power */
+      lpc24xx_module_enable(
+        LPC24XX_MODULE_ETHERNET,
+        0,
+        LPC24XX_MODULE_PCLK_DEFAULT
+      );
+
+      /* Module IO configuration */
       #ifdef LPC24XX_ETHERNET_RMII
-        PINSEL2 = SET_FLAGS( PINSEL2, 0x55555555);
+      	lpc24xx_io_config( LPC24XX_MODULE_ETHERNET, 0, 0);
       #else
-        PINSEL2 = SET_FLAGS( PINSEL2, 0x50150105);
+      	lpc24xx_io_config( LPC24XX_MODULE_ETHERNET, 0, 1);
       #endif
-      PINSEL3 = SET_FLAGS( PINSEL3, 0x05);
-
-      rtems_interrupt_enable( level);
 
       /* Soft reset */
 
       /* Do soft reset */
+      MAC_COMMAND = 0x38;
       MAC_MAC1 = 0xcf00;
-      MAC_COMMAND = 0x38;
 
       /* Initialize PHY */
@@ -920,16 +952,12 @@
       MAC_MAC1 = 0x03;
     #else /* LPC24XX_HAS_UBOOT */
-      uint32_t reg = 0;
-
-      /* TODO */
+      /* Reset receiver and transmitter */
+      MAC_COMMAND = SET_FLAGS(
+        MAC_COMMAND,
+        ETH_CMD_RX_RESET | ETH_CMD_TX_RESET | ETH_CMD_REG_RESET
+      );
 
       /* MAC configuration */
       MAC_MAC1 = 0x3;
-
-      /* Disable and reset receiver and transmitter */
-      reg = MAC_COMMAND;
-      reg = CLEAR_FLAGS( reg, ETH_CMD_RX_ENABLE | ETH_CMD_TX_ENABLE);
-      reg = SET_FLAGS( reg, ETH_CMD_RX_RESET | ETH_CMD_TX_RESET);
-      MAC_COMMAND = reg;
     #endif /* LPC24XX_HAS_UBOOT */
 
@@ -942,4 +970,6 @@
         e
       );
+      sc = rtems_event_send( e->receive_task, LPC24XX_ETH_EVENT_INITIALIZE);
+      RTEMS_SYSLOG_ERROR_SC( sc, "send receive initialize event");
     }
 
@@ -952,4 +982,6 @@
         e
       );
+      sc = rtems_event_send( e->transmit_task, LPC24XX_ETH_EVENT_INITIALIZE);
+      RTEMS_SYSLOG_ERROR_SC( sc, "send transmit initialize event");
     }
 
@@ -984,4 +1016,6 @@
 static void lpc24xx_eth_interface_stats( const lpc24xx_eth_driver_entry *e)
 {
+  rtems_bsdnet_semaphore_release();
+
   printf( "received frames:                     %u\n", e->received_frames);
   printf( "receive interrupts:                  %u\n", e->receive_interrupts);
@@ -1003,4 +1037,6 @@
   printf( "transmit overflow errors:            %u\n", e->transmit_overflow_errors);
   printf( "transmit fatal errors:               %u\n", e->transmit_fatal_errors);
+
+  rtems_bsdnet_semaphore_obtain();
 }
 
@@ -1052,5 +1088,5 @@
   ifp->if_flags = SET_FLAG( ifp->if_flags, IFF_OACTIVE);
 
-  sc = rtems_event_send( e->transmit_task, LPC24XX_ETH_EVENT_TRANSMIT_START);
+  sc = rtems_event_send( e->transmit_task, LPC24XX_ETH_EVENT_START);
   RTEMS_SYSLOG_ERROR_SC( sc, "send transmit start event");
 }
Index: c/src/lib/libbsp/arm/lpc24xx/preinstall.am
===================================================================
--- c/src/lib/libbsp/arm/lpc24xx/preinstall.am	(revision d1be26b9efd7dca78a304d52104d9ff53f44298c)
+++ c/src/lib/libbsp/arm/lpc24xx/preinstall.am	(revision 7ae27751322a9b29ea9ff2adc146f064237127eb)
@@ -66,4 +66,8 @@
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-info.h
 
+$(PROJECT_INCLUDE)/bsp/stackalloc.h: ../../shared/include/stackalloc.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/stackalloc.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/stackalloc.h
+
 $(PROJECT_INCLUDE)/bsp/tod.h: ../../shared/tod.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/tod.h
@@ -102,4 +106,16 @@
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/dma.h
 
+$(PROJECT_INCLUDE)/bsp/idle.h: include/idle.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/idle.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/idle.h
+
+$(PROJECT_INCLUDE)/bsp/i2c.h: include/i2c.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/i2c.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/i2c.h
+
+$(PROJECT_INCLUDE)/bsp/io.h: include/io.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/io.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/io.h
+
 $(PROJECT_INCLUDE)/tm27.h: ../../shared/include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp)
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h
@@ -113,8 +129,4 @@
 	$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.base
 PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.base
-
-$(PROJECT_LIB)/linkcmds.rom: ../shared/startup/linkcmds.rom $(PROJECT_LIB)/$(dirstamp)
-	$(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.rom
-PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.rom
 
 $(PROJECT_LIB)/linkcmds.lpc2478: startup/linkcmds.lpc2478 $(PROJECT_LIB)/$(dirstamp)
Index: c/src/lib/libbsp/arm/lpc24xx/rtc/rtc-config.c
===================================================================
--- c/src/lib/libbsp/arm/lpc24xx/rtc/rtc-config.c	(revision d1be26b9efd7dca78a304d52104d9ff53f44298c)
+++ c/src/lib/libbsp/arm/lpc24xx/rtc/rtc-config.c	(revision 7ae27751322a9b29ea9ff2adc146f064237127eb)
@@ -22,4 +22,5 @@
 
 #include <bsp/lpc24xx.h>
+#include <bsp/io.h>
 
 #define LPC24XX_RTC_NUMBER 1
@@ -27,4 +28,9 @@
 static void lpc24xx_rtc_initialize( int minor)
 {
+  rtems_interrupt_level level;
+
+  /* Enable module power */
+  lpc24xx_module_enable( LPC24XX_MODULE_RTC, 0, LPC24XX_MODULE_PCLK_DEFAULT);
+
   /* Enable the RTC and use external clock */
   RTC_CCR = RTC_CCR_CLKEN | RTC_CCR_CLKSRC;
Index: c/src/lib/libbsp/arm/lpc24xx/startup/bspreset.c
===================================================================
--- c/src/lib/libbsp/arm/lpc24xx/startup/bspreset.c	(revision d1be26b9efd7dca78a304d52104d9ff53f44298c)
+++ c/src/lib/libbsp/arm/lpc24xx/startup/bspreset.c	(revision 7ae27751322a9b29ea9ff2adc146f064237127eb)
@@ -19,9 +19,24 @@
  */
 
+#include <rtems.h>
+
 #include <bsp/bootcard.h>
-#include <bsp/start.h>
+#include <bsp/lpc24xx.h>
 
 void bsp_reset( void)
 {
-  start();
+  rtems_interrupt_level level;
+
+  rtems_interrupt_disable( level);
+
+  /* Trigger watchdog reset */
+  WDCLKSEL = 0;
+  WDTC = 0xff;
+  WDMOD = 0x3;
+  WDFEED = 0xaa;
+  WDFEED = 0x55;
+
+  while (true) {
+    /* Do nothing */
+  }
 }
Index: c/src/lib/libbsp/arm/lpc24xx/startup/bspstart.c
===================================================================
--- c/src/lib/libbsp/arm/lpc24xx/startup/bspstart.c	(revision d1be26b9efd7dca78a304d52104d9ff53f44298c)
+++ c/src/lib/libbsp/arm/lpc24xx/startup/bspstart.c	(revision 7ae27751322a9b29ea9ff2adc146f064237127eb)
@@ -24,7 +24,10 @@
 #include <bsp/bootcard.h>
 #include <bsp/dma.h>
+#include <bsp/io.h>
+#include <bsp/irq-generic.h>
 #include <bsp/irq.h>
 #include <bsp/linker-symbols.h>
 #include <bsp/lpc24xx.h>
+#include <bsp/stackalloc.h>
 #include <bsp/start.h>
 #include <bsp/system-clocks.h>
@@ -39,13 +42,15 @@
 static void lpc24xx_ram_test_32( void)
 {
-  volatile unsigned *out = (volatile unsigned *) bsp_ram_ext_start;
-
-  while (out < (volatile unsigned *) bsp_ram_ext_end) {
+  const unsigned *end = (const unsigned *) bsp_region_data_end;
+  unsigned *begin = (unsigned *) bsp_region_data_begin;
+  unsigned *out = begin;
+
+  while (out != end) {
     *out = (unsigned) out;
     ++out;
   }
 
-  out = (volatile unsigned *) bsp_ram_ext_start;
-  while (out < (volatile unsigned *) bsp_ram_ext_end) {
+  out = begin;
+  while (out != end) {
     if (*out != (unsigned) out) {
       lpc24xx_fatal_error();
@@ -66,12 +71,9 @@
     uint32_t mode = 0;
 
-    /* Enable power */
-    PCONP = SET_FLAGS( PCONP, 0x0800);
-
-    /* Set PIN selects */
-    PINSEL5 = SET_FLAGS( PINSEL5, 0x05050555);
-    PINSEL6 = SET_FLAGS( PINSEL6, 0x55555555);
-    PINSEL8 = SET_FLAGS( PINSEL8, 0x55555555);
-    PINSEL9 = SET_FLAGS( PINSEL9, 0x50555555);
+    /* Enable module power */
+    lpc24xx_module_enable( LPC24XX_MODULE_EMC, 0, LPC24XX_MODULE_PCLK_DEFAULT);
+
+    /* IO configuration */
+    lpc24xx_io_config( LPC24XX_MODULE_EMC, 0, 0);
 
     /* Enable module, normal memory map and normal power mode */
@@ -167,12 +169,6 @@
     EMC_DYN_CFG0 |= 0x00080000;
 
-    /* Static Memory 0 settings */
-    EMC_STA_WAITWEN0 = 0x02;
-    EMC_STA_WAITOEN0 = 0x02;
-    EMC_STA_WAITRD0 = 0x1f;
-    EMC_STA_WAITPAGE0 = 0x1f;
-    EMC_STA_WAITWR0 = 0x1f;
-    EMC_STA_WAITTURN0 = 0x0f;
-    EMC_STA_CFG0 = 0x81;
+    /* Extended wait register */
+    EMC_STA_EXT_WAIT = 0;
 
     /* Static Memory 1 settings */
@@ -183,9 +179,9 @@
     EMC_STA_WAITWR1 = 0x08;
     EMC_STA_WAITTURN1 = 0x0f;
-    EMC_STA_CFG1 = 0x80;
+    EMC_STA_CFG1 = 0x81;
 
     /* RAM test */
     lpc24xx_ram_test_32();
-  #endif /* LPC24XX_EMC_MICRON */
+  #endif
 }
 
@@ -194,5 +190,5 @@
   #ifndef LPC24XX_HAS_UBOOT
     /* Enable main oscillator */
-    SCS = SET_FLAGS( SCS, 0x20);
+    SCS = SET_FLAG( SCS, 0x20);
     while (IS_FLAG_CLEARED( SCS, 0x40)) {
       /* Wait */
@@ -201,5 +197,5 @@
     /* Set PLL */
     lpc24xx_set_pll( 1, 0, 11, 3);
-  #endif /* LPC24XX_HAS_UBOOT */
+  #endif
 }
 
@@ -222,4 +218,17 @@
     PINSEL9 = 0;
     PINSEL10 = 0;
+    PINSEL11 = 0;
+
+    /* Set pin modes  */
+    PINMODE0 = 0;
+    PINMODE1 = 0;
+    PINMODE2 = 0;
+    PINMODE3 = 0;
+    PINMODE4 = 0;
+    PINMODE5 = 0;
+    PINMODE6 = 0;
+    PINMODE7 = 0;
+    PINMODE8 = 0;
+    PINMODE9 = 0;
 
     /* Set periperal clocks */
@@ -234,9 +243,6 @@
     MAMTIM = 4;
 
-    /* Set general purpose IO */
-    IODIR0 = 0;
-    IODIR1 = 0;
-    IOSET0 = 0xffffffff;
-    IOSET1 = 0xffffffff;
+    /* Enable fast IO for ports 0 and 1 */
+    SCS = SET_FLAG( SCS, 0x1);
 
     /* Set fast IO */
@@ -246,26 +252,26 @@
     FIO3DIR = 0;
     FIO4DIR = 0;
-    FIO0SET = 0xffffffff;
-    FIO1SET = 0xffffffff;
-    FIO2SET = 0xffffffff;
-    FIO3SET = 0xffffffff;
-    FIO4SET = 0xffffffff;
-
-    /* Initialize UART 0 */
-    PCONP = SET_FLAGS( PCONP, 0x08);
-    PCLKSEL0 = SET_FLAGS( PCLKSEL0, 0x40);
-    PINSEL0 = SET_FLAGS( PINSEL0, 0x50);
-    U0LCR = 0;
-    U0IER = 0;
-    U0LCR = 0x80;
-    U0DLL = lpc24xx_cclk() / 16 / LPC24XX_UART_BAUD;
-    U0DLM = 0;
-    U0LCR = 0x03;
-    U0FCR = 0x07;
+    FIO0CLR = 0xffffffff;
+    FIO1CLR = 0xffffffff;
+    FIO2CLR = 0xffffffff;
+    FIO3CLR = 0xffffffff;
+    FIO4CLR = 0xffffffff;
+
+    /* Initialize console */
+    #ifdef LPC24XX_CONFIG_CONSOLE
+      lpc24xx_module_enable( LPC24XX_MODULE_UART, 0, LPC24XX_MODULE_CCLK);
+      lpc24xx_io_config( LPC24XX_MODULE_UART, 0, LPC24XX_CONFIG_CONSOLE);
+      U0LCR = 0;
+      U0IER = 0;
+      U0LCR = 0x80;
+      U0DLL = lpc24xx_cclk() / 16 / LPC24XX_UART_BAUD;
+      U0DLM = 0;
+      U0LCR = 0x03;
+      U0FCR = 0x07;
+    #endif
 
     /* Initialize Timer 1 */
-    PCONP = SET_FLAGS( PCONP, 0x04);
-    PCLKSEL0 = SET_FLAGS( PCLKSEL0, 0x10);
-  #endif /* LPC24XX_HAS_UBOOT */
+    lpc24xx_module_enable( LPC24XX_MODULE_TIMER, 1, LPC24XX_MODULE_CCLK);
+  #endif
 }
 
@@ -273,22 +279,24 @@
 {
   #ifndef LPC24XX_HAS_UBOOT
-    unsigned *in = bsp_section_text_end;
-    unsigned *out = bsp_section_data_start;
+    const unsigned *end = (const unsigned *) bsp_section_data_end;
+    unsigned *in = (unsigned *) bsp_section_data_load_begin;
+    unsigned *out = (unsigned *) bsp_section_data_begin;
 
     /* Copy data */
-    while (out < bsp_section_data_end) {
+    while (out != end) {
       *out = *in;
       ++out;
       ++in;
     }
-  #endif /* LPC24XX_HAS_UBOOT */
+  #endif
 }
 
 static void lpc24xx_clear_bss( void)
 {
-  unsigned *out = bsp_section_bss_start;
+  const unsigned *end = (const unsigned *) bsp_section_bss_end;
+  unsigned *out = (unsigned *) bsp_section_bss_begin;
 
   /* Clear BSS */
-  while (out < bsp_section_bss_end) {
+  while (out != end) {
     *out = 0;
     ++out;
@@ -316,5 +324,7 @@
 
   /* Exceptions */
+  /* FIXME
   rtems_exception_init_mngt();
+  */
 
   /* Interrupts */
@@ -327,4 +337,24 @@
   /* DMA */
   lpc24xx_dma_initialize();
+
+  /* Task stacks */
+  bsp_stack_initialize(
+    bsp_section_stack_begin,
+    (intptr_t) bsp_section_stack_size
+  );
+
+  /* UART configurations */
+  #ifdef LPC24XX_CONFIG_UART_1
+    lpc24xx_module_enable( LPC24XX_MODULE_UART, 1, LPC24XX_MODULE_CCLK);
+    lpc24xx_io_config( LPC24XX_MODULE_UART, 1, LPC24XX_CONFIG_UART_1);
+  #endif
+  #ifdef LPC24XX_CONFIG_UART_2
+    lpc24xx_module_enable( LPC24XX_MODULE_UART, 2, LPC24XX_MODULE_CCLK);
+    lpc24xx_io_config( LPC24XX_MODULE_UART, 2, LPC24XX_CONFIG_UART_2);
+  #endif
+  #ifdef LPC24XX_CONFIG_UART_3
+    lpc24xx_module_enable( LPC24XX_MODULE_UART, 3, LPC24XX_MODULE_CCLK);
+    lpc24xx_io_config( LPC24XX_MODULE_UART, 3, LPC24XX_CONFIG_UART_3);
+  #endif
 }
 
Index: c/src/lib/libbsp/arm/lpc24xx/startup/linkcmds
===================================================================
--- c/src/lib/libbsp/arm/lpc24xx/startup/linkcmds	(revision d1be26b9efd7dca78a304d52104d9ff53f44298c)
+++ c/src/lib/libbsp/arm/lpc24xx/startup/linkcmds	(revision 7ae27751322a9b29ea9ff2adc146f064237127eb)
@@ -11,3 +11,17 @@
 }
 
+REGION_ALIAS ("REGION_START", RAM_EXT);
+REGION_ALIAS ("REGION_VECTOR", RAM_INT);
+REGION_ALIAS ("REGION_TEXT", RAM_EXT);
+REGION_ALIAS ("REGION_TEXT_LOAD", RAM_EXT);
+REGION_ALIAS ("REGION_RODATA", RAM_EXT);
+REGION_ALIAS ("REGION_RODATA_LOAD", RAM_EXT);
+REGION_ALIAS ("REGION_DATA", RAM_EXT);
+REGION_ALIAS ("REGION_DATA_LOAD", RAM_EXT);
+REGION_ALIAS ("REGION_FAST", RAM_INT);
+REGION_ALIAS ("REGION_FAST_LOAD", RAM_INT);
+REGION_ALIAS ("REGION_BSS", RAM_EXT);
+REGION_ALIAS ("REGION_WORK", RAM_EXT);
+REGION_ALIAS ("REGION_STACK", RAM_INT);
+
 INCLUDE linkcmds.base
Index: c/src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc2478
===================================================================
--- c/src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc2478	(revision d1be26b9efd7dca78a304d52104d9ff53f44298c)
+++ c/src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc2478	(revision 7ae27751322a9b29ea9ff2adc146f064237127eb)
@@ -12,3 +12,17 @@
 }
 
+REGION_ALIAS ("REGION_START", RAM_EXT);
+REGION_ALIAS ("REGION_VECTOR", RAM_INT);
+REGION_ALIAS ("REGION_TEXT", RAM_EXT);
+REGION_ALIAS ("REGION_TEXT_LOAD", RAM_EXT);
+REGION_ALIAS ("REGION_RODATA", RAM_EXT);
+REGION_ALIAS ("REGION_RODATA_LOAD", RAM_EXT);
+REGION_ALIAS ("REGION_DATA", RAM_EXT);
+REGION_ALIAS ("REGION_DATA_LOAD", RAM_EXT);
+REGION_ALIAS ("REGION_FAST", RAM_INT);
+REGION_ALIAS ("REGION_FAST_LOAD", RAM_INT);
+REGION_ALIAS ("REGION_BSS", RAM_EXT);
+REGION_ALIAS ("REGION_WORK", RAM_EXT);
+REGION_ALIAS ("REGION_STACK", RAM_INT);
+
 INCLUDE linkcmds.base
Index: c/src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc2478_ncs
===================================================================
--- c/src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc2478_ncs	(revision d1be26b9efd7dca78a304d52104d9ff53f44298c)
+++ c/src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc2478_ncs	(revision 7ae27751322a9b29ea9ff2adc146f064237127eb)
@@ -2,13 +2,28 @@
  * @file
  *
- * LPC2478 (NCS).
+ * LPC2478 (NCS, bootloader configuration).
  */
 
 MEMORY {
-        RAM_INT (AIW) : ORIGIN = 0x40000000, LENGTH = 64k
-        RAM_EXT (AIW) : ORIGIN = 0xa0400000, LENGTH = 4M
+        RAM_VEC (AIW) : ORIGIN = 0x40000000, LENGTH = 32k
+        RAM_INT (AIW) : ORIGIN = 0x40008000, LENGTH = 32k
+        RAM_EXT (AIW) : ORIGIN = 0xa0c00000, LENGTH = 4M
         ROM_INT (RX)  : ORIGIN = 0x00000000, LENGTH = 512k - 8k
         NIRVANA : ORIGIN = 0, LENGTH = 0
 }
 
-INCLUDE linkcmds.rom
+REGION_ALIAS ("REGION_START", ROM_INT);
+REGION_ALIAS ("REGION_VECTOR", RAM_VEC);
+REGION_ALIAS ("REGION_TEXT", ROM_INT);
+REGION_ALIAS ("REGION_TEXT_LOAD", ROM_INT);
+REGION_ALIAS ("REGION_RODATA", ROM_INT);
+REGION_ALIAS ("REGION_RODATA_LOAD", ROM_INT);
+REGION_ALIAS ("REGION_DATA", RAM_EXT);
+REGION_ALIAS ("REGION_DATA_LOAD", ROM_INT);
+REGION_ALIAS ("REGION_FAST", RAM_INT);
+REGION_ALIAS ("REGION_FAST_LOAD", RAM_INT);
+REGION_ALIAS ("REGION_BSS", RAM_EXT);
+REGION_ALIAS ("REGION_WORK", RAM_EXT);
+REGION_ALIAS ("REGION_STACK", RAM_INT);
+
+INCLUDE linkcmds.base
Index: c/src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc2478_ncs_ram
===================================================================
--- c/src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc2478_ncs_ram	(revision d1be26b9efd7dca78a304d52104d9ff53f44298c)
+++ c/src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc2478_ncs_ram	(revision 7ae27751322a9b29ea9ff2adc146f064237127eb)
@@ -7,8 +7,22 @@
 MEMORY {
         RAM_INT (AIW) : ORIGIN = 0x40000000, LENGTH = 64k
-        RAM_EXT (AIW) : ORIGIN = 0xa0000000, LENGTH = 8M
+        RAM_EXT (AIW) : ORIGIN = 0xa0000000, LENGTH = 16M
         ROM_INT (RX)  : ORIGIN = 0x00000000, LENGTH = 512k - 8k
         NIRVANA : ORIGIN = 0, LENGTH = 0
 }
 
+REGION_ALIAS ("REGION_START", RAM_EXT);
+REGION_ALIAS ("REGION_VECTOR", RAM_INT);
+REGION_ALIAS ("REGION_TEXT", RAM_EXT);
+REGION_ALIAS ("REGION_TEXT_LOAD", RAM_EXT);
+REGION_ALIAS ("REGION_RODATA", RAM_EXT);
+REGION_ALIAS ("REGION_RODATA_LOAD", RAM_EXT);
+REGION_ALIAS ("REGION_DATA", RAM_EXT);
+REGION_ALIAS ("REGION_DATA_LOAD", RAM_EXT);
+REGION_ALIAS ("REGION_FAST", RAM_INT);
+REGION_ALIAS ("REGION_FAST_LOAD", RAM_INT);
+REGION_ALIAS ("REGION_BSS", RAM_EXT);
+REGION_ALIAS ("REGION_WORK", RAM_EXT);
+REGION_ALIAS ("REGION_STACK", RAM_INT);
+
 INCLUDE linkcmds.base
