Changeset 7ae2775 in rtems
- Timestamp:
- 07/17/09 13:53:04 (14 years ago)
- Branches:
- 4.10, 4.11, 5, master
- Children:
- ec5d4505
- Parents:
- 9832a22c
- Location:
- c/src/lib/libbsp
- Files:
-
- 39 edited
Legend:
- Unmodified
- Added
- Removed
-
c/src/lib/libbsp/arm/ChangeLog
r9832a22c r7ae2775 1 2009-07-15 Sebastian Huber <sebastian.huber@embedded-brains.de> 2 3 * shared/irq/irq_asm.S, shared/startup/linkcmds.rom: Removed files. 4 * Makefile.am: Removed references to deleted file 5 'shared/irq/irq_asm.S'. 6 * shared/irq/irq_init.c: Do not install fast interrupt handler. 7 Changed interrupt handler. 8 * shared/abort/simple_abort.c: Fixed inline assembler statement. 9 * shared/include/linker-symbols.h: Renamed sections. New symbols. 10 * shared/start/start.S: Added THUMB support. Update for linker symbol 11 changes. 12 1 13 2009-06-04 Xi Yang <hiyangxi@gmail.com> 2 14 -
c/src/lib/libbsp/arm/Makefile.am
r9832a22c r7ae2775 18 18 19 19 # irq 20 EXTRA_DIST += shared/irq/irq_asm.S21 20 EXTRA_DIST += shared/irq/irq_init.c 22 21 -
c/src/lib/libbsp/arm/edb7312/ChangeLog
r9832a22c r7ae2775 4 4 RTEMS_BSP_BOOTCARD_OPTIONS. Add RTEMS_BSP_CLEANUP_OPTIONS so all BSPs 5 5 have the same options. 6 7 2009-07-15 Sebastian Huber <sebastian.huber@embedded-brains.de> 8 9 * Makefile.am: Removed references to deleted file 10 '../shared/irq/irq_asm.S'. 11 * irq/bsp_irq_asm.S: Renamed ExecuteITHandler() into 12 bsp_interrupt_dispatch(). 6 13 7 14 2009-07-12 Xi Yang <hiyangxi@gmail.com> -
c/src/lib/libbsp/arm/edb7312/Makefile.am
r9832a22c r7ae2775 52 52 libbsp_a_SOURCES += irq/irq.c irq/bsp_irq_init.c \ 53 53 ../../arm/shared/irq/irq_init.c irq/bsp_irq_asm.S \ 54 ../../arm/shared/irq/irq_asm.Sirq/irq.h54 irq/irq.h 55 55 56 56 if HAS_NETWORKING -
c/src/lib/libbsp/arm/edb7312/irq/bsp_irq_asm.S
r9832a22c r7ae2775 23 23 */ 24 24 25 .globl ExecuteITHandler26 ExecuteITHandler:25 .globl bsp_interrupt_dispatch 26 bsp_interrupt_dispatch : 27 27 /* 28 28 * Look at interrupt status register to determine source. -
c/src/lib/libbsp/arm/gba/ChangeLog
r9832a22c r7ae2775 4 4 RTEMS_BSP_BOOTCARD_OPTIONS. Add RTEMS_BSP_CLEANUP_OPTIONS so all BSPs 5 5 have the same options. 6 7 2009-07-15 Sebastian Huber <sebastian.huber@embedded-brains.de> 8 9 * startup/cpu.c, startup/cpu_asm.S: Removed files. 10 * Makefile.am: Removed references to deleted files 'startup/cpu.c' and 11 'startup/cpu_asm.S'. 12 * irq/irq_asm.S, irq/bsp_irq_asm.S: Renamed ExecuteITHandler() into 13 bsp_interrupt_dispatch(). 6 14 7 15 2009-05-08 Joel Sherrill <joel.sherrill@oarcorp.com> -
c/src/lib/libbsp/arm/gba/Makefile.am
r9832a22c r7ae2775 34 34 libbsp_a_SOURCES = 35 35 36 # some objects have to be forced together to ensure they are ALWAYS37 # the ones linked into the application executable. Every application38 # needs startup/bspstart.c, so we will force in the others39 noinst_PROGRAMS += gbaoverrides.rel40 gbaoverrides_rel_SOURCES = startup/bspstart.c startup/cpu.c startup/cpu_asm.S41 gbaoverrides_rel_CPPFLAGS = $(AM_CPPFLAGS)42 gbaoverrides_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)43 44 36 # startup 45 37 libbsp_a_SOURCES += ../../shared/bsplibc.c ../../shared/bsppost.c \ … … 47 39 ../../shared/bsppredriverhook.c ../../shared/bspclean.c \ 48 40 startup/bspreset.c ../../shared/bootcard.c ../../shared/sbrk.c \ 49 ../../shared/gnatinstallhandler.c 41 ../../shared/gnatinstallhandler.c \ 42 startup/bspstart.c 50 43 # clock 51 44 libbsp_a_SOURCES += clock/clockdrv.c ../../../shared/clockdrv_shell.h … … 61 54 irq/bsp_irq_asm.S irq/irq_asm.S 62 55 63 libbsp_a_LIBADD = gbaoverrides.rel64 65 56 include $(srcdir)/preinstall.am 66 57 include $(top_srcdir)/../../../../automake/local.am -
c/src/lib/libbsp/arm/gba/irq/bsp_irq_asm.S
r9832a22c r7ae2775 24 24 /** 25 25 * Execute interrupt handler 26 * function void ExecuteITHandler(void)26 * function void bsp_interrupt_dispatch(void) 27 27 * 28 28 * Look at interrupt status register to determine source. … … 35 35 /* .section .iwram */ 36 36 37 PUBLIC_ARM_FUNCTION( ExecuteITHandler)37 PUBLIC_ARM_FUNCTION(bsp_interrupt_dispatch) 38 38 ldr r1, =GBA_REG_IE_ADDR 39 39 ldrh r1, [r1] … … 175 175 mov pc, lr 176 176 177 LABEL_END( ExecuteITHandler)177 LABEL_END(bsp_interrupt_dispatch) 178 178 /* @endcond */ 179 179 -
c/src/lib/libbsp/arm/gba/irq/irq_asm.S
r9832a22c r7ae2775 58 58 59 59 /* BSP specific function to INT handler */ 60 bl ExecuteITHandler60 bl bsp_interrupt_dispatch 61 61 62 62 /* one less nest level */ -
c/src/lib/libbsp/arm/lpc24xx/ChangeLog
r9832a22c r7ae2775 4 4 RTEMS_BSP_BOOTCARD_OPTIONS. Add RTEMS_BSP_CLEANUP_OPTIONS so all BSPs 5 5 have the same options. 6 7 2009-07-15 Sebastian Huber <sebastian.huber@embedded-brains.de> 8 9 * i2c/i2c.c, include/i2c.h, include/idle.h, include/io.h, misc/idle.c, 10 misc/io.c: New files. 11 * Makefile.am, README, configure.ac, preinstall.am, 12 clock/clock-config.c, console/console-config.c, include/irq.h, 13 include/dma.h, include/lpc24xx.h, include/system-clocks.h, irq/irq.c, 14 misc/dma.c, misc/system-clocks.c, network/network.c, rtc/rtc-config.c, 15 startup/bspreset.c, startup/bspstart.c, startup/linkcmds, 16 startup/linkcmds.lpc2478, startup/linkcmds.lpc2478_ncs, 17 startup/linkcmds.lpc2478_ncs_ram: Changes throughout. 6 18 7 19 2009-02-27 Sebastian Huber <sebastian.huber@embedded-brains.de> -
c/src/lib/libbsp/arm/lpc24xx/Makefile.am
r9832a22c r7ae2775 31 31 include_bsp_HEADERS += ../../shared/include/irq-generic.h 32 32 include_bsp_HEADERS += ../../shared/include/irq-info.h 33 include_bsp_HEADERS += ../../shared/include/stackalloc.h 33 34 include_bsp_HEADERS += ../../shared/tod.h 34 35 include_bsp_HEADERS += ../shared/include/linker-symbols.h … … 40 41 include_bsp_HEADERS += include/ssp.h 41 42 include_bsp_HEADERS += include/dma.h 43 include_bsp_HEADERS += include/idle.h 44 include_bsp_HEADERS += include/i2c.h 45 include_bsp_HEADERS += include/io.h 42 46 43 47 include_HEADERS += ../../shared/include/tm27.h … … 54 58 55 59 dist_project_lib_DATA += ../shared/startup/linkcmds.base \ 56 ../shared/startup/linkcmds.rom \57 60 startup/linkcmds.lpc2478 \ 58 61 startup/linkcmds.lpc2478_ncs \ … … 77 80 ../../shared/gnatinstallhandler.c \ 78 81 ../../shared/sbrk.c \ 82 ../../shared/src/stackalloc.c \ 79 83 ../shared/abort/simple_abort.c 80 84 … … 88 92 ../../shared/src/irq-info.c \ 89 93 ../../shared/src/irq-shell.c \ 90 ../shared/irq/irq_asm.S \91 94 irq/irq.c 92 95 … … 107 110 # Misc 108 111 libbsp_a_SOURCES += misc/system-clocks.c \ 109 misc/dma.c 112 misc/dma.c \ 113 misc/idle.c \ 114 misc/io.c 110 115 111 116 # SSP 112 117 libbsp_a_SOURCES += ssp/ssp.c 118 119 # I2C 120 libbsp_a_SOURCES += i2c/i2c.c 113 121 114 122 ############################################################################### -
c/src/lib/libbsp/arm/lpc24xx/README
r9832a22c r7ae2775 2 2 # $Id$ 3 3 # 4 5 Note: A Binutils version with REGION_ALIAS feature is required to link the BSP. 4 6 5 7 Development Board: QVGA Base Board from Embedded Artists … … 14 16 o SSP (SPI mode): This driver is in active development. Use with care. 15 17 o Network 18 o I2C 16 19 17 20 Howto setup QVGA Base Board? -
c/src/lib/libbsp/arm/lpc24xx/clock/clock-config.c
r9832a22c r7ae2775 26 26 #include <bsp/lpc24xx.h> 27 27 #include <bsp/irq.h> 28 #include <bsp/io.h> 28 29 #include <bsp/system-clocks.h> 29 30 … … 56 57 * (uint64_t) rtems_configuration_get_microseconds_per_tick()) / 1000000; 57 58 58 /* Set timer pclk to cclk */ 59 rtems_interrupt_disable( level); 60 PCONP = SET_FLAGS( PCONP, 0x02); 61 PCLKSEL0 = SET_FLAGS( PCLKSEL0, 0x04); 62 rtems_interrupt_enable( level); 59 /* Enable module power */ 60 lpc24xx_module_enable( LPC24XX_MODULE_TIMER, 0, LPC24XX_MODULE_CCLK); 63 61 64 62 /* Reset timer */ -
c/src/lib/libbsp/arm/lpc24xx/configure.ac
r9832a22c r7ae2775 25 25 26 26 RTEMS_BSPOPTS_SET([LPC24XX_OSCILLATOR_MAIN],[*],[12000000U]) 27 RTEMS_BSPOPTS_HELP([LPC24XX_OSCILLATOR_MAIN],[ Main oscillator frequency in Hz])27 RTEMS_BSPOPTS_HELP([LPC24XX_OSCILLATOR_MAIN],[main oscillator frequency in Hz]) 28 28 29 RTEMS_BSPOPTS_SET([LPC24XX_OSCILLATOR_RTC],[*],[32768 ])29 RTEMS_BSPOPTS_SET([LPC24XX_OSCILLATOR_RTC],[*],[32768U]) 30 30 RTEMS_BSPOPTS_HELP([LPC24XX_OSCILLATOR_RTC],[RTC oscillator frequency in Hz]) 31 31 32 RTEMS_BSPOPTS_SET([LPC24XX_CCLK],[*],[72000000 ])32 RTEMS_BSPOPTS_SET([LPC24XX_CCLK],[*],[72000000U]) 33 33 RTEMS_BSPOPTS_HELP([LPC24XX_CCLK],[CPU clock in Hz]) 34 34 35 RTEMS_BSPOPTS_SET([LPC24XX_UART_BAUD],[*],[115200 ])36 RTEMS_BSPOPTS_HELP([LPC24XX_UART_BAUD],[ Baud for UARTs])35 RTEMS_BSPOPTS_SET([LPC24XX_UART_BAUD],[*],[115200U]) 36 RTEMS_BSPOPTS_HELP([LPC24XX_UART_BAUD],[baud for UARTs]) 37 37 38 38 RTEMS_BSPOPTS_SET([LPC24XX_HAS_UBOOT],[lpc2478],[1]) 39 39 RTEMS_BSPOPTS_SET([LPC24XX_HAS_UBOOT],[lpc2478_ncs_ram],[1]) 40 RTEMS_BSPOPTS_HELP([LPC24XX_HAS_UBOOT],[ Enable U-Boot startup])40 RTEMS_BSPOPTS_HELP([LPC24XX_HAS_UBOOT],[enable U-Boot startup]) 41 41 42 42 RTEMS_BSPOPTS_SET([LPC24XX_ETHERNET_RMII],[lpc2478_ncs],[1]) 43 43 RTEMS_BSPOPTS_SET([LPC24XX_ETHERNET_RMII],[lpc2478_ncs_ram],[1]) 44 RTEMS_BSPOPTS_HELP([LPC24XX_ETHERNET_RMII],[ Enable RMII for Ethernet])44 RTEMS_BSPOPTS_HELP([LPC24XX_ETHERNET_RMII],[enable RMII for Ethernet]) 45 45 46 46 RTEMS_BSPOPTS_SET([LPC24XX_EMC_MICRON],[lpc2478_ncs],[1]) 47 RTEMS_BSPOPTS_HELP([LPC24XX_EMC_MICRON],[Enable RMII for Ethernet]) 47 RTEMS_BSPOPTS_HELP([LPC24XX_EMC_MICRON],[use Micron configuration for EMC]) 48 49 RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_CONSOLE],[*],[0]) 50 RTEMS_BSPOPTS_HELP([LPC24XX_CONFIG_CONSOLE],[configuration for console (UART 0)]) 51 52 RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_UART_1],[*],[]) 53 RTEMS_BSPOPTS_HELP([LPC24XX_CONFIG_UART_1],[configuration for UART 1]) 54 55 RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_UART_2],[*],[]) 56 RTEMS_BSPOPTS_HELP([LPC24XX_CONFIG_UART_2],[configuration for UART 2]) 57 58 RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_UART_3],[*],[]) 59 RTEMS_BSPOPTS_HELP([LPC24XX_CONFIG_UART_3],[configuration for UART 3]) 60 61 RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_I2C_0],[lpc2478_ncs_ram],[0]) 62 RTEMS_BSPOPTS_HELP([LPC24XX_CONFIG_I2C_0],[configuration for I2C 0]) 63 64 RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_I2C_1],[*],[]) 65 RTEMS_BSPOPTS_HELP([LPC24XX_CONFIG_I2C_1],[configuration for I2C 1]) 66 67 RTEMS_BSPOPTS_SET([LPC24XX_CONFIG_I2C_2],[*],[]) 68 RTEMS_BSPOPTS_HELP([LPC24XX_CONFIG_I2C_2],[configuration for I2C 2]) 48 69 49 70 RTEMS_BSP_BOOTCARD_OPTIONS -
c/src/lib/libbsp/arm/lpc24xx/console/console-config.c
r9832a22c r7ae2775 26 26 #include <bsp/irq.h> 27 27 28 #define LPC24XX_UART_NUMBER 129 30 28 static uint8_t lpc24xx_uart_register( uint32_t addr, uint8_t i) 31 29 { … … 42 40 } 43 41 42 rtems_device_minor_number Console_Port_Minor = 0; 43 44 console_tbl Console_Port_Tbl [] = { 45 #ifdef LPC24XX_CONFIG_CONSOLE 46 { 47 .sDeviceName = "/dev/ttyS0", 48 .deviceType = SERIAL_NS16550, 49 .pDeviceFns = &ns16550_fns, 50 .deviceProbe = NULL, 51 .pDeviceFlow = NULL, 52 .ulMargin = 16, 53 .ulHysteresis = 8, 54 .pDeviceParams = (void *) LPC24XX_UART_BAUD, 55 .ulCtrlPort1 = UART0_BASE_ADDR, 56 .ulCtrlPort2 = 0, 57 .ulDataPort = UART0_BASE_ADDR, 58 .getRegister = lpc24xx_uart_register, 59 .setRegister = lpc24xx_uart_set_register, 60 .getData = NULL, 61 .setData = NULL, 62 .ulClock = LPC24XX_CCLK, 63 .ulIntVector = LPC24XX_IRQ_UART_0 64 }, 65 #endif 66 #ifdef LPC24XX_CONFIG_UART_1 67 { 68 .sDeviceName = "/dev/ttyS1", 69 .deviceType = SERIAL_NS16550, 70 .pDeviceFns = &ns16550_fns, 71 .deviceProbe = NULL, 72 .pDeviceFlow = NULL, 73 .ulMargin = 16, 74 .ulHysteresis = 8, 75 .pDeviceParams = (void *) LPC24XX_UART_BAUD, 76 .ulCtrlPort1 = UART1_BASE_ADDR, 77 .ulCtrlPort2 = 0, 78 .ulDataPort = UART1_BASE_ADDR, 79 .getRegister = lpc24xx_uart_register, 80 .setRegister = lpc24xx_uart_set_register, 81 .getData = NULL, 82 .setData = NULL, 83 .ulClock = LPC24XX_CCLK, 84 .ulIntVector = LPC24XX_IRQ_UART_1 85 }, 86 #endif 87 #ifdef LPC24XX_CONFIG_UART_2 88 { 89 .sDeviceName = "/dev/ttyS2", 90 .deviceType = SERIAL_NS16550, 91 .pDeviceFns = &ns16550_fns, 92 .deviceProbe = NULL, 93 .pDeviceFlow = NULL, 94 .ulMargin = 16, 95 .ulHysteresis = 8, 96 .pDeviceParams = (void *) LPC24XX_UART_BAUD, 97 .ulCtrlPort1 = UART2_BASE_ADDR, 98 .ulCtrlPort2 = 0, 99 .ulDataPort = UART2_BASE_ADDR, 100 .getRegister = lpc24xx_uart_register, 101 .setRegister = lpc24xx_uart_set_register, 102 .getData = NULL, 103 .setData = NULL, 104 .ulClock = LPC24XX_CCLK, 105 .ulIntVector = LPC24XX_IRQ_UART_2 106 }, 107 #endif 108 #ifdef LPC24XX_CONFIG_UART_3 109 { 110 .sDeviceName = "/dev/ttyS3", 111 .deviceType = SERIAL_NS16550, 112 .pDeviceFns = &ns16550_fns, 113 .deviceProbe = NULL, 114 .pDeviceFlow = NULL, 115 .ulMargin = 16, 116 .ulHysteresis = 8, 117 .pDeviceParams = (void *) LPC24XX_UART_BAUD, 118 .ulCtrlPort1 = UART3_BASE_ADDR, 119 .ulCtrlPort2 = 0, 120 .ulDataPort = UART3_BASE_ADDR, 121 .getRegister = lpc24xx_uart_register, 122 .setRegister = lpc24xx_uart_set_register, 123 .getData = NULL, 124 .setData = NULL, 125 .ulClock = LPC24XX_CCLK, 126 .ulIntVector = LPC24XX_IRQ_UART_3 127 }, 128 #endif 129 }; 130 131 #define LPC24XX_UART_NUMBER \ 132 (sizeof( Console_Port_Tbl) / sizeof( Console_Port_Tbl [0])) 133 44 134 unsigned long Console_Port_Count = LPC24XX_UART_NUMBER; 45 135 46 rtems_device_minor_number Console_Port_Minor = 0; 47 48 console_data Console_Port_Data [LPC24XX_UART_NUMBER]; 49 50 console_tbl Console_Port_Tbl [LPC24XX_UART_NUMBER] = { 51 { 52 .sDeviceName = "/dev/ttyS0", 53 .deviceType = SERIAL_NS16550, 54 .pDeviceFns = &ns16550_fns, 55 .deviceProbe = NULL, 56 .pDeviceFlow = NULL, 57 .ulMargin = 16, 58 .ulHysteresis = 8, 59 .pDeviceParams = (void *) LPC24XX_UART_BAUD, 60 .ulCtrlPort1 = UART0_BASE_ADDR, 61 .ulCtrlPort2 = 0, 62 .ulDataPort = UART0_BASE_ADDR, 63 .getRegister = lpc24xx_uart_register, 64 .setRegister = lpc24xx_uart_set_register, 65 .getData = NULL, 66 .setData = NULL, 67 .ulClock = LPC24XX_CCLK, 68 .ulIntVector = LPC24XX_IRQ_UART_0 69 } 70 }; 136 console_data Console_Port_Data [LPC24XX_UART_NUMBER]; -
c/src/lib/libbsp/arm/lpc24xx/include/dma.h
r9832a22c r7ae2775 8 8 9 9 /* 10 * Copyright (c) 2008 11 * Embedded Brains GmbH10 * Copyright (c) 2008, 2009 11 * embedded brains GmbH 12 12 * Obere Lagerstr. 30 13 13 * D-82178 Puchheim … … 22 22 #define LIBBSP_ARM_LPC24XX_DMA_H 23 23 24 #include < stdbool.h>24 #include <rtems.h> 25 25 26 26 #ifdef __cplusplus … … 28 28 #endif /* __cplusplus */ 29 29 30 void lpc24xx_dma_initialize( 30 void lpc24xx_dma_initialize(void); 31 31 32 bool lpc24xx_dma_channel_obtain(unsigned channel);32 rtems_status_code lpc24xx_dma_channel_obtain(unsigned channel); 33 33 34 void lpc24xx_dma_channel_release( 34 void lpc24xx_dma_channel_release(unsigned channel); 35 35 36 void lpc24xx_dma_channel_disable( 36 void lpc24xx_dma_channel_disable(unsigned channel, bool force); 37 37 38 38 #ifdef __cplusplus -
c/src/lib/libbsp/arm/lpc24xx/include/irq.h
r9832a22c r7ae2775 67 67 #define LPC24XX_IRQ_I2S 31 68 68 69 #define LPC24XX_IRQ_PRIORITY_VALUE_MIN 0 70 #define LPC24XX_IRQ_PRIORITY_VALUE_MAX 15 71 69 72 /** 70 73 * @brief Minimum vector number. … … 77 80 #define BSP_INTERRUPT_VECTOR_MAX LPC24XX_IRQ_I2S 78 81 82 void bsp_interrupt_dispatch( void); 83 84 void lpc24xx_irq_set_priority( rtems_vector_number vector, unsigned priority); 85 86 unsigned lpc24xx_irq_priority( rtems_vector_number vector); 87 79 88 /** @} */ 80 89 -
c/src/lib/libbsp/arm/lpc24xx/include/lpc24xx.h
r9832a22c r7ae2775 39 39 #define VICSWPrioMask (*(volatile uint32_t *) (VIC_BASE_ADDR + 0x024)) 40 40 41 #define VICVectAddrBase (( uint32_t *) (VIC_BASE_ADDR + 0x100))41 #define VICVectAddrBase ((volatile uint32_t *) (VIC_BASE_ADDR + 0x100)) 42 42 #define VICVectAddr0 (*(volatile uint32_t *) (VIC_BASE_ADDR + 0x100)) 43 43 #define VICVectAddr1 (*(volatile uint32_t *) (VIC_BASE_ADDR + 0x104)) … … 73 73 #define VICVectAddr31 (*(volatile uint32_t *) (VIC_BASE_ADDR + 0x17C)) 74 74 75 #define VICVectPriorityBase ((uint32_t *) (VIC_BASE_ADDR + 0x200)) 76 #define VICVectPriority( i) (*((volatile uint32_t *) (VIC_BASE_ADDR + 0x200) + (i))) 75 #define VICVectPriorityBase ((volatile uint32_t *) (VIC_BASE_ADDR + 0x200)) 77 76 #define VICVectPriority0 (*(volatile uint32_t *) (VIC_BASE_ADDR + 0x200)) 78 77 #define VICVectPriority1 (*(volatile uint32_t *) (VIC_BASE_ADDR + 0x204)) … … 124 123 #define PINSEL9 (*(volatile uint32_t *) (PINSEL_BASE_ADDR + 0x24)) 125 124 #define PINSEL10 (*(volatile uint32_t *) (PINSEL_BASE_ADDR + 0x28)) 125 #define PINSEL11 (*(volatile uint32_t *) (PINSEL_BASE_ADDR + 0x2C)) 126 126 127 127 #define PINMODE0 (*(volatile uint32_t *) (PINSEL_BASE_ADDR + 0x40)) … … 795 795 #define AD0GDR (*(volatile uint32_t *) (AD0_BASE_ADDR + 0x04)) 796 796 #define AD0INTEN (*(volatile uint32_t *) (AD0_BASE_ADDR + 0x0C)) 797 #define AD0_DATA_START ((volatile uint32_t *) (AD0_BASE_ADDR + 0x10)) 797 798 #define AD0DR0 (*(volatile uint32_t *) (AD0_BASE_ADDR + 0x10)) 798 799 #define AD0DR1 (*(volatile uint32_t *) (AD0_BASE_ADDR + 0x14)) … … 1122 1123 #define MAC_MODULEID (*(volatile uint32_t *) (MAC_BASE_ADDR + 0xFFC)) /* Module ID reg (RO) */ 1123 1124 1125 /* LCD Controller */ 1126 1127 #define LCD_BASE_ADDR 0xFFE10000 1128 #define LCD_CFG (*(volatile uint32_t *) 0xE01FC1B8) 1129 #define LCD_TIMH (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x000)) 1130 #define LCD_TIMV (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x004)) 1131 #define LCD_POL (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x008)) 1132 #define LCD_LE (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x00C)) 1133 #define LCD_UPBASE (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x010)) 1134 #define LCD_LPBASE (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x014)) 1135 #define LCD_CTRL (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x018)) 1136 #define LCD_INTMSK (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x01C)) 1137 #define LCD_INTRAW (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x020)) 1138 #define LCD_INTSTAT (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x024)) 1139 #define LCD_INTCLR (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x028)) 1140 #define LCD_UPCURR (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x02C)) 1141 #define LCD_LPCURR (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x030)) 1142 #define LCD_PAL_ADDR (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x200)) 1143 #define CRSR_IMG (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x800)) 1144 #define CRSR_CTLR (*(volatile uint32_t *) (LCD_BASE_ADDR + 0xC00)) 1145 #define CRSR_CFG (*(volatile uint32_t *) (LCD_BASE_ADDR + 0xC04)) 1146 #define CRSR_PAL0 (*(volatile uint32_t *) (LCD_BASE_ADDR + 0xC08)) 1147 #define CRSR_PAL1 (*(volatile uint32_t *) (LCD_BASE_ADDR + 0xC0C)) 1148 #define CRSR_XY (*(volatile uint32_t *) (LCD_BASE_ADDR + 0xC10)) 1149 #define CRSR_CLIP (*(volatile uint32_t *) (LCD_BASE_ADDR + 0xC14)) 1150 #define CRSR_INTMSK (*(volatile uint32_t *) (LCD_BASE_ADDR + 0xC20)) 1151 #define CRSR_INTCLR (*(volatile uint32_t *) (LCD_BASE_ADDR + 0xC24)) 1152 #define CRSR_INTRAW (*(volatile uint32_t *) (LCD_BASE_ADDR + 0xC28)) 1153 #define CRSR_INTSTAT (*(volatile uint32_t *) (LCD_BASE_ADDR + 0xC2C)) 1154 1124 1155 /* Register Fields */ 1125 1126 /* PCONP */1127 1128 #define PCONP_PCTIM0 0x00000002U1129 1130 #define PCONP_PCTIM1 0x00000004U1131 1132 #define PCONP_PCUART0 0x00000008U1133 1134 #define PCONP_PCUART1 0x00000010U1135 1136 #define PCONP_PCPWM0 0x00000020U1137 1138 #define PCONP_PCPWM1 0x00000040U1139 1140 #define PCONP_PCI2C0 0x00000080U1141 1142 #define PCONP_PCSPI 0x00000100U1143 1144 #define PCONP_PCRTC 0x00000200U1145 1146 #define PCONP_PCSSP1 0x00000400U1147 1148 #define PCONP_PCEMC 0x00000800U1149 1150 #define PCONP_PCAD 0x00001000U1151 1152 #define PCONP_PCCAN1 0x00002000U1153 1154 #define PCONP_PCCAN2 0x00004000U1155 1156 #define PCONP_PCI2C1 0x00080000U1157 1158 #define PCONP_PCLCD 0x00100000U1159 1160 #define PCONP_PCSSP0 0x00200000U1161 1162 #define PCONP_PCTIM2 0x00400000U1163 1164 #define PCONP_PCTIM3 0x00800000U1165 1166 #define PCONP_PCUART2 0x01000000U1167 1168 #define PCONP_PCUART3 0x02000000U1169 1170 #define PCONP_PCI2C2 0x04000000U1171 1172 #define PCONP_PCI2S 0x08000000U1173 1174 #define PCONP_PCSDC 0x10000000U1175 1176 #define PCONP_PCGPDMA 0x20000000U1177 1178 #define PCONP_PCENET 0x40000000U1179 1180 #define PCONP_PCUSB 0x80000000U1181 1156 1182 1157 /* CLKSRCSEL */ … … 2023 1998 #define ETH_CMD_FULL_DUPLEX 0x00000400U 2024 1999 2000 /* ETH_STAT */ 2001 2002 #define ETH_STAT_RX_ACTIVE 0x00000001U 2003 2004 #define ETH_STAT_TX_ACTIVE 0x00000002U 2005 2025 2006 /* AHBCFG */ 2026 2007 … … 2107 2088 #define EMC_DYN_CTRL_CMD_NOP 0x00000180U 2108 2089 2090 /* I2C */ 2091 2092 typedef struct { 2093 uint32_t conset; 2094 uint32_t stat; 2095 uint32_t dat; 2096 uint32_t adr; 2097 uint32_t sclh; 2098 uint32_t scll; 2099 uint32_t conclr; 2100 } lpc24xx_i2c; 2101 2102 #define LPC24XX_I2C_AA (1U << 2U) 2103 2104 #define LPC24XX_I2C_SI (1U << 3U) 2105 2106 #define LPC24XX_I2C_STO (1U << 4U) 2107 2108 #define LPC24XX_I2C_STA (1U << 5U) 2109 2110 #define LPC24XX_I2C_EN (1U << 6U) 2111 2112 /* IO */ 2113 2114 typedef struct { 2115 uint32_t dir; 2116 uint32_t reserved [3]; 2117 uint32_t mask; 2118 uint32_t pin; 2119 uint32_t set; 2120 uint32_t clr; 2121 } lpc24xx_fio; 2122 2123 static volatile uint32_t * const LPC24XX_PINSEL = &PINSEL0; 2124 2125 static volatile uint32_t * const LPC24XX_PINMODE = &PINMODE0; 2126 2127 static volatile lpc24xx_fio * const LPC24XX_FIO = (volatile lpc24xx_fio *) FIO_BASE_ADDR; 2128 2109 2129 #endif /* LIBBSP_ARM_LPC24XX_LPC24XX_H */ -
c/src/lib/libbsp/arm/lpc24xx/include/system-clocks.h
r9832a22c r7ae2775 28 28 void lpc24xx_micro_seconds_delay( unsigned us); 29 29 30 unsigned lpc24xx_pllclk( void); 31 30 32 unsigned lpc24xx_cclk( void); 31 33 -
c/src/lib/libbsp/arm/lpc24xx/irq/irq.c
r9832a22c r7ae2775 8 8 9 9 /* 10 * Copyright (c) 2008 11 * Embedded Brains GmbH10 * Copyright (c) 2008, 2009 11 * embedded brains GmbH 12 12 * Obere Lagerstr. 30 13 13 * D-82178 Puchheim … … 24 24 #include <bsp/lpc24xx.h> 25 25 26 void ExecuteITHandler( void) 26 static inline bool lpc24xx_irq_is_valid( rtems_vector_number vector) 27 { 28 return vector <= BSP_INTERRUPT_VECTOR_MAX; 29 } 30 31 void lpc24xx_irq_set_priority( rtems_vector_number vector, unsigned priority) 32 { 33 if (lpc24xx_irq_is_valid( vector)) { 34 if (priority > LPC24XX_IRQ_PRIORITY_VALUE_MAX) { 35 priority = LPC24XX_IRQ_PRIORITY_VALUE_MAX; 36 } 37 38 VICVectPriorityBase [vector] = priority; 39 } 40 } 41 42 unsigned lpc24xx_irq_priority( rtems_vector_number vector) 43 { 44 if (lpc24xx_irq_is_valid( vector)) { 45 return VICVectPriorityBase [vector]; 46 } else { 47 return LPC24XX_IRQ_PRIORITY_VALUE_MIN - 1; 48 } 49 } 50 51 void bsp_interrupt_dispatch( void) 27 52 { 28 53 /* Read current vector number */ 29 54 rtems_vector_number vector = VICVectAddr; 30 55 31 /* Acknowledge interrupt*/32 VICVectAddr = 0;56 /* Enable interrupts in program status register */ 57 uint32_t psr = arm_status_irq_enable(); 33 58 34 59 /* Dispatch interrupt handlers */ 35 60 bsp_interrupt_handler_dispatch( vector); 61 62 /* Restore program status register */ 63 arm_status_restore( psr); 64 65 /* Acknowledge interrupt */ 66 VICVectAddr = 0; 36 67 } 37 68 38 69 rtems_status_code bsp_interrupt_vector_enable( rtems_vector_number vector) 39 70 { 40 VICIntEnable = 1U << vector; 71 if (lpc24xx_irq_is_valid( vector)) { 72 VICIntEnable = 1U << vector; 73 } 41 74 42 75 return RTEMS_SUCCESSFUL; … … 45 78 rtems_status_code bsp_interrupt_vector_disable( rtems_vector_number vector) 46 79 { 47 VICIntEnClear = 1U << vector; 80 if (lpc24xx_irq_is_valid( vector)) { 81 VICIntEnClear = 1U << vector; 82 } 48 83 49 84 return RTEMS_SUCCESSFUL; 50 85 } 86 87 /* FIXME */ 88 void arm_exc_interrupt( void); 51 89 52 90 rtems_status_code bsp_interrupt_facility_initialize( void) … … 80 118 81 119 /* Install the IRQ exception handler */ 82 _CPU_ISR_install_vector( ARM_EXCEPTION_IRQ, _ISR_Handler, NULL);120 _CPU_ISR_install_vector( ARM_EXCEPTION_IRQ, arm_exc_interrupt, NULL); 83 121 84 122 return RTEMS_SUCCESSFUL; … … 87 125 void bsp_interrupt_handler_default( rtems_vector_number vector) 88 126 { 89 printk( " Spurious interrupt: %u\n", vector);127 printk( "spurious interrupt: %u\n", vector); 90 128 } -
c/src/lib/libbsp/arm/lpc24xx/misc/dma.c
r9832a22c r7ae2775 8 8 9 9 /* 10 * Copyright (c) 2008 11 * Embedded Brains GmbH10 * Copyright (c) 2008, 2009 11 * embedded brains GmbH 12 12 * Obere Lagerstr. 30 13 13 * D-82178 Puchheim … … 23 23 #include <bsp/lpc24xx.h> 24 24 #include <bsp/dma.h> 25 #include <bsp/io.h> 25 26 26 27 /** … … 32 33 * @brief Initializes the general purpose DMA. 33 34 */ 34 void lpc24xx_dma_initialize( 35 void lpc24xx_dma_initialize(void) 35 36 { 36 37 rtems_interrupt_level level; 37 38 38 /* Enable power */ 39 rtems_interrupt_disable( level); 40 PCONP = SET_FLAG( PCONP, PCONP_PCGPDMA); 41 rtems_interrupt_enable( level); 39 /* Enable module power */ 40 lpc24xx_module_enable(LPC24XX_MODULE_GPDMA, 0, LPC24XX_MODULE_PCLK_DEFAULT); 42 41 43 42 /* Disable module */ … … 60 59 61 60 /** 62 * @brief Returns true if the channel @a channel was obtained.61 * @brief Tries to obtain the channel @a channel. 63 62 * 64 * If the channel number @a channel is out of range the last valid channel will 65 * be used. 63 * @retval RTEMS_SUCCESSFUL Successful operation. 64 * @retval RTEMS_INVALID_ID Invalid channel number. 65 * @retval RTEMS_RESOURCE_IN_USE Channel already occupied. 66 66 */ 67 bool lpc24xx_dma_channel_obtain(unsigned channel)67 rtems_status_code lpc24xx_dma_channel_obtain(unsigned channel) 68 68 { 69 rtems_interrupt_level level; 70 bool occupation = true; 69 if (channel < GPDMA_CH_NUMBER) { 70 rtems_interrupt_level level; 71 bool occupation = true; 71 72 72 if (channel > GPDMA_CH_NUMBER) { 73 channel = GPDMA_CH_NUMBER - 1; 73 rtems_interrupt_disable(level); 74 occupation = lpc24xx_dma_channel_occupation [channel]; 75 lpc24xx_dma_channel_occupation [channel] = true; 76 rtems_interrupt_enable(level); 77 78 return occupation ? RTEMS_RESOURCE_IN_USE : RTEMS_SUCCESSFUL; 79 } else { 80 return RTEMS_INVALID_ID; 74 81 } 75 76 rtems_interrupt_disable( level);77 occupation = lpc24xx_dma_channel_occupation [channel];78 lpc24xx_dma_channel_occupation [channel] = true;79 rtems_interrupt_enable( level);80 81 return !occupation;82 82 } 83 83 84 84 /** 85 * @brief Releases the channel @a channel. You must have obtained this channel 86 * with lpc24xx_dma_channel_obtain() previously. 85 * @brief Releases the channel @a channel. 87 86 * 88 * If the channel number @a channel is out of range the last valid channel will 89 * be used. 87 * You must have obtained this channel with lpc24xx_dma_channel_obtain() 88 * previously. 89 * 90 * If the channel number @a channel is out of range nothing will happen. 90 91 */ 91 void lpc24xx_dma_channel_release( 92 void lpc24xx_dma_channel_release(unsigned channel) 92 93 { 93 if (channel >GPDMA_CH_NUMBER) {94 channel = GPDMA_CH_NUMBER - 1;94 if (channel < GPDMA_CH_NUMBER) { 95 lpc24xx_dma_channel_occupation [channel] = false; 95 96 } 96 97 lpc24xx_dma_channel_occupation [channel] = false;98 97 } 99 98 … … 102 101 * 103 102 * If @a force is false the channel will be halted and disabled when the 104 * channel is inactive. If the channel number @a channel is out of range the 105 * last valid channel will be used. 103 * channel is inactive. 104 * 105 * If the channel number @a channel is out of range the behaviour is undefined. 106 106 */ 107 void lpc24xx_dma_channel_disable( 107 void lpc24xx_dma_channel_disable(unsigned channel, bool force) 108 108 { 109 volatile lpc24xx_dma_channel *ch = GPDMA_CH_BASE_ADDR( 109 volatile lpc24xx_dma_channel *ch = GPDMA_CH_BASE_ADDR(channel); 110 110 uint32_t cfg = ch->cfg; 111 111 112 112 if (!force) { 113 113 /* Halt */ 114 ch->cfg = SET_FLAG( 114 ch->cfg = SET_FLAG(cfg, GPDMA_CH_CFG_HALT); 115 115 116 116 /* Wait for inactive */ 117 117 do { 118 118 cfg = ch->cfg; 119 } while (IS_FLAG_SET( 119 } while (IS_FLAG_SET(cfg, GPDMA_CH_CFG_ACTIVE)); 120 120 } 121 121 122 122 /* Disable */ 123 ch->cfg = CLEAR_FLAG( 123 ch->cfg = CLEAR_FLAG(cfg, GPDMA_CH_CFG_EN); 124 124 } -
c/src/lib/libbsp/arm/lpc24xx/misc/system-clocks.c
r9832a22c r7ae2775 69 69 70 70 /** 71 * @brief Returns the CPUclock frequency in [Hz].71 * @brief Returns the PLL output clock frequency in [Hz]. 72 72 * 73 * Return zero in case of an unexpected PLL input frequency.73 * Returns zero in case of an unexpected PLL input frequency. 74 74 */ 75 unsigned lpc24xx_ cclk( void)75 unsigned lpc24xx_pllclk( void) 76 76 { 77 77 unsigned clksrc = GET_CLKSRCSEL_CLKSRC( CLKSRCSEL); 78 78 unsigned pllinclk = 0; 79 79 unsigned pllclk = 0; 80 unsigned cclk = 0;81 80 82 81 /* Get PLL input frequency */ … … 106 105 } 107 106 108 /* Get CPU clock frequency */ 109 cclk = pllclk / (GET_CCLKCFG_CCLKSEL( CCLKCFG) + 1); 107 return pllclk; 108 } 109 110 /** 111 * @brief Returns the CPU clock frequency in [Hz]. 112 * 113 * Returns zero in case of an unexpected PLL input frequency. 114 */ 115 unsigned lpc24xx_cclk( void) 116 { 117 /* Get PLL output frequency */ 118 unsigned pllclk = lpc24xx_pllclk(); 119 120 /* Get CPU frequency */ 121 unsigned cclk = pllclk / (GET_CCLKCFG_CCLKSEL( CCLKCFG) + 1); 110 122 111 123 return cclk; -
c/src/lib/libbsp/arm/lpc24xx/network/network.c
r9832a22c r7ae2775 44 44 #include <bsp/lpc24xx.h> 45 45 #include <bsp/irq.h> 46 #include <bsp/io.h> 46 47 #include <bsp/utility.h> 47 48 … … 142 143 + LPC24XX_ETH_TRANSMIT_UNIT_NUMBER * ETH_TRANSMIT_STATUS_SIZE) 143 144 144 #define LPC24XX_ETH_EVENT_TRANSMIT RTEMS_EVENT_1 145 146 #define LPC24XX_ETH_EVENT_TRANSMIT_START RTEMS_EVENT_2 147 148 #define LPC24XX_ETH_EVENT_TRANSMIT_ERROR RTEMS_EVENT_3 149 150 #define LPC24XX_ETH_EVENT_RECEIVE RTEMS_EVENT_4 151 152 #define LPC24XX_ETH_EVENT_RECEIVE_ERROR RTEMS_EVENT_5 153 154 #define LPC24XX_ETH_TIMEOUT 10 145 #define LPC24XX_ETH_EVENT_INITIALIZE RTEMS_EVENT_1 146 147 #define LPC24XX_ETH_EVENT_START RTEMS_EVENT_2 148 149 #define LPC24XX_ETH_EVENT_INTERRUPT RTEMS_EVENT_3 155 150 156 151 #define LPC24XX_ETH_INTERRUPT_RECEIVE \ 157 152 (ETH_INT_RX_ERROR | ETH_INT_RX_FINISHED | ETH_INT_RX_DONE) 158 153 159 #define LPC24XX_ETH_INTERRUPT_TRANSMIT (ETH_INT_TX_DONE | ETH_INT_TX_FINISHED | ETH_INT_TX_ERROR) 154 #define LPC24XX_ETH_INTERRUPT_TRANSMIT \ 155 (ETH_INT_TX_DONE | ETH_INT_TX_FINISHED | ETH_INT_TX_ERROR) 160 156 161 157 #define LPC24XX_ETH_RX_STAT_ERRORS \ … … 273 269 /* Check receive interrupts */ 274 270 if (IS_FLAG_SET( is, ETH_INT_RX_OVERRUN)) { 275 re = LPC24XX_ETH_EVENT_ RECEIVE_ERROR;271 re = LPC24XX_ETH_EVENT_INITIALIZE; 276 272 ++e->receive_fatal_errors; 277 /* FIXME */278 printk( "%s: fatal receive error\n", __func__);279 while (1);280 273 } else if (IS_ANY_FLAG_SET( is, LPC24XX_ETH_INTERRUPT_RECEIVE)) { 281 re = LPC24XX_ETH_EVENT_ RECEIVE;274 re = LPC24XX_ETH_EVENT_INTERRUPT; 282 275 ie = SET_FLAGS( ie, LPC24XX_ETH_INTERRUPT_RECEIVE); 283 276 } … … 291 284 /* Check transmit interrupts */ 292 285 if (IS_FLAG_SET( is, ETH_INT_TX_UNDERRUN)) { 293 te = LPC24XX_ETH_EVENT_ TRANSMIT_ERROR;286 te = LPC24XX_ETH_EVENT_INITIALIZE; 294 287 ++e->transmit_fatal_errors; 295 /* FIXME */296 printk( "%s: fatal transmit error\n", __func__);297 while (1);298 288 } else if (IS_ANY_FLAG_SET( is, LPC24XX_ETH_INTERRUPT_TRANSMIT)) { 299 te = LPC24XX_ETH_EVENT_ TRANSMIT;289 te = LPC24XX_ETH_EVENT_INTERRUPT; 300 290 ie = SET_FLAGS( ie, LPC24XX_ETH_INTERRUPT_TRANSMIT); 301 291 } … … 380 370 volatile lpc24xx_eth_transfer_descriptor *desc, 381 371 struct mbuf **mbuf_table, 382 u nsignedi,372 uint32_t i, 383 373 bool wait 384 374 ) … … 417 407 struct mbuf **const mbuf_table = 418 408 (struct mbuf **) LPC24XX_ETH_RECEIVE_MBUF_START; 419 uint32_t index_max = e->receive_unit_number - 1;409 uint32_t index_max = 0; 420 410 uint32_t produce_index = 0; 421 411 uint32_t consume_index = 0; … … 424 414 LPC24XX_ETH_PRINTF( "%s\n", __func__); 425 415 426 /* Disable receive interrupts */427 lpc24xx_eth_disable_receive_interrupts();428 429 /* Disable receiver */430 MAC_COMMAND = CLEAR_FLAG( MAC_COMMAND, ETH_CMD_RX_ENABLE);431 432 /* Clear receive interrupts */433 MAC_INTCLEAR = LPC24XX_ETH_INTERRUPT_RECEIVE;434 435 /* Fill receive queue */436 for (produce_index = 0; produce_index <= index_max; ++produce_index) {437 if (438 !lpc24xx_eth_add_new_mbuf( ifp, desc, mbuf_table, produce_index, false)439 ) {440 break;441 }442 }443 444 /* Check if the queue is full */445 if (produce_index == 0) {446 RTEMS_DO_CLEANUP(447 cleanup,448 "no buffers to fill receive queue: terminate receive task\n"449 );450 } else if (produce_index <= index_max) {451 /* Reduce the queue size */452 index_max = produce_index - 1;453 454 RTEMS_SYSLOG_ERROR( "not enough buffers to fill receive queue");455 }456 457 /* Receive descriptor table */458 MAC_RXDESCRIPTORNUM = index_max;459 MAC_RXDESCRIPTOR = (uint32_t) desc;460 MAC_RXSTATUS = (uint32_t) info;461 462 /* Initialize indices */463 produce_index = MAC_RXPRODUCEINDEX;464 consume_index = MAC_RXCONSUMEINDEX;465 receive_index = consume_index;466 467 /* Enable receiver */468 MAC_COMMAND = SET_FLAG( MAC_COMMAND, ETH_CMD_RX_ENABLE);469 470 /* Enable receive interrupts */471 lpc24xx_eth_enable_receive_interrupts();472 473 416 /* Main event loop */ 474 417 while (true) { … … 477 420 /* Wait for events */ 478 421 sc = rtems_bsdnet_event_receive( 479 LPC24XX_ETH_EVENT_ RECEIVE,422 LPC24XX_ETH_EVENT_INITIALIZE | LPC24XX_ETH_EVENT_INTERRUPT, 480 423 RTEMS_EVENT_ANY | RTEMS_WAIT, 481 424 RTEMS_NO_TIMEOUT, … … 486 429 LPC24XX_ETH_PRINTF( "rx: wake up: 0x%08" PRIx32 "\n", events); 487 430 431 /* Initialize receiver? */ 432 if (IS_FLAG_SET( events, LPC24XX_ETH_EVENT_INITIALIZE)) { 433 /* Disable receive interrupts */ 434 lpc24xx_eth_disable_receive_interrupts(); 435 436 /* Disable receiver */ 437 MAC_COMMAND = CLEAR_FLAG( MAC_COMMAND, ETH_CMD_RX_ENABLE); 438 439 /* Wait for inactive status */ 440 while (IS_FLAG_SET( MAC_STATUS, ETH_STAT_RX_ACTIVE)) { 441 /* Wait */ 442 } 443 444 /* Reset */ 445 MAC_COMMAND = SET_FLAG( MAC_COMMAND, ETH_CMD_RX_RESET); 446 447 /* Clear receive interrupts */ 448 MAC_INTCLEAR = LPC24XX_ETH_INTERRUPT_RECEIVE; 449 450 /* Index maximum (determines queue size) */ 451 index_max = e->receive_unit_number - 1; 452 453 /* Move existing mbufs to the front */ 454 consume_index = 0; 455 for (produce_index = 0; produce_index <= index_max; ++produce_index) { 456 if (mbuf_table [produce_index] != NULL) { 457 mbuf_table [consume_index] = mbuf_table [produce_index]; 458 ++consume_index; 459 } 460 } 461 462 /* Fill receive queue */ 463 for (produce_index = consume_index; produce_index <= index_max; ++produce_index) { 464 if ( 465 !lpc24xx_eth_add_new_mbuf( ifp, desc, mbuf_table, produce_index, false) 466 ) { 467 break; 468 } 469 } 470 471 /* Check if the queue is full */ 472 if (produce_index == 0) { 473 RTEMS_DO_CLEANUP( 474 cleanup, 475 "no mbufs to fill receive queue: terminate receive task\n" 476 ); 477 } else if (produce_index <= index_max) { 478 /* Reduce the queue size */ 479 index_max = produce_index - 1; 480 481 RTEMS_SYSLOG_ERROR( "not enough mbufs to fill receive queue"); 482 } 483 484 /* Receive descriptor table */ 485 MAC_RXDESCRIPTORNUM = index_max; 486 MAC_RXDESCRIPTOR = (uint32_t) desc; 487 MAC_RXSTATUS = (uint32_t) info; 488 489 /* Initialize indices */ 490 produce_index = MAC_RXPRODUCEINDEX; 491 consume_index = MAC_RXCONSUMEINDEX; 492 receive_index = consume_index; 493 494 /* Enable receiver */ 495 MAC_COMMAND = SET_FLAG( MAC_COMMAND, ETH_CMD_RX_ENABLE); 496 497 /* Enable receive interrupts */ 498 lpc24xx_eth_enable_receive_interrupts(); 499 500 /* Wait for events */ 501 continue; 502 } 503 488 504 while (true) { 489 505 /* Clear receive interrupt status */ … … 497 513 struct mbuf *m = mbuf_table [receive_index]; 498 514 uint32_t stat = info [receive_index].status; 515 516 /* Remove mbuf from table */ 517 mbuf_table [receive_index] = NULL; 499 518 500 519 if ( … … 586 605 cleanup: 587 606 607 /* Clear task ID */ 608 e->receive_task = RTEMS_ID_NONE; 609 588 610 /* Release network semaphore */ 589 611 rtems_bsdnet_semaphore_release(); … … 666 688 LPC24XX_ETH_PRINTF( "%s\n", __func__); 667 689 668 /* Disable transmit interrupts */669 lpc24xx_eth_disable_transmit_interrupts();670 671 /* Disable transmitter */672 MAC_COMMAND = CLEAR_FLAG( MAC_COMMAND, ETH_CMD_TX_ENABLE);673 674 /* Clear transmit interrupts */675 MAC_INTCLEAR = LPC24XX_ETH_INTERRUPT_TRANSMIT;676 677 690 /* Initialize descriptor table */ 678 691 for (produce_index = 0; produce_index <= index_max; ++produce_index) { 679 692 desc [produce_index].start = 680 693 (uint32_t) (buf + produce_index * LPC24XX_ETH_TRANSMIT_BUFFER_SIZE); 681 desc [produce_index].control = 0; 682 } 683 684 /* Transmit descriptors */ 685 MAC_TXDESCRIPTORNUM = index_max; 686 MAC_TXDESCRIPTOR = (uint32_t) desc; 687 MAC_TXSTATUS = (uint32_t) status; 688 689 /* Initialize indices */ 690 produce_index = MAC_TXPRODUCEINDEX; 691 consume_index = MAC_TXCONSUMEINDEX; 692 693 /* Frame buffer start */ 694 frame_buffer = (char *) desc [produce_index].start; 695 696 /* Enable transmitter */ 697 MAC_COMMAND = SET_FLAG( MAC_COMMAND, ETH_CMD_TX_ENABLE); 694 } 698 695 699 696 /* Main event loop */ … … 701 698 /* Wait for events */ 702 699 sc = rtems_bsdnet_event_receive( 703 LPC24XX_ETH_EVENT_TRANSMIT | LPC24XX_ETH_EVENT_TRANSMIT_START, 700 LPC24XX_ETH_EVENT_INITIALIZE 701 | LPC24XX_ETH_EVENT_START 702 | LPC24XX_ETH_EVENT_INTERRUPT, 704 703 RTEMS_EVENT_ANY | RTEMS_WAIT, 705 704 RTEMS_NO_TIMEOUT, … … 709 708 710 709 LPC24XX_ETH_PRINTF( "tx: wake up: 0x%08" PRIx32 "\n", events); 710 711 /* Initialize transmitter? */ 712 if (IS_FLAG_SET( events, LPC24XX_ETH_EVENT_INITIALIZE)) { 713 /* Disable transmit interrupts */ 714 lpc24xx_eth_disable_transmit_interrupts(); 715 716 /* Disable transmitter */ 717 MAC_COMMAND = CLEAR_FLAG( MAC_COMMAND, ETH_CMD_TX_ENABLE); 718 719 /* Wait for inactive status */ 720 while (IS_FLAG_SET( MAC_STATUS, ETH_STAT_TX_ACTIVE)) { 721 /* Wait */ 722 } 723 724 /* Reset */ 725 MAC_COMMAND = SET_FLAG( MAC_COMMAND, ETH_CMD_TX_RESET); 726 727 /* Clear transmit interrupts */ 728 MAC_INTCLEAR = LPC24XX_ETH_INTERRUPT_TRANSMIT; 729 730 /* Transmit descriptors */ 731 MAC_TXDESCRIPTORNUM = index_max; 732 MAC_TXDESCRIPTOR = (uint32_t) desc; 733 MAC_TXSTATUS = (uint32_t) status; 734 735 /* Initialize indices */ 736 produce_index = MAC_TXPRODUCEINDEX; 737 consume_index = MAC_TXCONSUMEINDEX; 738 739 /* Frame buffer start */ 740 frame_buffer = (char *) desc [produce_index].start; 741 742 /* Enable transmitter */ 743 MAC_COMMAND = SET_FLAG( MAC_COMMAND, ETH_CMD_TX_ENABLE); 744 } 711 745 712 746 /* Free consumed fragments */ … … 750 784 } 751 785 752 /* Reinitialize control field */753 desc [c].control = 0;754 755 786 /* Next consume index */ 756 787 c = lpc24xx_eth_increment( c, index_max); … … 850 881 cleanup: 851 882 883 /* Clear task ID */ 884 e->transmit_task = RTEMS_ID_NONE; 885 852 886 /* Release network semaphore */ 853 887 rtems_bsdnet_semaphore_release(); … … 859 893 static void lpc24xx_eth_interface_init( void *arg) 860 894 { 895 rtems_status_code sc = RTEMS_SUCCESSFUL; 861 896 lpc24xx_eth_driver_entry *e = (lpc24xx_eth_driver_entry *) arg; 862 897 struct ifnet *ifp = &e->arpcom.ac_if; … … 866 901 if (e->state == LPC24XX_ETH_INITIALIZED) { 867 902 #ifndef LPC24XX_HAS_UBOOT 868 rtems_interrupt_level level;869 870 rtems_interrupt_disable( level);871 872 /* Enable power */873 PCONP = SET_FLAGS( PCONP, 0x40000000);874 875 /* Set PIN selects*/903 /* Enable module power */ 904 lpc24xx_module_enable( 905 LPC24XX_MODULE_ETHERNET, 906 0, 907 LPC24XX_MODULE_PCLK_DEFAULT 908 ); 909 910 /* Module IO configuration */ 876 911 #ifdef LPC24XX_ETHERNET_RMII 877 PINSEL2 = SET_FLAGS( PINSEL2, 0x55555555);912 lpc24xx_io_config( LPC24XX_MODULE_ETHERNET, 0, 0); 878 913 #else 879 PINSEL2 = SET_FLAGS( PINSEL2, 0x50150105);914 lpc24xx_io_config( LPC24XX_MODULE_ETHERNET, 0, 1); 880 915 #endif 881 PINSEL3 = SET_FLAGS( PINSEL3, 0x05);882 883 rtems_interrupt_enable( level);884 916 885 917 /* Soft reset */ 886 918 887 919 /* Do soft reset */ 920 MAC_COMMAND = 0x38; 888 921 MAC_MAC1 = 0xcf00; 889 MAC_COMMAND = 0x38;890 922 891 923 /* Initialize PHY */ … … 920 952 MAC_MAC1 = 0x03; 921 953 #else /* LPC24XX_HAS_UBOOT */ 922 uint32_t reg = 0; 923 924 /* TODO */ 954 /* Reset receiver and transmitter */ 955 MAC_COMMAND = SET_FLAGS( 956 MAC_COMMAND, 957 ETH_CMD_RX_RESET | ETH_CMD_TX_RESET | ETH_CMD_REG_RESET 958 ); 925 959 926 960 /* MAC configuration */ 927 961 MAC_MAC1 = 0x3; 928 929 /* Disable and reset receiver and transmitter */930 reg = MAC_COMMAND;931 reg = CLEAR_FLAGS( reg, ETH_CMD_RX_ENABLE | ETH_CMD_TX_ENABLE);932 reg = SET_FLAGS( reg, ETH_CMD_RX_RESET | ETH_CMD_TX_RESET);933 MAC_COMMAND = reg;934 962 #endif /* LPC24XX_HAS_UBOOT */ 935 963 … … 942 970 e 943 971 ); 972 sc = rtems_event_send( e->receive_task, LPC24XX_ETH_EVENT_INITIALIZE); 973 RTEMS_SYSLOG_ERROR_SC( sc, "send receive initialize event"); 944 974 } 945 975 … … 952 982 e 953 983 ); 984 sc = rtems_event_send( e->transmit_task, LPC24XX_ETH_EVENT_INITIALIZE); 985 RTEMS_SYSLOG_ERROR_SC( sc, "send transmit initialize event"); 954 986 } 955 987 … … 984 1016 static void lpc24xx_eth_interface_stats( const lpc24xx_eth_driver_entry *e) 985 1017 { 1018 rtems_bsdnet_semaphore_release(); 1019 986 1020 printf( "received frames: %u\n", e->received_frames); 987 1021 printf( "receive interrupts: %u\n", e->receive_interrupts); … … 1003 1037 printf( "transmit overflow errors: %u\n", e->transmit_overflow_errors); 1004 1038 printf( "transmit fatal errors: %u\n", e->transmit_fatal_errors); 1039 1040 rtems_bsdnet_semaphore_obtain(); 1005 1041 } 1006 1042 … … 1052 1088 ifp->if_flags = SET_FLAG( ifp->if_flags, IFF_OACTIVE); 1053 1089 1054 sc = rtems_event_send( e->transmit_task, LPC24XX_ETH_EVENT_ TRANSMIT_START);1090 sc = rtems_event_send( e->transmit_task, LPC24XX_ETH_EVENT_START); 1055 1091 RTEMS_SYSLOG_ERROR_SC( sc, "send transmit start event"); 1056 1092 } -
c/src/lib/libbsp/arm/lpc24xx/preinstall.am
r9832a22c r7ae2775 66 66 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-info.h 67 67 68 $(PROJECT_INCLUDE)/bsp/stackalloc.h: ../../shared/include/stackalloc.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) 69 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/stackalloc.h 70 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/stackalloc.h 71 68 72 $(PROJECT_INCLUDE)/bsp/tod.h: ../../shared/tod.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) 69 73 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/tod.h … … 102 106 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/dma.h 103 107 108 $(PROJECT_INCLUDE)/bsp/idle.h: include/idle.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) 109 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/idle.h 110 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/idle.h 111 112 $(PROJECT_INCLUDE)/bsp/i2c.h: include/i2c.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) 113 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/i2c.h 114 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/i2c.h 115 116 $(PROJECT_INCLUDE)/bsp/io.h: include/io.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) 117 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/io.h 118 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/io.h 119 104 120 $(PROJECT_INCLUDE)/tm27.h: ../../shared/include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp) 105 121 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h … … 113 129 $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.base 114 130 PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.base 115 116 $(PROJECT_LIB)/linkcmds.rom: ../shared/startup/linkcmds.rom $(PROJECT_LIB)/$(dirstamp)117 $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds.rom118 PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds.rom119 131 120 132 $(PROJECT_LIB)/linkcmds.lpc2478: startup/linkcmds.lpc2478 $(PROJECT_LIB)/$(dirstamp) -
c/src/lib/libbsp/arm/lpc24xx/rtc/rtc-config.c
r9832a22c r7ae2775 22 22 23 23 #include <bsp/lpc24xx.h> 24 #include <bsp/io.h> 24 25 25 26 #define LPC24XX_RTC_NUMBER 1 … … 27 28 static void lpc24xx_rtc_initialize( int minor) 28 29 { 30 rtems_interrupt_level level; 31 32 /* Enable module power */ 33 lpc24xx_module_enable( LPC24XX_MODULE_RTC, 0, LPC24XX_MODULE_PCLK_DEFAULT); 34 29 35 /* Enable the RTC and use external clock */ 30 36 RTC_CCR = RTC_CCR_CLKEN | RTC_CCR_CLKSRC; -
c/src/lib/libbsp/arm/lpc24xx/startup/bspreset.c
r9832a22c r7ae2775 19 19 */ 20 20 21 #include <rtems.h> 22 21 23 #include <bsp/bootcard.h> 22 #include <bsp/ start.h>24 #include <bsp/lpc24xx.h> 23 25 24 26 void bsp_reset( void) 25 27 { 26 start(); 28 rtems_interrupt_level level; 29 30 rtems_interrupt_disable( level); 31 32 /* Trigger watchdog reset */ 33 WDCLKSEL = 0; 34 WDTC = 0xff; 35 WDMOD = 0x3; 36 WDFEED = 0xaa; 37 WDFEED = 0x55; 38 39 while (true) { 40 /* Do nothing */ 41 } 27 42 } -
c/src/lib/libbsp/arm/lpc24xx/startup/bspstart.c
r9832a22c r7ae2775 24 24 #include <bsp/bootcard.h> 25 25 #include <bsp/dma.h> 26 #include <bsp/io.h> 27 #include <bsp/irq-generic.h> 26 28 #include <bsp/irq.h> 27 29 #include <bsp/linker-symbols.h> 28 30 #include <bsp/lpc24xx.h> 31 #include <bsp/stackalloc.h> 29 32 #include <bsp/start.h> 30 33 #include <bsp/system-clocks.h> … … 39 42 static void lpc24xx_ram_test_32( void) 40 43 { 41 volatile unsigned *out = (volatile unsigned *) bsp_ram_ext_start; 42 43 while (out < (volatile unsigned *) bsp_ram_ext_end) { 44 const unsigned *end = (const unsigned *) bsp_region_data_end; 45 unsigned *begin = (unsigned *) bsp_region_data_begin; 46 unsigned *out = begin; 47 48 while (out != end) { 44 49 *out = (unsigned) out; 45 50 ++out; 46 51 } 47 52 48 out = (volatile unsigned *) bsp_ram_ext_start;49 while (out < (volatile unsigned *) bsp_ram_ext_end) {53 out = begin; 54 while (out != end) { 50 55 if (*out != (unsigned) out) { 51 56 lpc24xx_fatal_error(); … … 66 71 uint32_t mode = 0; 67 72 68 /* Enable power */ 69 PCONP = SET_FLAGS( PCONP, 0x0800); 70 71 /* Set PIN selects */ 72 PINSEL5 = SET_FLAGS( PINSEL5, 0x05050555); 73 PINSEL6 = SET_FLAGS( PINSEL6, 0x55555555); 74 PINSEL8 = SET_FLAGS( PINSEL8, 0x55555555); 75 PINSEL9 = SET_FLAGS( PINSEL9, 0x50555555); 73 /* Enable module power */ 74 lpc24xx_module_enable( LPC24XX_MODULE_EMC, 0, LPC24XX_MODULE_PCLK_DEFAULT); 75 76 /* IO configuration */ 77 lpc24xx_io_config( LPC24XX_MODULE_EMC, 0, 0); 76 78 77 79 /* Enable module, normal memory map and normal power mode */ … … 167 169 EMC_DYN_CFG0 |= 0x00080000; 168 170 169 /* Static Memory 0 settings */ 170 EMC_STA_WAITWEN0 = 0x02; 171 EMC_STA_WAITOEN0 = 0x02; 172 EMC_STA_WAITRD0 = 0x1f; 173 EMC_STA_WAITPAGE0 = 0x1f; 174 EMC_STA_WAITWR0 = 0x1f; 175 EMC_STA_WAITTURN0 = 0x0f; 176 EMC_STA_CFG0 = 0x81; 171 /* Extended wait register */ 172 EMC_STA_EXT_WAIT = 0; 177 173 178 174 /* Static Memory 1 settings */ … … 183 179 EMC_STA_WAITWR1 = 0x08; 184 180 EMC_STA_WAITTURN1 = 0x0f; 185 EMC_STA_CFG1 = 0x8 0;181 EMC_STA_CFG1 = 0x81; 186 182 187 183 /* RAM test */ 188 184 lpc24xx_ram_test_32(); 189 #endif /* LPC24XX_EMC_MICRON */185 #endif 190 186 } 191 187 … … 194 190 #ifndef LPC24XX_HAS_UBOOT 195 191 /* Enable main oscillator */ 196 SCS = SET_FLAG S( SCS, 0x20);192 SCS = SET_FLAG( SCS, 0x20); 197 193 while (IS_FLAG_CLEARED( SCS, 0x40)) { 198 194 /* Wait */ … … 201 197 /* Set PLL */ 202 198 lpc24xx_set_pll( 1, 0, 11, 3); 203 #endif /* LPC24XX_HAS_UBOOT */199 #endif 204 200 } 205 201 … … 222 218 PINSEL9 = 0; 223 219 PINSEL10 = 0; 220 PINSEL11 = 0; 221 222 /* Set pin modes */ 223 PINMODE0 = 0; 224 PINMODE1 = 0; 225 PINMODE2 = 0; 226 PINMODE3 = 0; 227 PINMODE4 = 0; 228 PINMODE5 = 0; 229 PINMODE6 = 0; 230 PINMODE7 = 0; 231 PINMODE8 = 0; 232 PINMODE9 = 0; 224 233 225 234 /* Set periperal clocks */ … … 234 243 MAMTIM = 4; 235 244 236 /* Set general purpose IO */ 237 IODIR0 = 0; 238 IODIR1 = 0; 239 IOSET0 = 0xffffffff; 240 IOSET1 = 0xffffffff; 245 /* Enable fast IO for ports 0 and 1 */ 246 SCS = SET_FLAG( SCS, 0x1); 241 247 242 248 /* Set fast IO */ … … 246 252 FIO3DIR = 0; 247 253 FIO4DIR = 0; 248 FIO0SET = 0xffffffff; 249 FIO1SET = 0xffffffff; 250 FIO2SET = 0xffffffff; 251 FIO3SET = 0xffffffff; 252 FIO4SET = 0xffffffff; 253 254 /* Initialize UART 0 */ 255 PCONP = SET_FLAGS( PCONP, 0x08); 256 PCLKSEL0 = SET_FLAGS( PCLKSEL0, 0x40); 257 PINSEL0 = SET_FLAGS( PINSEL0, 0x50); 258 U0LCR = 0; 259 U0IER = 0; 260 U0LCR = 0x80; 261 U0DLL = lpc24xx_cclk() / 16 / LPC24XX_UART_BAUD; 262 U0DLM = 0; 263 U0LCR = 0x03; 264 U0FCR = 0x07; 254 FIO0CLR = 0xffffffff; 255 FIO1CLR = 0xffffffff; 256 FIO2CLR = 0xffffffff; 257 FIO3CLR = 0xffffffff; 258 FIO4CLR = 0xffffffff; 259 260 /* Initialize console */ 261 #ifdef LPC24XX_CONFIG_CONSOLE 262 lpc24xx_module_enable( LPC24XX_MODULE_UART, 0, LPC24XX_MODULE_CCLK); 263 lpc24xx_io_config( LPC24XX_MODULE_UART, 0, LPC24XX_CONFIG_CONSOLE); 264 U0LCR = 0; 265 U0IER = 0; 266 U0LCR = 0x80; 267 U0DLL = lpc24xx_cclk() / 16 / LPC24XX_UART_BAUD; 268 U0DLM = 0; 269 U0LCR = 0x03; 270 U0FCR = 0x07; 271 #endif 265 272 266 273 /* Initialize Timer 1 */ 267 PCONP = SET_FLAGS( PCONP, 0x04); 268 PCLKSEL0 = SET_FLAGS( PCLKSEL0, 0x10); 269 #endif /* LPC24XX_HAS_UBOOT */ 274 lpc24xx_module_enable( LPC24XX_MODULE_TIMER, 1, LPC24XX_MODULE_CCLK); 275 #endif 270 276 } 271 277 … … 273 279 { 274 280 #ifndef LPC24XX_HAS_UBOOT 275 unsigned *in = bsp_section_text_end; 276 unsigned *out = bsp_section_data_start; 281 const unsigned *end = (const unsigned *) bsp_section_data_end; 282 unsigned *in = (unsigned *) bsp_section_data_load_begin; 283 unsigned *out = (unsigned *) bsp_section_data_begin; 277 284 278 285 /* Copy data */ 279 while (out < bsp_section_data_end) {286 while (out != end) { 280 287 *out = *in; 281 288 ++out; 282 289 ++in; 283 290 } 284 #endif /* LPC24XX_HAS_UBOOT */291 #endif 285 292 } 286 293 287 294 static void lpc24xx_clear_bss( void) 288 295 { 289 unsigned *out = bsp_section_bss_start; 296 const unsigned *end = (const unsigned *) bsp_section_bss_end; 297 unsigned *out = (unsigned *) bsp_section_bss_begin; 290 298 291 299 /* Clear BSS */ 292 while (out < bsp_section_bss_end) {300 while (out != end) { 293 301 *out = 0; 294 302 ++out; … … 316 324 317 325 /* Exceptions */ 326 /* FIXME 318 327 rtems_exception_init_mngt(); 328 */ 319 329 320 330 /* Interrupts */ … … 327 337 /* DMA */ 328 338 lpc24xx_dma_initialize(); 339 340 /* Task stacks */ 341 bsp_stack_initialize( 342 bsp_section_stack_begin, 343 (intptr_t) bsp_section_stack_size 344 ); 345 346 /* UART configurations */ 347 #ifdef LPC24XX_CONFIG_UART_1 348 lpc24xx_module_enable( LPC24XX_MODULE_UART, 1, LPC24XX_MODULE_CCLK); 349 lpc24xx_io_config( LPC24XX_MODULE_UART, 1, LPC24XX_CONFIG_UART_1); 350 #endif 351 #ifdef LPC24XX_CONFIG_UART_2 352 lpc24xx_module_enable( LPC24XX_MODULE_UART, 2, LPC24XX_MODULE_CCLK); 353 lpc24xx_io_config( LPC24XX_MODULE_UART, 2, LPC24XX_CONFIG_UART_2); 354 #endif 355 #ifdef LPC24XX_CONFIG_UART_3 356 lpc24xx_module_enable( LPC24XX_MODULE_UART, 3, LPC24XX_MODULE_CCLK); 357 lpc24xx_io_config( LPC24XX_MODULE_UART, 3, LPC24XX_CONFIG_UART_3); 358 #endif 329 359 } 330 360 -
c/src/lib/libbsp/arm/lpc24xx/startup/linkcmds
r9832a22c r7ae2775 11 11 } 12 12 13 REGION_ALIAS ("REGION_START", RAM_EXT); 14 REGION_ALIAS ("REGION_VECTOR", RAM_INT); 15 REGION_ALIAS ("REGION_TEXT", RAM_EXT); 16 REGION_ALIAS ("REGION_TEXT_LOAD", RAM_EXT); 17 REGION_ALIAS ("REGION_RODATA", RAM_EXT); 18 REGION_ALIAS ("REGION_RODATA_LOAD", RAM_EXT); 19 REGION_ALIAS ("REGION_DATA", RAM_EXT); 20 REGION_ALIAS ("REGION_DATA_LOAD", RAM_EXT); 21 REGION_ALIAS ("REGION_FAST", RAM_INT); 22 REGION_ALIAS ("REGION_FAST_LOAD", RAM_INT); 23 REGION_ALIAS ("REGION_BSS", RAM_EXT); 24 REGION_ALIAS ("REGION_WORK", RAM_EXT); 25 REGION_ALIAS ("REGION_STACK", RAM_INT); 26 13 27 INCLUDE linkcmds.base -
c/src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc2478
r9832a22c r7ae2775 12 12 } 13 13 14 REGION_ALIAS ("REGION_START", RAM_EXT); 15 REGION_ALIAS ("REGION_VECTOR", RAM_INT); 16 REGION_ALIAS ("REGION_TEXT", RAM_EXT); 17 REGION_ALIAS ("REGION_TEXT_LOAD", RAM_EXT); 18 REGION_ALIAS ("REGION_RODATA", RAM_EXT); 19 REGION_ALIAS ("REGION_RODATA_LOAD", RAM_EXT); 20 REGION_ALIAS ("REGION_DATA", RAM_EXT); 21 REGION_ALIAS ("REGION_DATA_LOAD", RAM_EXT); 22 REGION_ALIAS ("REGION_FAST", RAM_INT); 23 REGION_ALIAS ("REGION_FAST_LOAD", RAM_INT); 24 REGION_ALIAS ("REGION_BSS", RAM_EXT); 25 REGION_ALIAS ("REGION_WORK", RAM_EXT); 26 REGION_ALIAS ("REGION_STACK", RAM_INT); 27 14 28 INCLUDE linkcmds.base -
c/src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc2478_ncs
r9832a22c r7ae2775 2 2 * @file 3 3 * 4 * LPC2478 (NCS ).4 * LPC2478 (NCS, bootloader configuration). 5 5 */ 6 6 7 7 MEMORY { 8 RAM_INT (AIW) : ORIGIN = 0x40000000, LENGTH = 64k 9 RAM_EXT (AIW) : ORIGIN = 0xa0400000, LENGTH = 4M 8 RAM_VEC (AIW) : ORIGIN = 0x40000000, LENGTH = 32k 9 RAM_INT (AIW) : ORIGIN = 0x40008000, LENGTH = 32k 10 RAM_EXT (AIW) : ORIGIN = 0xa0c00000, LENGTH = 4M 10 11 ROM_INT (RX) : ORIGIN = 0x00000000, LENGTH = 512k - 8k 11 12 NIRVANA : ORIGIN = 0, LENGTH = 0 12 13 } 13 14 14 INCLUDE linkcmds.rom 15 REGION_ALIAS ("REGION_START", ROM_INT); 16 REGION_ALIAS ("REGION_VECTOR", RAM_VEC); 17 REGION_ALIAS ("REGION_TEXT", ROM_INT); 18 REGION_ALIAS ("REGION_TEXT_LOAD", ROM_INT); 19 REGION_ALIAS ("REGION_RODATA", ROM_INT); 20 REGION_ALIAS ("REGION_RODATA_LOAD", ROM_INT); 21 REGION_ALIAS ("REGION_DATA", RAM_EXT); 22 REGION_ALIAS ("REGION_DATA_LOAD", ROM_INT); 23 REGION_ALIAS ("REGION_FAST", RAM_INT); 24 REGION_ALIAS ("REGION_FAST_LOAD", RAM_INT); 25 REGION_ALIAS ("REGION_BSS", RAM_EXT); 26 REGION_ALIAS ("REGION_WORK", RAM_EXT); 27 REGION_ALIAS ("REGION_STACK", RAM_INT); 28 29 INCLUDE linkcmds.base -
c/src/lib/libbsp/arm/lpc24xx/startup/linkcmds.lpc2478_ncs_ram
r9832a22c r7ae2775 7 7 MEMORY { 8 8 RAM_INT (AIW) : ORIGIN = 0x40000000, LENGTH = 64k 9 RAM_EXT (AIW) : ORIGIN = 0xa0000000, LENGTH = 8M9 RAM_EXT (AIW) : ORIGIN = 0xa0000000, LENGTH = 16M 10 10 ROM_INT (RX) : ORIGIN = 0x00000000, LENGTH = 512k - 8k 11 11 NIRVANA : ORIGIN = 0, LENGTH = 0 12 12 } 13 13 14 REGION_ALIAS ("REGION_START", RAM_EXT); 15 REGION_ALIAS ("REGION_VECTOR", RAM_INT); 16 REGION_ALIAS ("REGION_TEXT", RAM_EXT); 17 REGION_ALIAS ("REGION_TEXT_LOAD", RAM_EXT); 18 REGION_ALIAS ("REGION_RODATA", RAM_EXT); 19 REGION_ALIAS ("REGION_RODATA_LOAD", RAM_EXT); 20 REGION_ALIAS ("REGION_DATA", RAM_EXT); 21 REGION_ALIAS ("REGION_DATA_LOAD", RAM_EXT); 22 REGION_ALIAS ("REGION_FAST", RAM_INT); 23 REGION_ALIAS ("REGION_FAST_LOAD", RAM_INT); 24 REGION_ALIAS ("REGION_BSS", RAM_EXT); 25 REGION_ALIAS ("REGION_WORK", RAM_EXT); 26 REGION_ALIAS ("REGION_STACK", RAM_INT); 27 14 28 INCLUDE linkcmds.base -
c/src/lib/libbsp/arm/nds/ChangeLog
r9832a22c r7ae2775 4 4 RTEMS_BSP_BOOTCARD_OPTIONS. Add RTEMS_BSP_CLEANUP_OPTIONS so all BSPs 5 5 have the same options. 6 7 2009-07-15 Sebastian Huber <sebastian.huber@embedded-brains.de> 8 9 * startup/bspstart.c: Removed variable declaration. 6 10 7 11 2009-05-08 Joel Sherrill <joel.sherrill@oarcorp.com> -
c/src/lib/libbsp/arm/nds/startup/bspstart.c
r9832a22c r7ae2775 15 15 #include <bsp/bootcard.h> 16 16 #include <nds.h> 17 18 /*19 * This definition comes from ARM cpu code.20 */21 extern unsigned int arm_cpu_mode;22 17 23 18 /* -
c/src/lib/libbsp/arm/shared/abort/simple_abort.c
r9832a22c r7ae2775 65 65 if(!mode) mode="unknown"; 66 66 67 #if defined(__thumb__) 68 asm volatile (" .code 16 \n" \ 69 "adr %[tmp], arm_code \n" \ 70 "bx %[tmp] \n" \ 71 "nop \n" \ 72 ".code 32 \n" \ 73 "arm_code: \n" \ 74 : [tmp]"=&r" (tmp) ); 75 #endif 76 asm volatile (" MRS %[cpsr], cpsr \n" 77 " ORR %[tmp], %[spsr], #0xc0 \n" 78 " MSR cpsr_c, %[tmp] \n" 79 " MOV %[prev_sp], sp \n" 80 " MOV %[prev_lr], lr \n" 81 " MSR cpsr_c, %[cpsr] \n" 82 : [prev_sp] "=&r" (prev_sp), [prev_lr] "=&r" (prev_lr), 83 [cpsr] "=&r" (cpsr), [tmp] "=&r" (tmp) 84 : [spsr] "r" (spsr) 85 : "cc"); 67 asm volatile ( 68 THUMB_TO_ARM 69 "mrs %[cpsr], cpsr\n" 70 "orr %[tmp], %[spsr], #0xc0\n" 71 "msr cpsr_c, %[tmp]\n" 72 "mov %[prev_sp], sp\n" 73 "mov %[prev_lr], lr\n" 74 "msr cpsr_c, %[cpsr]\n" 75 ARM_TO_THUMB 76 : [prev_sp] "=&r" (prev_sp), [prev_lr] "=&r" (prev_lr), 77 [cpsr] "=&r" (cpsr), [tmp] "=&r" (tmp) 78 : [spsr] "r" (spsr) 79 : "cc" 80 ); 86 81 87 82 printk( -
c/src/lib/libbsp/arm/shared/include/linker-symbols.h
r9832a22c r7ae2775 6 6 7 7 /* 8 * Copyright (c) 2008 9 * Embedded Brains GmbH8 * Copyright (c) 2008, 2009 9 * embedded brains GmbH 10 10 * Obere Lagerstr. 30 11 11 * D-82178 Puchheim 12 12 * Germany 13 * rtems@embedded-brains.de13 * <rtems@embedded-brains.de> 14 14 * 15 * The license and distribution terms for this file may be found in the file 16 * LICENSE in this distribution or at http://www.rtems.com/license/LICENSE. 15 * The license and distribution terms for this file may be 16 * found in the file LICENSE in this distribution or at 17 * http://www.rtems.com/license/LICENSE. 17 18 */ 18 19 … … 21 22 22 23 #ifndef ASM 23 #define LINKER_SYMBOL( 24 #define LINKER_SYMBOL(sym) extern char sym []; 24 25 #else 25 #define LINKER_SYMBOL( 26 #define LINKER_SYMBOL(sym) .extern sym 26 27 #endif 27 28 28 LINKER_SYMBOL( bsp_stack_irq_size) 29 LINKER_SYMBOL( bsp_stack_irq_start) 29 LINKER_SYMBOL(bsp_region_text_begin) 30 LINKER_SYMBOL(bsp_region_text_end) 31 LINKER_SYMBOL(bsp_region_text_size) 30 32 31 LINKER_SYMBOL( bsp_stack_irq_size) 32 LINKER_SYMBOL( bsp_stack_fiq_start) 33 LINKER_SYMBOL(bsp_region_data_begin) 34 LINKER_SYMBOL(bsp_region_data_end) 35 LINKER_SYMBOL(bsp_region_data_size) 33 36 34 LINKER_SYMBOL( bsp_stack_abt_size) 35 LINKER_SYMBOL( bsp_stack_abt_start) 37 LINKER_SYMBOL(bsp_stack_irq_begin) 38 LINKER_SYMBOL(bsp_stack_irq_end) 39 LINKER_SYMBOL(bsp_stack_irq_size) 36 40 37 LINKER_SYMBOL( bsp_stack_undef_size) 38 LINKER_SYMBOL( bsp_stack_undef_start) 41 LINKER_SYMBOL(bsp_stack_fiq_begin) 42 LINKER_SYMBOL(bsp_stack_fiq_end) 43 LINKER_SYMBOL(bsp_stack_irq_size) 39 44 40 LINKER_SYMBOL( bsp_stack_svc_size) 41 LINKER_SYMBOL( bsp_stack_svc_start) 45 LINKER_SYMBOL(bsp_stack_abt_begin) 46 LINKER_SYMBOL(bsp_stack_abt_end) 47 LINKER_SYMBOL(bsp_stack_abt_size) 42 48 43 LINKER_SYMBOL( bsp_ram_int_start)44 LINKER_SYMBOL( bsp_ram_int_end)45 LINKER_SYMBOL( bsp_ram_int_size)49 LINKER_SYMBOL(bsp_stack_undef_begin) 50 LINKER_SYMBOL(bsp_stack_undef_end) 51 LINKER_SYMBOL(bsp_stack_undef_size) 46 52 47 LINKER_SYMBOL( bsp_ram_ext_start) 48 LINKER_SYMBOL( bsp_ram_ext_load_start) 49 LINKER_SYMBOL( bsp_ram_ext_end) 50 LINKER_SYMBOL( bsp_ram_ext_size) 53 LINKER_SYMBOL(bsp_stack_svc_begin) 54 LINKER_SYMBOL(bsp_stack_svc_end) 55 LINKER_SYMBOL(bsp_stack_svc_size) 51 56 52 LINKER_SYMBOL( bsp_rom_start)53 LINKER_SYMBOL( bsp_rom_end)54 LINKER_SYMBOL( bsp_rom_size)57 LINKER_SYMBOL(bsp_section_start_begin) 58 LINKER_SYMBOL(bsp_section_start_end) 59 LINKER_SYMBOL(bsp_section_start_size) 55 60 56 LINKER_SYMBOL( bsp_section_vector_start)57 LINKER_SYMBOL( 58 LINKER_SYMBOL( 61 LINKER_SYMBOL(bsp_section_vector_begin) 62 LINKER_SYMBOL(bsp_section_vector_end) 63 LINKER_SYMBOL(bsp_section_vector_size) 59 64 60 LINKER_SYMBOL( bsp_section_text_start) 61 LINKER_SYMBOL( bsp_section_text_end) 62 LINKER_SYMBOL( bsp_section_text_size) 65 LINKER_SYMBOL(bsp_section_text_begin) 66 LINKER_SYMBOL(bsp_section_text_end) 67 LINKER_SYMBOL(bsp_section_text_size) 68 LINKER_SYMBOL(bsp_section_text_load_begin) 63 69 64 LINKER_SYMBOL( bsp_section_data_start) 65 LINKER_SYMBOL( bsp_section_data_end) 66 LINKER_SYMBOL( bsp_section_data_size) 70 LINKER_SYMBOL(bsp_section_rodata_begin) 71 LINKER_SYMBOL(bsp_section_rodata_end) 72 LINKER_SYMBOL(bsp_section_rodata_size) 73 LINKER_SYMBOL(bsp_section_rodata_load_begin) 67 74 68 LINKER_SYMBOL( bsp_section_bss_start) 69 LINKER_SYMBOL( bsp_section_bss_end) 70 LINKER_SYMBOL( bsp_section_bss_size) 75 LINKER_SYMBOL(bsp_section_data_begin) 76 LINKER_SYMBOL(bsp_section_data_end) 77 LINKER_SYMBOL(bsp_section_data_size) 78 LINKER_SYMBOL(bsp_section_data_load_begin) 71 79 72 LINKER_SYMBOL( bsp_section_stack_start) 73 LINKER_SYMBOL( bsp_section_stack_end) 74 LINKER_SYMBOL( bsp_section_stack_size) 80 LINKER_SYMBOL(bsp_section_fast_begin) 81 LINKER_SYMBOL(bsp_section_fast_end) 82 LINKER_SYMBOL(bsp_section_fast_size) 83 LINKER_SYMBOL(bsp_section_fast_load_begin) 75 84 76 LINKER_SYMBOL( bsp_section_work_area_start) 77 LINKER_SYMBOL( bsp_section_work_area_end) 78 LINKER_SYMBOL( bsp_section_work_area_size) 85 LINKER_SYMBOL(bsp_section_bss_begin) 86 LINKER_SYMBOL(bsp_section_bss_end) 87 LINKER_SYMBOL(bsp_section_bss_size) 88 89 LINKER_SYMBOL(bsp_section_work_begin) 90 LINKER_SYMBOL(bsp_section_work_end) 91 LINKER_SYMBOL(bsp_section_work_size) 92 93 LINKER_SYMBOL(bsp_section_stack_begin) 94 LINKER_SYMBOL(bsp_section_stack_end) 95 LINKER_SYMBOL(bsp_section_stack_size) 79 96 80 97 #endif /* LIBBSP_ARM_SHARED_LINKER_SYMBOLS_H */ -
c/src/lib/libbsp/arm/shared/irq/irq_init.c
r9832a22c r7ae2775 18 18 #include <rtems/bspIo.h> 19 19 20 /*21 * default int vector22 */23 extern void _ISR_Handler(void);24 25 20 void default_int_handler(void) 26 21 { … … 34 29 rtems_interrupt_disable(level); 35 30 36 /* First, connect the ISR_Handler for IRQ and FIQ interrupts */ 37 _CPU_ISR_install_vector(ARM_EXCEPTION_IRQ, _ISR_Handler, NULL); 38 _CPU_ISR_install_vector(ARM_EXCEPTION_FIQ, _ISR_Handler, NULL); 31 /* First, connect the ISR_Handler for IRQ interrupts */ 32 _CPU_ISR_install_vector(ARM_EXCEPTION_IRQ, arm_exc_interrupt, NULL); 39 33 40 34 /* Initialize the INT at the BSP level */ -
c/src/lib/libbsp/arm/shared/start/start.S
r9832a22c r7ae2775 16 16 * LICENSE in this distribution or at http://www.rtems.com/license/LICENSE. 17 17 */ 18 19 #warning Call to boot_card has changed and needs checking.20 #warning The call is "void boot_card(const char* cmdline);"21 #warning You need to pass a NULL.22 #warning Please check and remove these warnings.23 18 24 19 #include <bsp/linker-symbols.h> … … 48 43 .equ PSR_T, 0x20 49 44 50 .section ".entry" 45 .arm 46 .section ".bsp_start", "x" 51 47 52 48 /* … … 121 117 mov r0, #(PSR_MODE_IRQ | PSR_I | PSR_F) 122 118 msr cpsr, r0 123 ldr r1, =bsp_stack_irq_size 124 ldr sp, =bsp_stack_irq_start 125 add sp, sp, r1 119 ldr sp, =bsp_stack_irq_end 126 120 127 121 /* Enter FIQ mode and set up the FIQ stack pointer */ 128 122 mov r0, #(PSR_MODE_FIQ | PSR_I | PSR_F) 129 123 msr cpsr, r0 130 ldr r1, =bsp_stack_fiq_size 131 ldr sp, =bsp_stack_fiq_start 132 add sp, sp, r1 124 ldr sp, =bsp_stack_fiq_end 133 125 134 126 /* Enter ABT mode and set up the ABT stack pointer */ 135 127 mov r0, #(PSR_MODE_ABT | PSR_I | PSR_F) 136 128 msr cpsr, r0 137 ldr r1, =bsp_stack_abt_size 138 ldr sp, =bsp_stack_abt_start 139 add sp, sp, r1 129 ldr sp, =bsp_stack_abt_end 140 130 141 131 /* Enter UNDEF mode and set up the UNDEF stack pointer */ 142 132 mov r0, #(PSR_MODE_UNDEF | PSR_I | PSR_F) 143 133 msr cpsr, r0 144 ldr r1, =bsp_stack_undef_size 145 ldr sp, =bsp_stack_undef_start 146 add sp, sp, r1 134 ldr sp, =bsp_stack_undef_end 147 135 148 136 /* Enter SVC mode and set up the SVC stack pointer */ 149 137 mov r0, #(PSR_MODE_SVC | PSR_I | PSR_F) 150 138 msr cpsr, r0 151 ldr r1, =bsp_stack_svc_size 152 ldr sp, =bsp_stack_svc_start 153 add sp, sp, r1 139 ldr sp, =bsp_stack_svc_end 154 140 155 141 /* Stay in SVC mode */ 156 142 157 143 /* Brach to start hook 0 */ 144 #ifdef __thumb__ 145 ldr r3, =bsp_start_hook_0 146 mov lr, pc 147 bx r3 148 .thumb 149 bx pc 150 nop 151 .arm 152 #else 158 153 bl bsp_start_hook_0 154 #endif 159 155 160 156 /* … … 163 159 */ 164 160 165 ldr r0, =bsp_section_vector_ start161 ldr r0, =bsp_section_vector_begin 166 162 adr r1, vector_block 167 163 ldmia r1!, {r2-r9} … … 171 167 172 168 /* Brach to start hook 1 */ 169 #ifdef __thumb__ 170 ldr r3, =bsp_start_hook_1 171 mov lr, pc 172 bx r3 173 .thumb 174 bx pc 175 nop 176 .arm 177 #else 173 178 bl bsp_start_hook_1 179 #endif 174 180 175 181 176 182 /* Brach to boot card */ 183 mov r0, #0 184 #ifdef __thumb__ 185 ldr r3, =boot_card 186 mov lr, pc 187 bx r3 188 .thumb 189 bx pc 190 nop 191 .arm 192 #else 177 193 bl boot_card 194 #endif 178 195 179 196 /* Branch to reset function */ 197 #ifdef __thumb__ 198 ldr r3, =bsp_reset 199 mov lr, pc 200 bx r3 201 .thumb 202 bx pc 203 nop 204 .arm 205 #else 180 206 bl bsp_reset 207 #endif 181 208 182 209 /* Spin forever */ -
c/src/lib/libbsp/arm/shared/startup/linkcmds.base
r9832a22c r7ae2775 2 2 * @file 3 3 * 4 * @brief Linker command base file for configuration with internal and external 5 * RAM and optional ROM load. 6 * 7 * You need to add a linker command file to your board support package that 8 * includes this file at the end and provides the following definitions. 9 * 10 * Compulsory are the memory regions RAM_INT, RAM_EXT and NIRVANA. 11 * <pre> 12 * MEMORY { 13 * RAM_INT (AIW) : ORIGIN = 0x40000000, LENGTH = 64k 14 * RAM_EXT (AIW) : ORIGIN = 0xa0000000, LENGTH = 32M 15 * NIRVANA : ORIGIN = 0, LENGTH = 0 16 * } 17 * </pre> 18 * 19 * You may optionally provide ROM start and size values. 20 * <pre> 21 * bsp_rom_start = 0x80000000; 22 * bsp_rom_size = 0x01000000; 23 * </pre> 24 * 25 * Optionally you can enable the load to ROM. It is enabled then 26 * bsp_enable_rom_load is defined. The value is arbitrary. 27 * <pre> 28 * bsp_enable_rom_load = 1; 29 * </pre> 30 * 31 * Include the linker command base file. This file has to be installed in the 32 * same directory than your linker command file. 33 * <pre> 34 * INCLUDE linkcmds.base 35 * </pre> 36 * 37 * You may define optionally values for the following sizes: 38 * - bsp_ram_int_size 39 * - bsp_ram_ext_size 40 * - bsp_stack_abt_size 41 * - bsp_stack_fiq_size 42 * - bsp_stack_irq_size 43 * - bsp_stack_svc_size 44 * - bsp_stack_undef_size 4 * @brief Linker command base file. 45 5 */ 46 6 … … 64 24 65 25 /* 66 * BSP: Symbols that may be defined externally. The minimum alignment67 * requirement for regions is bsp_section_align.68 */69 bsp_ram_int_size = DEFINED (bsp_ram_int_size) ? bsp_ram_int_size : LENGTH (RAM_INT);70 71 bsp_ram_ext_size = DEFINED (bsp_ram_ext_size) ? bsp_ram_ext_size : LENGTH (RAM_EXT);72 73 bsp_rom_start = DEFINED (bsp_rom_start) ? bsp_rom_start : 0;74 75 bsp_rom_size = DEFINED (bsp_rom_size) ? bsp_rom_size : 0;76 77 bsp_ram_ext_load_start = DEFINED (bsp_enable_rom_load) ? bsp_rom_start : bsp_ram_ext_start;78 79 bsp_stack_abt_size = DEFINED (bsp_stack_abt_size) ? bsp_stack_abt_size : 128;80 81 bsp_stack_fiq_size = DEFINED (bsp_stack_fiq_size) ? bsp_stack_fiq_size : 128;82 83 bsp_stack_irq_size = DEFINED (bsp_stack_irq_size) ? bsp_stack_irq_size : 256;84 85 bsp_stack_svc_size = DEFINED (bsp_stack_svc_size) ? bsp_stack_svc_size : 256;86 87 bsp_stack_undef_size = DEFINED (bsp_stack_undef_size) ? bsp_stack_undef_size : 128;88 89 /*90 26 * BSP: Global symbols 91 27 */ 92 bsp_ram_int_start = ORIGIN (RAM_INT); 93 bsp_ram_int_end = bsp_ram_int_start + bsp_ram_int_size; 94 95 bsp_ram_ext_start = ORIGIN (RAM_EXT); 96 bsp_ram_ext_end = bsp_ram_ext_start + bsp_ram_ext_size; 97 98 bsp_rom_end = bsp_rom_start + bsp_rom_size; 99 100 bsp_section_align = 16; 101 102 bsp_stack_align = 16; 28 29 bsp_section_align = 32; 30 31 bsp_stack_align = 4; 32 33 bsp_region_text_begin = ORIGIN (REGION_TEXT); 34 bsp_region_text_size = LENGTH (REGION_TEXT); 35 bsp_region_text_end = bsp_region_text_begin + bsp_region_text_size; 36 37 bsp_region_data_begin = ORIGIN (REGION_DATA); 38 bsp_region_data_size = LENGTH (REGION_DATA); 39 bsp_region_data_end = bsp_region_data_begin + bsp_region_data_size; 40 41 /* 42 * BSP: Symbols that may be defined externally 43 */ 44 45 bsp_stack_abt_size = DEFINED (bsp_stack_abt_size) ? bsp_stack_abt_size : 128; 46 bsp_stack_abt_size = ALIGN (bsp_stack_abt_size, bsp_stack_align); 47 48 bsp_stack_fiq_size = DEFINED (bsp_stack_fiq_size) ? bsp_stack_fiq_size : 128; 49 bsp_stack_fiq_size = ALIGN (bsp_stack_fiq_size, bsp_stack_align); 50 51 bsp_stack_irq_size = DEFINED (bsp_stack_irq_size) ? bsp_stack_irq_size : 512; 52 bsp_stack_irq_size = ALIGN (bsp_stack_irq_size, bsp_stack_align); 53 54 bsp_stack_svc_size = DEFINED (bsp_stack_svc_size) ? bsp_stack_svc_size : 512; 55 bsp_stack_svc_size = ALIGN (bsp_stack_svc_size, bsp_stack_align); 56 57 bsp_stack_undef_size = DEFINED (bsp_stack_undef_size) ? bsp_stack_undef_size : 128; 58 bsp_stack_undef_size = ALIGN (bsp_stack_undef_size, bsp_stack_align); 103 59 104 60 SECTIONS { 61 .start : { 62 /* 63 * BSP: Begin of start section 64 */ 65 bsp_section_start_begin = .; 66 67 /* 68 * BSP: System startup entry 69 */ 70 KEEP (*(.bsp_start)) 71 72 . = ALIGN (bsp_section_align); 73 74 /* 75 * BSP: End of start section 76 */ 77 bsp_section_start_end = .; 78 } > REGION_START AT > REGION_START 79 80 bsp_section_start_size = bsp_section_start_end - bsp_section_start_begin; 81 105 82 .vector : { 106 83 /* 107 * BSP: Startof vector section108 */ 109 bsp_section_vector_ start= .;84 * BSP: Begin of vector section 85 */ 86 bsp_section_vector_begin = .; 110 87 111 88 /* … … 115 92 . = . + 64; 116 93 94 /* 95 * BSP: Reserve space for mode stacks 96 */ 97 98 . = ALIGN (bsp_stack_align); 99 100 bsp_stack_abt_begin = .; 101 . = . + bsp_stack_abt_size; 102 bsp_stack_abt_end = .; 103 104 bsp_stack_fiq_begin = .; 105 . = . + bsp_stack_fiq_size; 106 bsp_stack_fiq_end = .; 107 108 bsp_stack_irq_begin = .; 109 . = . + bsp_stack_irq_size; 110 bsp_stack_irq_end = .; 111 112 bsp_stack_svc_begin = .; 113 . = . + bsp_stack_svc_size; 114 bsp_stack_svc_end = .; 115 116 bsp_stack_undef_begin = .; 117 . = . + bsp_stack_undef_size; 118 bsp_stack_undef_end = .; 119 120 /* 121 * BSP: Special vector data 122 */ 123 *(.bsp_vector) 124 117 125 . = ALIGN (bsp_section_align); 118 126 … … 121 129 */ 122 130 bsp_section_vector_end = .; 123 } > R AM_INT124 125 bsp_section_vector_size = bsp_section_vector_end - bsp_section_vector_ start;126 127 .text : AT (bsp_ram_ext_load_start){128 /* 129 * BSP: Startof text section130 */ 131 bsp_section_text_ start= .;131 } > REGION_VECTOR AT > REGION_VECTOR 132 133 bsp_section_vector_size = bsp_section_vector_end - bsp_section_vector_begin; 134 135 .text : { 136 /* 137 * BSP: Begin of text section 138 */ 139 bsp_section_text_begin = .; 132 140 133 141 /* 134 142 * BSP: System startup entry 135 143 */ 136 KEEP (*(. entry))144 KEEP (*(.bsp_start)) 137 145 138 146 /* … … 167 175 * BSP: Moved into .text from .* 168 176 */ 177 *(.eh_frame_hdr) 178 179 /* 180 * BSP: Required by cpukit/score/src/threadhandler.c 181 */ 182 PROVIDE (_fini = .); 183 184 /* 185 * BSP: Moved into .text from .fini 186 */ 187 KEEP (*(.fini)) 188 189 . = ALIGN (bsp_section_align); 190 191 /* 192 * BSP: End of text section 193 */ 194 bsp_section_text_end = .; 195 } > REGION_TEXT AT > REGION_TEXT_LOAD 196 197 bsp_section_text_size = bsp_section_text_end - bsp_section_text_begin; 198 199 bsp_section_text_load_begin = LOADADDR (.text); 200 201 .rodata : { 202 /* 203 * BSP: Begin of rodata section 204 */ 205 bsp_section_rodata_begin = .; 206 207 __start_set_modmetadata_set = .; 208 *(set_modmetadata_set); 209 __stop_set_modmetadata_set = .; 210 211 /* 212 * BSP: Moved into .rodata from .* 213 */ 169 214 *(.rodata .rodata.* .gnu.linkonce.r.*) 170 215 *(.rodata1) 171 *(.eh_frame_hdr) 172 173 /* 174 * BSP: Required by cpukit/score/src/threadhandler.c 175 */ 176 PROVIDE (_fini = .); 177 178 /* 179 * BSP: Moved into .text from .fini 180 */ 181 KEEP (*(.fini)) 182 183 . = ALIGN (bsp_section_align); 184 185 /* 186 * BSP: End of text section 187 */ 188 bsp_section_text_end = .; 189 } > RAM_EXT 190 191 bsp_section_text_size = bsp_section_text_end - bsp_section_text_start; 216 217 . = ALIGN (bsp_section_align); 218 219 /* 220 * BSP: End of rodata section 221 */ 222 bsp_section_rodata_end = .; 223 } > REGION_RODATA AT > REGION_RODATA_LOAD 224 225 bsp_section_rodata_size = bsp_section_rodata_end - bsp_section_rodata_begin; 226 227 bsp_section_rodata_load_begin = LOADADDR (.rodata); 192 228 193 229 .data : { 194 230 /* 195 * BSP: Startof data section196 */ 197 bsp_section_data_ start= .;231 * BSP: Begin of data section 232 */ 233 bsp_section_data_begin = .; 198 234 199 235 /* … … 246 282 */ 247 283 bsp_section_data_end = .; 248 } > RAM_EXT 249 250 bsp_section_data_size = bsp_section_data_end - bsp_section_data_start; 284 } > REGION_DATA AT > REGION_DATA_LOAD 285 286 bsp_section_data_size = bsp_section_data_end - bsp_section_data_begin; 287 288 bsp_section_data_load_begin = LOADADDR (.data); 289 290 .fast : { 291 bsp_section_fast_begin = .; 292 293 *(.fast) 294 295 . = ALIGN (bsp_section_align); 296 297 bsp_section_fast_end = .; 298 } > REGION_FAST AT > REGION_FAST_LOAD 299 300 bsp_section_fast_size = bsp_section_fast_end - bsp_section_fast_begin; 301 302 bsp_section_fast_load_begin = LOADADDR (.fast); 251 303 252 304 .bss : { 253 305 /* 254 * BSP: Startof bss section255 */ 256 bsp_section_bss_ start= .;306 * BSP: Begin of bss section 307 */ 308 bsp_section_bss_begin = .; 257 309 258 310 *(COMMON) … … 266 318 */ 267 319 bsp_section_bss_end = .; 268 } > RAM_EXT 269 270 bsp_section_bss_size = bsp_section_bss_end - bsp_section_bss_start; 320 } > REGION_BSS AT > REGION_BSS 321 322 bsp_section_bss_size = bsp_section_bss_end - bsp_section_bss_begin; 323 324 .work : { 325 /* 326 * BSP: Begin of work section. The work section will occupy 327 * the remaining REGION_WORK region and contains the RTEMS work 328 * space and heap. 329 */ 330 bsp_section_work_begin = .; 331 332 . += ORIGIN (REGION_WORK) + LENGTH (REGION_WORK) - ABSOLUTE (.); 333 334 /* 335 * BSP: End of work section 336 */ 337 bsp_section_work_end = .; 338 } > REGION_WORK AT > REGION_WORK 339 340 bsp_section_work_size = bsp_section_work_end - bsp_section_work_begin; 271 341 272 342 .stack : { 273 343 /* 274 * BSP: Start of stack section 275 */ 276 bsp_section_stack_start = .; 277 278 . = ALIGN (bsp_stack_align); 279 bsp_stack_abt_start = .; 280 . = . + bsp_stack_abt_size; 281 282 . = ALIGN (bsp_stack_align); 283 bsp_stack_fiq_start = .; 284 . = . + bsp_stack_fiq_size; 285 286 . = ALIGN (bsp_stack_align); 287 bsp_stack_irq_start = .; 288 . = . + bsp_stack_irq_size; 289 290 . = ALIGN (bsp_stack_align); 291 bsp_stack_svc_start = .; 292 . = . + bsp_stack_svc_size; 293 294 . = ALIGN (bsp_stack_align); 295 bsp_stack_undef_start = .; 296 . = . + bsp_stack_undef_size; 297 298 . = ALIGN (bsp_section_align); 344 * BSP: Begin of stack section. The stack section will occupy 345 * the remaining REGION_STACK region and may contain the task 346 * stacks. Depending on the region distribution this section 347 * may be of zero size. 348 */ 349 bsp_section_stack_begin = .; 350 351 . += ORIGIN (REGION_STACK) + LENGTH (REGION_STACK) - ABSOLUTE (.); 299 352 300 353 /* … … 302 355 */ 303 356 bsp_section_stack_end = .; 304 } > RAM_INT 305 306 bsp_section_stack_size = bsp_section_stack_end - bsp_section_stack_start; 307 308 .work_area : { 309 /* 310 * BSP: Start of work area. The work area will occupy the remaining 311 * RAM_EXT region and contains the RTEMS work space and heap. We cannot 312 * assign the region end directly since this leads to a region full 313 * warning. 314 */ 315 bsp_section_work_area_start = .; 316 317 . = bsp_ram_ext_end - 4; 318 319 . = ALIGN (bsp_section_align); 320 321 /* 322 * BSP: End of work area 323 */ 324 bsp_section_work_area_end = .; 325 } > RAM_EXT 326 327 bsp_section_work_area_size = bsp_section_work_area_end - bsp_section_work_area_start; 357 } > REGION_STACK AT > REGION_STACK 358 359 bsp_section_stack_size = bsp_section_stack_end - bsp_section_stack_begin; 328 360 329 361 /* 330 362 * BSP: External symbols (FIXME) 331 363 */ 332 RamBase = bsp_ram_ext_start;333 RamSize = bsp_ram_ext_size;334 WorkAreaBase = bsp_section_work_ area_start;364 RamBase = ORIGIN (REGION_WORK); 365 RamSize = LENGTH (REGION_WORK); 366 WorkAreaBase = bsp_section_work_begin; 335 367 HeapSize = 0; 336 368 -
c/src/lib/libbsp/shared/ChangeLog
r9832a22c r7ae2775 1 2009-05-27 Sebastian Huber <sebastian.huber@embedded-brains.de> 2 3 * include/stackalloc.h, src/stackalloc.c: New files. 4 1 5 2009-07-06 Joel Sherrill <joel.sherrill@oarcorp.com> 2 6
Note: See TracChangeset
for help on using the changeset viewer.