Changeset 7a677fd7 in rtems


Ignore:
Timestamp:
Dec 13, 2000, 10:16:28 PM (19 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, master
Children:
40323b5
Parents:
9928d08
Message:

2000-12-13 Joel Sherrill <joel@…>

  • README: Updated. We are now vectoring a clock tick ISR handler. But RTEMS is not returning from the ISR properly.
  • clock/clockdrv.c: Now causes interrupts but has not been calibrated.
  • include/bsp.h: Use <libcpu/tx3904.h>
  • startup/Makefile.am: Add setvec.c from shared.
  • startup/bspstart.c: Initialize the status register (SR) so no interrupts are masked but global interrupts (SR_IEC) are off. Added call to install the ISR prologue code.
  • wrapup/Makefile.am: Pick up more pieces from libcpu.
Location:
c/src/lib/libbsp/mips/jmr3904
Files:
7 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/mips/jmr3904/ChangeLog

    r9928d08 r7a677fd7  
     12000-12-13      Joel Sherrill <joel@OARcorp.com>
     2
     3        * README: Updated.  We are now vectoring a clock tick ISR handler.
     4        But RTEMS is not returning from the ISR properly.
     5        * clock/clockdrv.c: Now causes interrupts but has not been calibrated.
     6        * include/bsp.h: Use <libcpu/tx3904.h>
     7        * startup/Makefile.am: Add setvec.c from shared.
     8        * startup/bspstart.c: Initialize the status register (SR) so
     9        no interrupts are masked but global interrupts (SR_IEC) are off.
     10        Added call to install the ISR prologue code.
     11        * wrapup/Makefile.am: Pick up more pieces from libcpu.
     12
    1132000-12-11      Joel Sherrill <joel@OARcorp.com>
    214
  • c/src/lib/libbsp/mips/jmr3904/README

    r9928d08 r7a677fd7  
    1515and peripheral set.
    1616
     17Simulator Information
     18=====================
     19The simulated system clock counts instructions.  Setting the clock
     20source to "clock" and the divider to 1 results in the timer directly
     21counting the number of instructions executed.
     22
    1723Status
    1824======
     
    2127  has to be a linkcmds issue.
    2228
    23 + There is no clock tick device driver.
     29+ Workaround: bspclean.c actually explicits invokes _sys_exit() BEFORE
     30  letting the global destructors run.
     31
     32+ There is a clock tick device driver which has not been calibrated.
    2433
    2534+ There is no timer device driver.
  • c/src/lib/libbsp/mips/jmr3904/clock/clockdrv.c

    r9928d08 r7a677fd7  
    88 */
    99
    10 #define CLOCK_VECTOR 0
     10#include <rtems.h>
     11#include <libcpu/tx3904.h>
     12
     13#define CLOCK_VECTOR TX3904_IRQ_TMR0
    1114
    1215#define Clock_driver_support_at_tick()
    1316
     17/* XXX */
     18#define CLICKS 10000
    1419#define Clock_driver_support_install_isr( _new, _old ) \
    15   do { _old = 0; } while(0)
     20  do { \
     21    unsigned32 _clicks = CLICKS; \
     22    _old = (rtems_isr_entry) set_vector( _new, CLOCK_VECTOR, 1 ); \
     23    TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_CCDR, 0x3 ); \
     24    TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_CPRA, _clicks ); \
     25    TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_TISR, 0x00 ); \
     26    TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_ITMR, 0x8001 ); \
     27    TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_TCR,   0xC0 ); \
     28    *((volatile unsigned32 *) 0xFFFFC01C) = 0x00000700; \
     29  } while(0)
    1630
    1731
  • c/src/lib/libbsp/mips/jmr3904/include/bsp.h

    r9928d08 r7a677fd7  
    2525#include <console.h>
    2626#include <clockdrv.h>
     27#include <libcpu/tx3904.h>
    2728
    2829/*
  • c/src/lib/libbsp/mips/jmr3904/startup/Makefile.am

    r9928d08 r7a677fd7  
    1010
    1111C_FILES = bspclean.c bsplibc.c bsppost.c bspstart.c bootcard.c main.c sbrk.c \
    12     gnatinstallhandler.c
     12    gnatinstallhandler.c setvec.c
    1313C_O_FILES = $(C_FILES:%.c=$(ARCH)/%.o)
    1414
  • c/src/lib/libbsp/mips/jmr3904/startup/bspstart.c

    r9928d08 r7a677fd7  
    9191
    9292  BSP_Configuration.work_space_start = (void *) &WorkspaceBase;
     93
     94  mips_set_sr( 0xff00 );  /* all interrupts unmasked but globally off */
     95                          /* depend on the IRC to take care of things */
     96  mips_install_isr_entries();
    9397}
    9498
  • c/src/lib/libbsp/mips/jmr3904/wrapup/Makefile.am

    r9928d08 r7a677fd7  
    1313# bummer; have to use $foreach since % pattern subst rules only replace 1x
    1414OBJS = $(foreach piece, $(BSP_FILES), $(wildcard ../$(piece)/$(ARCH)/*.o)) \
     15    $(wildcard ../../../../libcpu/$(RTEMS_CPU)/shared/*/$(ARCH)/*.o) \
     16    $(wildcard ../../../../libcpu/$(RTEMS_CPU)/tx39/*/$(ARCH)/*.o) \
    1517    $(wildcard ../../../../libcpu/$(RTEMS_CPU)/$(RTEMS_CPU_MODEL)/$(ARCH)/*.o) \
    1618    $(foreach piece, $(GENERIC_FILES), ../../../$(piece)/$(ARCH)/$(piece).rel)
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