Changeset 78f8c91 in rtems


Ignore:
Timestamp:
May 14, 2002, 4:53:01 PM (18 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, master
Children:
0d776cd2
Parents:
d9af8a8e
Message:

2001-05-14 Till Straumann <strauman@…>

  • rtems/powerpc/registers.h, rtems/score/ppc.h: Per PR213, add support for the MPC74000 (AKA G4); there is no AltiVec? support yet, however.
Files:
6 edited

Legend:

Unmodified
Added
Removed
  • c/src/exec/score/cpu/powerpc/ChangeLog

    rd9af8a8e r78f8c91  
     12001-05-14      Till Straumann <strauman@slac.stanford.edu>
     2
     3        * rtems/powerpc/registers.h, rtems/score/ppc.h: Per PR213, add
     4        support for the MPC74000 (AKA G4); there is no AltiVec support yet,
     5        however.
    162002-04-30      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
    27
  • c/src/exec/score/cpu/powerpc/rtems/powerpc/registers.h

    rd9af8a8e r78f8c91  
    6565#define HID0_DCI        (1<<10)         /* Data Cache Invalidate */
    6666#define HID0_SIED       (1<<7)          /* Serial Instruction Execution [Disable] */
     67#define HID0_BTIC       (1<<5)          /* Branch Target Instruction Cache [Enable] */
    6768#define HID0_BHTE       (1<<2)          /* Branch History Table Enable */
    6869#define HID0_BTCD       (1<<1)          /* Branch target cache disable */
  • c/src/exec/score/cpu/powerpc/rtems/score/ppc.h

    rd9af8a8e r78f8c91  
    268268#define PPC_I_CACHE             16384
    269269#define PPC_D_CACHE             16384
     270
     271#elif defined(mpc7400)
     272
     273#define CPU_MODEL_NAME  "PowerPC 7400"
     274
     275#define PPC_ALIGNMENT           8
     276#define PPC_I_CACHE             32768
     277#define PPC_D_CACHE             32768
    270278
    271279#elif defined(mpc8260)
  • cpukit/score/cpu/powerpc/ChangeLog

    rd9af8a8e r78f8c91  
     12001-05-14      Till Straumann <strauman@slac.stanford.edu>
     2
     3        * rtems/powerpc/registers.h, rtems/score/ppc.h: Per PR213, add
     4        support for the MPC74000 (AKA G4); there is no AltiVec support yet,
     5        however.
    162002-04-30      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
    27
  • cpukit/score/cpu/powerpc/rtems/powerpc/registers.h

    rd9af8a8e r78f8c91  
    6565#define HID0_DCI        (1<<10)         /* Data Cache Invalidate */
    6666#define HID0_SIED       (1<<7)          /* Serial Instruction Execution [Disable] */
     67#define HID0_BTIC       (1<<5)          /* Branch Target Instruction Cache [Enable] */
    6768#define HID0_BHTE       (1<<2)          /* Branch History Table Enable */
    6869#define HID0_BTCD       (1<<1)          /* Branch target cache disable */
  • cpukit/score/cpu/powerpc/rtems/score/ppc.h

    rd9af8a8e r78f8c91  
    268268#define PPC_I_CACHE             16384
    269269#define PPC_D_CACHE             16384
     270
     271#elif defined(mpc7400)
     272
     273#define CPU_MODEL_NAME  "PowerPC 7400"
     274
     275#define PPC_ALIGNMENT           8
     276#define PPC_I_CACHE             32768
     277#define PPC_D_CACHE             32768
    270278
    271279#elif defined(mpc8260)
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