Index: bsps/powerpc/ss555/clock/clock.c
===================================================================
--- bsps/powerpc/ss555/clock/clock.c	(revision 7632906fc290b652416ab59eb5fb49356c064ed6)
+++ bsps/powerpc/ss555/clock/clock.c	(revision 7632906fc290b652416ab59eb5fb49356c064ed6)
@@ -0,0 +1,144 @@
+/*
+ *  This routine initializes the PIT on the MPC5xx.
+ *  The tick frequency is specified by the BSP.
+ */
+
+/*
+ *  MPC5xx port sponsored by Defence Research and Development Canada - Suffield
+ *  Copyright (C) 2004, Real-Time Systems Inc. (querbach@realtime.bc.ca)
+ *
+ *  Derived from c/src/lib/libcpu/powerpc/mpc8xx/clock/clock.c:
+ *
+ *  Author: Jay Monkman (jmonkman@frasca.com)
+ *  Copyright (C) 1998 by Frasca International, Inc.
+ *
+ *  Derived from c/src/lib/libcpu/ppc/ppc403/clock/clock.c:
+ *
+ *  Author: Andrew Bray <andy@i-cubed.co.uk>
+ *
+ *  COPYRIGHT (c) 1995 by i-cubed ltd.
+ *
+ *  To anyone who acknowledges that this file is provided "AS IS"
+ *  without any express or implied warranty:
+ *      permission to use, copy, modify, and distribute this file
+ *      for any purpose is hereby granted without fee, provided that
+ *      the above copyright notice and this notice appears in all
+ *      copies, and that the name of i-cubed limited not be used in
+ *      advertising or publicity pertaining to distribution of the
+ *      software without specific, written prior permission.
+ *      i-cubed limited makes no representations about the suitability
+ *      of this software for any purpose.
+ *
+ *  Derived from c/src/lib/libcpu/hppa1_1/clock/clock.c:
+ *
+ *  COPYRIGHT (c) 1989-2007.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ */
+
+#include <rtems.h>
+#include <rtems/clockdrv.h>
+#include <rtems/libio.h>
+#include <libcpu/irq.h>
+
+#include <stdlib.h>                     /* for atexit() */
+#include <mpc5xx.h>
+
+volatile uint32_t Clock_driver_ticks;
+extern int BSP_connect_clock_handler(rtems_isr_entry);
+extern int BSP_disconnect_clock_handler(void);
+extern uint32_t bsp_clicks_per_usec;
+
+void Clock_exit( void );
+
+/*
+ *  ISR Handler
+ */
+rtems_isr Clock_isr(rtems_vector_number vector)
+{
+  usiu.piscrk = USIU_UNLOCK_KEY;
+  usiu.piscr |= USIU_PISCR_PS;			/* acknowledge interrupt */
+  usiu.piscrk = 0;
+
+  Clock_driver_ticks++;
+  rtems_clock_tick();
+}
+
+void clockOn(void* unused)
+{
+  unsigned desiredLevel;
+  uint32_t pit_value;
+
+  /* calculate and set modulus */
+  pit_value = (rtems_configuration_get_microseconds_per_tick() *
+               bsp_clicks_per_usec) - 1 ;
+
+  if (pit_value > 0xffff) {           /* pit is only 16 bits long */
+    rtems_fatal_error_occurred(-1);
+  }
+  usiu.sccrk = USIU_UNLOCK_KEY;
+  usiu.sccr &= ~USIU_SCCR_RTDIV;	/* RTC and PIT clock is divided by 4 */
+  usiu.sccrk = 0;
+
+  usiu.pitck = USIU_UNLOCK_KEY;
+  usiu.pitc = pit_value;
+  usiu.pitck = 0;
+
+  /* set PIT irq level, enable PIT, PIT interrupts */
+  /*  and clear int. status */
+  desiredLevel = CPU_irq_level_from_symbolic_name(CPU_PERIODIC_TIMER);
+
+  usiu.piscrk = USIU_UNLOCK_KEY;
+  usiu.piscr = USIU_PISCR_PIRQ(desiredLevel) 	/* set interrupt priority */
+             | USIU_PISCR_PS			/* acknowledge interrupt */
+             | USIU_PISCR_PIE			/* enable interrupt */
+             | USIU_PISCR_PITF			/* freeze during debug */
+             | USIU_PISCR_PTE;			/* enable timer */
+  usiu.piscrk = 0;
+}
+
+void clockOff(void* unused)
+{
+  /* disable PIT and PIT interrupts */
+  usiu.piscrk = USIU_UNLOCK_KEY;
+  usiu.piscr &= ~(USIU_PISCR_PTE | USIU_PISCR_PIE);
+  usiu.piscrk = 0;
+}
+
+int clockIsOn(void* unused)
+{
+  if (usiu.piscr & USIU_PISCR_PIE)
+    return 1;
+  return 0;
+}
+
+/*
+ * Called via atexit()
+ * Remove the clock interrupt handler by setting handler to NULL
+ */
+void Clock_exit(void)
+{
+  (void) BSP_disconnect_clock_handler ();
+}
+
+static void Install_clock(rtems_isr_entry clock_isr)
+{
+  Clock_driver_ticks = 0;
+
+  BSP_connect_clock_handler (clock_isr);
+  atexit(Clock_exit);
+}
+
+rtems_device_driver Clock_initialize(
+  rtems_device_major_number major,
+  rtems_device_minor_number minor,
+  void *pargp
+)
+{
+  Install_clock( Clock_isr );
+
+  return RTEMS_SUCCESSFUL;
+}
Index: bsps/powerpc/ss555/clock/p_clock.c
===================================================================
--- bsps/powerpc/ss555/clock/p_clock.c	(revision 7632906fc290b652416ab59eb5fb49356c064ed6)
+++ bsps/powerpc/ss555/clock/p_clock.c	(revision 7632906fc290b652416ab59eb5fb49356c064ed6)
@@ -0,0 +1,63 @@
+/*
+ *  Clock Tick interrupt conexion code.
+ *
+ *  COPYRIGHT (c) 1989-1997.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may in
+ *  the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ *
+ *  SS555 port sponsored by Defence Research and Development Canada - Suffield
+ *  Copyright (C) 2004, Real-Time Systems Inc. (querbach@realtime.bc.ca)
+ *
+ *  Derived from c/src/lib/libbsp/powerpc/mbx8xx/clock/p_clock.c:
+ *
+ *  Modified to support the MPC750.
+ *  Modifications Copyright (c) 1999 Eric Valette valette@crf.canon.fr
+ */
+
+#include <bsp.h>
+#include <bsp/irq.h>
+#include <rtems/bspIo.h>
+#include <mpc5xx.h>
+
+static rtems_irq_connect_data clockIrqData = {
+  CPU_PERIODIC_TIMER,
+  (rtems_irq_hdl)Clock_isr,
+  NULL,
+  (rtems_irq_enable)clockOn,
+  (rtems_irq_disable)clockOff,
+  (rtems_irq_is_enabled)clockIsOn
+};
+
+int BSP_disconnect_clock_handler (void)
+{
+  if (!BSP_get_current_rtems_irq_handler(&clockIrqData)) {
+     printk("Unable to stop system clock\n");
+    rtems_fatal_error_occurred(1);
+  }
+  return BSP_remove_rtems_irq_handler (&clockIrqData);
+}
+
+int BSP_connect_clock_handler (rtems_irq_hdl hdl)
+{
+  if (!BSP_get_current_rtems_irq_handler(&clockIrqData)) {
+     printk("Unable to get system clock handler\n");
+    rtems_fatal_error_occurred(1);
+  }
+  if (!BSP_remove_rtems_irq_handler (&clockIrqData)) {
+   printk("Unable to remove current system clock handler\n");
+    rtems_fatal_error_occurred(1);
+  }
+  /*
+   * Reinit structure
+   */
+  clockIrqData.name = CPU_PERIODIC_TIMER;
+  clockIrqData.hdl = (rtems_irq_hdl) hdl;
+  clockIrqData.on = (rtems_irq_enable)clockOn;
+  clockIrqData.off = (rtems_irq_enable)clockOff;
+  clockIrqData.isOn = (rtems_irq_is_enabled)clockIsOn;
+
+  return BSP_install_rtems_irq_handler (&clockIrqData);
+}
Index: bsps/powerpc/ss555/dev/clock.c
===================================================================
--- bsps/powerpc/ss555/dev/clock.c	(revision bb22a3f3af86c00d70f51b4a3531640c0808261a)
+++ 	(revision )
@@ -1,144 +1,0 @@
-/*
- *  This routine initializes the PIT on the MPC5xx.
- *  The tick frequency is specified by the BSP.
- */
-
-/*
- *  MPC5xx port sponsored by Defence Research and Development Canada - Suffield
- *  Copyright (C) 2004, Real-Time Systems Inc. (querbach@realtime.bc.ca)
- *
- *  Derived from c/src/lib/libcpu/powerpc/mpc8xx/clock/clock.c:
- *
- *  Author: Jay Monkman (jmonkman@frasca.com)
- *  Copyright (C) 1998 by Frasca International, Inc.
- *
- *  Derived from c/src/lib/libcpu/ppc/ppc403/clock/clock.c:
- *
- *  Author: Andrew Bray <andy@i-cubed.co.uk>
- *
- *  COPYRIGHT (c) 1995 by i-cubed ltd.
- *
- *  To anyone who acknowledges that this file is provided "AS IS"
- *  without any express or implied warranty:
- *      permission to use, copy, modify, and distribute this file
- *      for any purpose is hereby granted without fee, provided that
- *      the above copyright notice and this notice appears in all
- *      copies, and that the name of i-cubed limited not be used in
- *      advertising or publicity pertaining to distribution of the
- *      software without specific, written prior permission.
- *      i-cubed limited makes no representations about the suitability
- *      of this software for any purpose.
- *
- *  Derived from c/src/lib/libcpu/hppa1_1/clock/clock.c:
- *
- *  COPYRIGHT (c) 1989-2007.
- *  On-Line Applications Research Corporation (OAR).
- *
- *  The license and distribution terms for this file may be
- *  found in the file LICENSE in this distribution or at
- *  http://www.rtems.org/license/LICENSE.
- */
-
-#include <rtems.h>
-#include <rtems/clockdrv.h>
-#include <rtems/libio.h>
-#include <libcpu/irq.h>
-
-#include <stdlib.h>                     /* for atexit() */
-#include <mpc5xx.h>
-
-volatile uint32_t Clock_driver_ticks;
-extern int BSP_connect_clock_handler(rtems_isr_entry);
-extern int BSP_disconnect_clock_handler(void);
-extern uint32_t bsp_clicks_per_usec;
-
-void Clock_exit( void );
-
-/*
- *  ISR Handler
- */
-rtems_isr Clock_isr(rtems_vector_number vector)
-{
-  usiu.piscrk = USIU_UNLOCK_KEY;
-  usiu.piscr |= USIU_PISCR_PS;			/* acknowledge interrupt */
-  usiu.piscrk = 0;
-
-  Clock_driver_ticks++;
-  rtems_clock_tick();
-}
-
-void clockOn(void* unused)
-{
-  unsigned desiredLevel;
-  uint32_t pit_value;
-
-  /* calculate and set modulus */
-  pit_value = (rtems_configuration_get_microseconds_per_tick() *
-               bsp_clicks_per_usec) - 1 ;
-
-  if (pit_value > 0xffff) {           /* pit is only 16 bits long */
-    rtems_fatal_error_occurred(-1);
-  }
-  usiu.sccrk = USIU_UNLOCK_KEY;
-  usiu.sccr &= ~USIU_SCCR_RTDIV;	/* RTC and PIT clock is divided by 4 */
-  usiu.sccrk = 0;
-
-  usiu.pitck = USIU_UNLOCK_KEY;
-  usiu.pitc = pit_value;
-  usiu.pitck = 0;
-
-  /* set PIT irq level, enable PIT, PIT interrupts */
-  /*  and clear int. status */
-  desiredLevel = CPU_irq_level_from_symbolic_name(CPU_PERIODIC_TIMER);
-
-  usiu.piscrk = USIU_UNLOCK_KEY;
-  usiu.piscr = USIU_PISCR_PIRQ(desiredLevel) 	/* set interrupt priority */
-             | USIU_PISCR_PS			/* acknowledge interrupt */
-             | USIU_PISCR_PIE			/* enable interrupt */
-             | USIU_PISCR_PITF			/* freeze during debug */
-             | USIU_PISCR_PTE;			/* enable timer */
-  usiu.piscrk = 0;
-}
-
-void clockOff(void* unused)
-{
-  /* disable PIT and PIT interrupts */
-  usiu.piscrk = USIU_UNLOCK_KEY;
-  usiu.piscr &= ~(USIU_PISCR_PTE | USIU_PISCR_PIE);
-  usiu.piscrk = 0;
-}
-
-int clockIsOn(void* unused)
-{
-  if (usiu.piscr & USIU_PISCR_PIE)
-    return 1;
-  return 0;
-}
-
-/*
- * Called via atexit()
- * Remove the clock interrupt handler by setting handler to NULL
- */
-void Clock_exit(void)
-{
-  (void) BSP_disconnect_clock_handler ();
-}
-
-static void Install_clock(rtems_isr_entry clock_isr)
-{
-  Clock_driver_ticks = 0;
-
-  BSP_connect_clock_handler (clock_isr);
-  atexit(Clock_exit);
-}
-
-rtems_device_driver Clock_initialize(
-  rtems_device_major_number major,
-  rtems_device_minor_number minor,
-  void *pargp
-)
-{
-  Install_clock( Clock_isr );
-
-  return RTEMS_SUCCESSFUL;
-}
