Index: bsps/arm/atsam/clock/systick-freq.c
===================================================================
--- bsps/arm/atsam/clock/systick-freq.c	(revision 7632906fc290b652416ab59eb5fb49356c064ed6)
+++ bsps/arm/atsam/clock/systick-freq.c	(revision 7632906fc290b652416ab59eb5fb49356c064ed6)
@@ -0,0 +1,31 @@
+/*
+ * Copyright (c) 2016 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Dornierstr. 4
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#include <bsp.h>
+
+#include <chip.h>
+
+uint32_t atsam_systick_frequency(void)
+{
+  uint32_t mdiv = (PMC->PMC_MCKR & PMC_MCKR_MDIV_Msk) >> PMC_MCKR_MDIV_Pos;
+  uint32_t fclk;
+
+  if (mdiv == 3) {
+    fclk = BOARD_MCK * mdiv;
+  } else {
+    fclk = BOARD_MCK * (1 << mdiv);
+  }
+
+  return fclk;
+}
Index: bsps/arm/csb336/clock/clockdrv.c
===================================================================
--- bsps/arm/csb336/clock/clockdrv.c	(revision 7632906fc290b652416ab59eb5fb49356c064ed6)
+++ bsps/arm/csb336/clock/clockdrv.c	(revision 7632906fc290b652416ab59eb5fb49356c064ed6)
@@ -0,0 +1,134 @@
+/*
+ *  MC9328MXL clock specific using the System Timer
+ */
+
+/*
+ *  Copyright (c) 2004 by Cogent Computer Systems
+ *  Written by Jay Monkman <jtm@lopingdog.com>
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+#include <bsp/irq.h>
+#include <mc9328mxl.h>
+#include <rtems/bspIo.h>  /* for printk */
+
+/* this is defined in ../../../shared/dev/clock/clockimpl.h */
+void Clock_isr(rtems_irq_hdl_param arg);
+static void clock_isr_on(const rtems_irq_connect_data *unused);
+static void clock_isr_off(const rtems_irq_connect_data *unused);
+static int clock_isr_is_on(const rtems_irq_connect_data *irq);
+
+/* Replace the first value with the clock's interrupt name. */
+rtems_irq_connect_data clock_isr_data = {
+  .name   = BSP_INT_TIMER1,
+  .hdl    = Clock_isr,
+  .handle = (void *)BSP_INT_TIMER1,
+  .on     = clock_isr_on,
+  .off    = clock_isr_off,
+  .isOn   = clock_isr_is_on,
+};
+
+/**
+ * When we get the clock interrupt
+ *    - clear the interrupt bit?
+ *    - restart the timer?
+ */
+#define Clock_driver_support_at_tick()               \
+  do {                                               \
+    uint32_t reg;                                    \
+                                                     \
+    reg = MC9328MXL_TMR1_TSTAT;                      \
+    (void) reg; /* avoid set but not used warning */ \
+    MC9328MXL_TMR1_TSTAT = 0;                        \
+  } while(0)
+
+/**
+ * Installs the clock ISR. You shouldn't need to change this.
+ */
+#define Clock_driver_support_install_isr( _new ) \
+  BSP_install_rtems_irq_handler(&clock_isr_data)
+
+/**
+ * Initialize the hardware for the clock
+ *   - Set the frequency
+ *   - enable it
+ *   - clear any pending interrupts
+ *
+ * Since you may want the clock always running, you can
+ * enable interrupts here. If you do so, the clock_isr_on(),
+ * clock_isr_off(), and clock_isr_is_on() functions can be
+ * NOPs.
+ */
+#define Clock_driver_support_initialize_hardware() \
+  do { \
+        int freq; \
+        int cnt; \
+        freq = get_perclk1_freq(); \
+        printk("perclk1 freq is %d\n", freq); \
+        cnt = ((long long)freq * rtems_configuration_get_microseconds_per_tick() + 500000) / 1000000;\
+        printk("cnt freq is %d\n", cnt); \
+        MC9328MXL_TMR1_TCMP = cnt; \
+        /* use PERCLK1 as input, enable timer */ \
+        MC9328MXL_TMR1_TCTL = (MC9328MXL_TMR_TCTL_CLKSRC_PCLK1 | \
+                               MC9328MXL_TMR_TCTL_TEN | \
+                               MC9328MXL_TMR_TCTL_IRQEN); \
+        /* set prescaler to 1 (register value + 1) */ \
+        MC9328MXL_TMR1_TPRER = 0; \
+     } while (0)
+
+/**
+ * Do whatever you need to shut the clock down and remove the
+ * interrupt handler. Since this normally only gets called on
+ * RTEMS shutdown, you may not need to do anything other than
+ * remove the ISR.
+ */
+#define Clock_driver_support_shutdown_hardware()                        \
+  do {                                                                  \
+    /* Disable timer */ \
+    MC9328MXL_TMR1_TCTL = 0; \
+    BSP_remove_rtems_irq_handler(&clock_isr_data);                  \
+  } while (0)
+
+/**
+ * Enables clock interrupt.
+ *
+ * If the interrupt is always on, this can be a NOP.
+ */
+static void clock_isr_on(const rtems_irq_connect_data *unused)
+{
+  MC9328MXL_TMR1_TCTL |= MC9328MXL_TMR_TCTL_IRQEN;
+  MC9328MXL_AITC_INTENNUM = MC9328MXL_INT_TIMER1;
+}
+
+/**
+ * Disables clock interrupts
+ *
+ * If the interrupt is always on, this can be a NOP.
+ */
+static void clock_isr_off(const rtems_irq_connect_data *unused)
+{
+  MC9328MXL_TMR1_TCTL &= ~MC9328MXL_TMR_TCTL_IRQEN;
+  MC9328MXL_AITC_INTDISNUM = MC9328MXL_INT_TIMER1;
+}
+
+/**
+ * Tests to see if clock interrupt is enabled, and returns 1 if so.
+ * If interrupt is not enabled, returns 0.
+ *
+ * If the interrupt is always on, this always returns 1.
+ */
+static int clock_isr_is_on(const rtems_irq_connect_data *irq)
+{
+  return MC9328MXL_TMR1_TCTL & MC9328MXL_TMR_TCTL_IRQEN;
+}
+
+#define CLOCK_DRIVER_USE_DUMMY_TIMECOUNTER
+
+/* Make sure to include this, and only at the end of the file */
+
+#include "../../../shared/dev/clock/clockimpl.h"
Index: bsps/arm/csb337/clock/clock.c
===================================================================
--- bsps/arm/csb337/clock/clock.c	(revision 7632906fc290b652416ab59eb5fb49356c064ed6)
+++ bsps/arm/csb337/clock/clock.c	(revision 7632906fc290b652416ab59eb5fb49356c064ed6)
@@ -0,0 +1,113 @@
+/*
+ *  AT91RM9200 clock specific using the System Timer
+ */
+
+/*
+ *  Copyright (c) 2003 by Cogent Computer Systems
+ *  Written by Mike Kelly <mike@cogcomp.com>
+ *         and Jay Monkman <jtm@lopingdog.com>
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ */
+
+#include <rtems.h>
+#include <rtems/clockdrv.h>
+#include <rtems/libio.h>
+
+#include <stdlib.h>
+#include <bsp.h>
+#include <bsp/irq.h>
+#include <at91rm9200.h>
+#include <at91rm9200_pmc.h>
+
+/**
+ * Enables clock interrupt.
+ *
+ * If the interrupt is always on, this can be a NOP.
+ */
+static void clock_isr_on(const rtems_irq_connect_data *unused)
+{
+  /* enable timer interrupt */
+  ST_REG(ST_IER) = ST_SR_PITS;
+}
+
+/**
+ * Disables clock interrupts
+ *
+ * If the interrupt is always on, this can be a NOP.
+ */
+static void clock_isr_off(const rtems_irq_connect_data *unused)
+{
+  /* disable timer interrupt */
+  ST_REG(ST_IDR) = ST_SR_PITS;
+}
+
+/**
+ * Tests to see if clock interrupt is enabled, and returns 1 if so.
+ * If interrupt is not enabled, returns 0.
+ *
+ * If the interrupt is always on, this always returns 1.
+ */
+static int clock_isr_is_on(const rtems_irq_connect_data *irq)
+{
+  /* check timer interrupt */
+  return ST_REG(ST_IMR) & ST_SR_PITS;
+}
+
+void Clock_isr(rtems_irq_hdl_param arg);
+
+/* Replace the first value with the clock's interrupt name. */
+rtems_irq_connect_data clock_isr_data = {
+  .name   = AT91RM9200_INT_SYSIRQ,
+  .hdl    = Clock_isr,
+  .handle = NULL,
+  .on     = clock_isr_on,
+  .off    = clock_isr_off,
+  .isOn   = clock_isr_is_on,
+};
+
+
+#define Clock_driver_support_install_isr( _new ) \
+  BSP_install_rtems_irq_handler(&clock_isr_data)
+
+static void Clock_driver_support_initialize_hardware(void)
+{
+  uint32_t st_str;
+  int slck;
+  unsigned long value;
+
+  /* the system timer is driven from SLCK */
+  slck = at91rm9200_get_slck();
+  value = (((rtems_configuration_get_microseconds_per_tick() * slck) +
+                      (1000000/2))/ 1000000);
+
+  /* read the status to clear the int */
+  st_str = ST_REG(ST_SR);
+  (void) st_str; /* avoid set but not used warning */ \
+
+  /* set priority */
+  AIC_SMR_REG(AIC_SMR_SYSIRQ) = AIC_SMR_PRIOR(0x7);
+
+  /* set the timer value */
+  ST_REG(ST_PIMR) = value;
+}
+
+#define Clock_driver_support_at_tick() \
+  do { \
+    uint32_t st_str; \
+    \
+    /* read the status to clear the int */ \
+    st_str = ST_REG(ST_SR); \
+    (void) st_str; /* avoid set but not used warning */ \
+  } while (0)
+
+#define Clock_driver_support_shutdown_hardware() \
+  do { \
+    BSP_remove_rtems_irq_handler(&clock_isr_data); \
+  } while (0)
+
+#define CLOCK_DRIVER_USE_DUMMY_TIMECOUNTER
+
+#include "../../../shared/dev/clock/clockimpl.h"
Index: bsps/arm/edb7312/clock/clockdrv.c
===================================================================
--- bsps/arm/edb7312/clock/clockdrv.c	(revision 7632906fc290b652416ab59eb5fb49356c064ed6)
+++ bsps/arm/edb7312/clock/clockdrv.c	(revision 7632906fc290b652416ab59eb5fb49356c064ed6)
@@ -0,0 +1,72 @@
+/*
+ * Cirrus EP7312 Clock driver
+ *
+ * Copyright (c) 2002 by Jay Monkman <jtm@smoothsmoothie.com>
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ */
+
+#include <rtems.h>
+#include <ep7312.h>
+#include <bsp.h>
+#include <bsp/irq.h>
+#include <assert.h>
+
+#if ON_SKYEYE==1
+  #define CLOCK_DRIVER_USE_FAST_IDLE 1
+#endif
+
+void Clock_isr(void * arg);
+
+#define Clock_driver_support_at_tick()                \
+  do {                                                \
+    *EP7312_TC1EOI = 0xffffffff;                      \
+  } while(0)
+
+#define Clock_driver_support_install_isr( _new )       \
+  do {                                                 \
+    rtems_status_code status = RTEMS_SUCCESSFUL;       \
+    status = rtems_interrupt_handler_install(          \
+        BSP_TC1OI,                                     \
+        "Clock",                                       \
+        RTEMS_INTERRUPT_UNIQUE,                        \
+        Clock_isr,                                     \
+        NULL                                           \
+    );                                                 \
+    assert(status == RTEMS_SUCCESSFUL);                \
+  } while(0)
+
+/*
+ * Set up the clock hardware
+ */
+#if ON_SKYEYE
+  #define TCD_VALUE \
+    (rtems_configuration_get_microseconds_per_tick() * 2000)/25000
+#else
+  #define TCD_VALUE \
+    (rtems_configuration_get_microseconds_per_tick() * 2000)/1000000
+#endif
+
+#define Clock_driver_support_initialize_hardware()  \
+  do {                                              \
+    *EP7312_SYSCON1 |= EP7312_SYSCON1_TC1_PRESCALE; \
+    *EP7312_TC1D = TCD_VALUE;                       \
+    *EP7312_TC1EOI = 0xFFFFFFFF;                    \
+  } while (0)
+
+#define Clock_driver_support_shutdown_hardware()    \
+  do {                                              \
+    rtems_status_code status = RTEMS_SUCCESSFUL;    \
+    status = rtems_interrupt_handler_remove(        \
+        BSP_TC1OI,                                  \
+        Clock_isr,                                  \
+        NULL                                        \
+    );                                              \
+    assert(status == RTEMS_SUCCESSFUL);             \
+  } while (0)
+
+#define CLOCK_DRIVER_USE_DUMMY_TIMECOUNTER
+
+#include "../../../shared/dev/clock/clockimpl.h"
Index: bsps/arm/gumstix/clock/clock.c
===================================================================
--- bsps/arm/gumstix/clock/clock.c	(revision 7632906fc290b652416ab59eb5fb49356c064ed6)
+++ bsps/arm/gumstix/clock/clock.c	(revision 7632906fc290b652416ab59eb5fb49356c064ed6)
@@ -0,0 +1,118 @@
+/*
+ *  PXA255 clock specific using the System Timer
+ *
+ *  RTEMS uses IRQ 26 as Clock Source
+ */
+
+/*
+ *  By Yang Xi <hiyangxi@gmail.com>
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ */
+
+#include <rtems.h>
+#include <rtems/clockdrv.h>
+#include <rtems/libio.h>
+
+#include <stdlib.h>
+#include <bsp.h>
+#include <bspopts.h>
+#include <bsp/irq.h>
+#include <pxa255.h>
+
+#if ON_SKYEYE==1
+  #define CLOCK_DRIVER_USE_FAST_IDLE 1
+#endif
+
+static unsigned long period_num;
+
+/**
+ * Enables clock interrupt.
+ *
+ * If the interrupt is always on, this can be a NOP.
+ */
+static void clock_isr_on(const rtems_irq_connect_data *unused)
+{
+  /*Clear the interrupt bit */
+  XSCALE_OS_TIMER_TSR = 0x1;
+
+  /* enable timer interrupt */
+  XSCALE_OS_TIMER_IER |= 0x1;
+
+#if ON_SKYEYE==1
+  period_num = (TIMER_RATE* rtems_configuration_get_microseconds_per_tick())/100000;
+#else
+  period_num = (TIMER_RATE* rtems_configuration_get_microseconds_per_tick())/10000;
+#endif
+
+  XSCALE_OS_TIMER_MR0 = XSCALE_OS_TIMER_TCR + period_num;
+}
+
+/**
+ * Disables clock interrupts
+ *
+ * If the interrupt is always on, this can be a NOP.
+ */
+static void clock_isr_off(const rtems_irq_connect_data *unused)
+{
+  /*Clear the interrupt bit */
+  XSCALE_OS_TIMER_TSR = 0x1;
+  /* disable timer interrupt*/
+  XSCALE_OS_TIMER_IER &= ~0x1;
+}
+
+/**
+ * Tests to see if clock interrupt is enabled, and returns 1 if so.
+ * If interrupt is not enabled, returns 0.
+ *
+ * If the interrupt is always on, this always returns 1.
+ */
+static int clock_isr_is_on(const rtems_irq_connect_data *irq)
+{
+  /* check timer interrupt */
+  return XSCALE_OS_TIMER_IER & 0x1;
+}
+
+void Clock_isr(rtems_irq_hdl_param arg);
+
+rtems_irq_connect_data clock_isr_data = {
+  .name   = XSCALE_IRQ_OS_TIMER,
+  .hdl    = Clock_isr,
+  .handle = NULL,
+  .on     = clock_isr_on,
+  .off    = clock_isr_off,
+  .isOn   = clock_isr_is_on,
+};
+
+#define Clock_driver_support_install_isr( _new ) \
+  BSP_install_rtems_irq_handler(&clock_isr_data)
+
+static void Clock_driver_support_initialize_hardware(void)
+{
+  period_num = TIMER_RATE* rtems_configuration_get_microseconds_per_tick();
+#if ON_SKYEYE==1
+  period_num /= 100000;
+#else
+  period_num /= 10000;
+#endif
+}
+
+#define Clock_driver_support_at_tick() \
+  do { \
+    /* read the status to clear the int */ \
+    XSCALE_OS_TIMER_TSR = 0x1; \
+    \
+    /*Add the match register*/ \
+    XSCALE_OS_TIMER_MR0 = XSCALE_OS_TIMER_TCR + period_num; \
+  } while (0)
+
+#define Clock_driver_support_shutdown_hardware() \
+  do { \
+    BSP_remove_rtems_irq_handler(&clock_isr_data); \
+  } while (0)
+
+#define CLOCK_DRIVER_USE_DUMMY_TIMECOUNTER
+
+#include "../../../shared/dev/clock/clockimpl.h"
Index: bsps/arm/raspberrypi/clock/clockdrv.c
===================================================================
--- bsps/arm/raspberrypi/clock/clockdrv.c	(revision 7632906fc290b652416ab59eb5fb49356c064ed6)
+++ bsps/arm/raspberrypi/clock/clockdrv.c	(revision 7632906fc290b652416ab59eb5fb49356c064ed6)
@@ -0,0 +1,114 @@
+/**
+ * @file
+ *
+ * @ingroup bsp_clock
+ *
+ * @brief Raspberry Pi clock support.
+ */
+
+/*
+ * BCM2835 Clock driver
+ *
+ * Copyright (c) 2013 Alan Cudmore
+ * Copyright (c) 2016 Pavel Pisa
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *
+ *  http://www.rtems.org/license/LICENSE
+ *
+*/
+
+#include <rtems.h>
+#include <bsp.h>
+#include <bsp/irq.h>
+#include <bsp/irq-generic.h>
+#include <bsp/raspberrypi.h>
+#include <rtems/timecounter.h>
+
+/* This is defined in ../../../shared/dev/clock/clockimpl.h */
+void Clock_isr(rtems_irq_hdl_param arg);
+
+static struct timecounter raspberrypi_tc;
+
+static uint32_t raspberrypi_clock_get_timecount(struct timecounter *tc)
+{
+  return BCM2835_REG(BCM2835_GPU_TIMER_CLO);
+}
+
+static void raspberrypi_clock_at_tick(void)
+{
+  uint32_t act_val;
+  uint32_t next_cmp = BCM2835_REG(BCM2835_GPU_TIMER_C3);
+  next_cmp += rtems_configuration_get_microseconds_per_tick();
+  BCM2835_REG(BCM2835_GPU_TIMER_C3) = next_cmp;
+  act_val = BCM2835_REG(BCM2835_GPU_TIMER_CLO);
+
+  /*
+   * Clear interrupt only if there is time left to the next tick.
+   * If time of the next tick has already passed then interrupt
+   * request stays active and fires immediately after current tick
+   * processing is finished.
+   */
+  if ((int32_t)(next_cmp - act_val) > 0)
+    BCM2835_REG(BCM2835_GPU_TIMER_CS) = BCM2835_GPU_TIMER_CS_M3;
+}
+
+static void raspberrypi_clock_handler_install_isr(
+  rtems_isr_entry clock_isr
+)
+{
+  rtems_status_code sc = RTEMS_SUCCESSFUL;
+
+  if (clock_isr != NULL) {
+    sc = rtems_interrupt_handler_install(
+      BCM2835_IRQ_ID_GPU_TIMER_M3,
+      "Clock",
+      RTEMS_INTERRUPT_UNIQUE,
+      (rtems_interrupt_handler) clock_isr,
+      NULL
+    );
+  } else {
+    /* Remove interrupt handler */
+    sc = rtems_interrupt_handler_remove(
+      BCM2835_IRQ_ID_GPU_TIMER_M3,
+      (rtems_interrupt_handler) Clock_isr,
+      NULL
+    );
+  }
+  if ( sc != RTEMS_SUCCESSFUL ) {
+    rtems_fatal_error_occurred(0xdeadbeef);
+  }
+}
+
+static void raspberrypi_clock_initialize_hardware(void)
+{
+  uint32_t next_cmp = BCM2835_REG(BCM2835_GPU_TIMER_CLO);
+  next_cmp += rtems_configuration_get_microseconds_per_tick();
+  BCM2835_REG(BCM2835_GPU_TIMER_C3) = next_cmp;
+  BCM2835_REG(BCM2835_GPU_TIMER_CS) = BCM2835_GPU_TIMER_CS_M3;
+
+  raspberrypi_tc.tc_get_timecount = raspberrypi_clock_get_timecount;
+  raspberrypi_tc.tc_counter_mask = 0xffffffff;
+  raspberrypi_tc.tc_frequency = 1000000; /* 1 MHz */
+  raspberrypi_tc.tc_quality = RTEMS_TIMECOUNTER_QUALITY_CLOCK_DRIVER;
+  rtems_timecounter_install(&raspberrypi_tc);
+}
+
+static void raspberrypi_clock_cleanup(void)
+{
+  bsp_interrupt_vector_disable(BCM2835_IRQ_ID_GPU_TIMER_M3);
+}
+
+#define Clock_driver_support_at_tick() raspberrypi_clock_at_tick()
+
+#define Clock_driver_support_initialize_hardware() raspberrypi_clock_initialize_hardware()
+
+#define Clock_driver_support_shutdown_hardware() raspberrypi_clock_cleanup()
+
+#define Clock_driver_support_install_isr(clock_isr) \
+  raspberrypi_clock_handler_install_isr(clock_isr)
+
+#define CLOCK_DRIVER_USE_ONLY_BOOT_PROCESSOR 1
+
+#include "../../../shared/dev/clock/clockimpl.h"
Index: bsps/arm/rtl22xx/clock/clockdrv.c
===================================================================
--- bsps/arm/rtl22xx/clock/clockdrv.c	(revision 7632906fc290b652416ab59eb5fb49356c064ed6)
+++ bsps/arm/rtl22xx/clock/clockdrv.c	(revision 7632906fc290b652416ab59eb5fb49356c064ed6)
@@ -0,0 +1,177 @@
+/*
+ *  LPC22XX/LPC21xx clock specific using the System Timer
+ *
+ *  Set the Time0 to generate click for RTEMS
+ */
+
+/*
+ *  Copyright (c) 2006 by Ray <rayx.cn@gmail.com>
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+#include <bsp/irq.h>
+#include <lpc22xx.h>
+#include <rtems/bspIo.h>  /* for printk */
+#include <rtems/timecounter.h>
+
+void Clock_isr(rtems_irq_hdl_param arg);
+static void clock_isr_on(const rtems_irq_connect_data *unused);
+static void clock_isr_off(const rtems_irq_connect_data *unused);
+static int clock_isr_is_on(const rtems_irq_connect_data *irq);
+
+static rtems_timecounter_simple lpc22xx_tc;
+
+static uint32_t lpc22xx_tc_get(rtems_timecounter_simple *tc)
+{
+  return T0TC;
+}
+
+static bool lpc22xx_tc_is_pending(rtems_timecounter_simple *tc)
+{
+  return (T0IR & 0x1) != 0;
+}
+
+static uint32_t lpc22xx_tc_get_timecount(struct timecounter *tc)
+{
+  return rtems_timecounter_simple_upcounter_get(
+    tc,
+    lpc22xx_tc_get,
+    lpc22xx_tc_is_pending
+  );
+}
+
+/**
+ * When we get the clock interrupt
+ *    - clear the interrupt bit?
+ *    - restart the timer?
+ */
+static void lpc22xx_tc_at_tick(rtems_timecounter_simple *tc)
+{
+  if (!(T0IR & 0x01))
+    return;
+  T0IR = 0x01;
+  VICVectAddr = 0x00;
+}
+
+static void lpc22xx_tc_tick(void)
+{
+  rtems_timecounter_simple_upcounter_tick(
+    &lpc22xx_tc,
+    lpc22xx_tc_get,
+    lpc22xx_tc_at_tick
+  );
+}
+
+/* Replace the first value with the clock's interrupt name. */
+rtems_irq_connect_data clock_isr_data = {
+  .name   = LPC22xx_INTERRUPT_TIMER0,
+  .hdl    = Clock_isr,
+  .handle = NULL,
+  .on     = clock_isr_on,
+  .off    = clock_isr_off,
+  .isOn   = clock_isr_is_on,
+};
+
+/* use the /shared/dev/clock/clockimpl.h code template */
+
+/**
+ * Installs the clock ISR. You shouldn't need to change this.
+ */
+#define Clock_driver_support_install_isr( _new ) \
+  BSP_install_rtems_irq_handler(&clock_isr_data)
+
+/**
+ * Initialize the hardware for the clock
+ *   - Set the frequency
+ *   - enable it
+ *   - clear any pending interrupts
+ *
+ * Since you may want the clock always running, you can
+ * enable interrupts here. If you do so, the clock_isr_on(),
+ * clock_isr_off(), and clock_isr_is_on() functions can be
+ * NOPs.
+ * 
+ * set timer to generate interrupt every
+ * rtems_configuration_get_microseconds_per_tick()
+ *     MR0/(LPC22xx_Fpclk/(PR0+1)) = 10/1000 = 0.01s
+ */
+#define Clock_driver_support_initialize_hardware() \
+  do { \
+    /* disable and clear timer 0, set to  */ \
+    T0TCR &= 0;                              \
+    /* TC is incremented on every pclk.*/    \
+    T0PC   = 0;                              \
+    /* initialize the timer period and prescaler */  \
+    T0MR0  = ((LPC22xx_Fpclk/1000 *          \
+             rtems_configuration_get_microseconds_per_tick()) / 1000); \
+    /* generate interrupt when T0MR0 match T0TC and Reset Timer Count*/ \
+    T0MCR |= 0x03;          \
+    /* No external match */ \
+    T0EMR = 0;              \
+    /* enable timer0 */     \
+    T0TCR = 1;              \
+    /* enable interrupt, skyeye will check this*/ \
+    T0IR |= 0x01; \
+    /* install timecounter */ \
+    rtems_timecounter_simple_install( \
+      &lpc22xx_tc, \
+      LPC22xx_Fpclk, \
+      T0MR0, \
+      lpc22xx_tc_get_timecount \
+    ); \
+  } while (0)
+
+/**
+ * Do whatever you need to shut the clock down and remove the
+ * interrupt handler. Since this normally only gets called on
+ * RTEMS shutdown, you may not need to do anything other than
+ * remove the ISR.
+ */
+#define Clock_driver_support_shutdown_hardware()                        \
+  do {                                                                  \
+    /* Disable timer */ \
+    T0TCR&=~0x02; \
+    BSP_remove_rtems_irq_handler(&clock_isr_data);                  \
+  } while (0)
+
+/**
+ * Enables clock interrupt.
+ *
+ * If the interrupt is always on, this can be a NOP.
+ */
+static void clock_isr_on(const rtems_irq_connect_data *unused)
+{
+  T0IR&=0x01;
+}
+
+/**
+ * Disables clock interrupts
+ *
+ * If the interrupt is always on, this can be a NOP.
+ */
+static void clock_isr_off(const rtems_irq_connect_data *unused)
+{
+  T0IR=0x00;
+}
+
+/**
+ * Tests to see if clock interrupt is enabled, and returns 1 if so.
+ * If interrupt is not enabled, returns 0.
+ *
+ * If the interrupt is always on, this always returns 1.
+ */
+static int clock_isr_is_on(const rtems_irq_connect_data *irq)
+{
+  return T0IR & 0x01;  /* MR0 mask */
+}
+
+#define Clock_driver_timecounter_tick() lpc22xx_tc_tick()
+
+/* Make sure to include this, and only at the end of the file */
+#include "../../../shared/dev/clock/clockimpl.h"
+
Index: bsps/arm/shared/clock/clock-armv7m.c
===================================================================
--- bsps/arm/shared/clock/clock-armv7m.c	(revision 7632906fc290b652416ab59eb5fb49356c064ed6)
+++ bsps/arm/shared/clock/clock-armv7m.c	(revision 7632906fc290b652416ab59eb5fb49356c064ed6)
@@ -0,0 +1,159 @@
+/*
+ * Copyright (c) 2011-2012 Sebastian Huber.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Obere Lagerstr. 30
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#include <rtems.h>
+#include <rtems/timecounter.h>
+#include <rtems/score/armv7m.h>
+
+#include <bsp.h>
+
+#ifdef ARM_MULTILIB_ARCH_V7M
+
+/* This is defined in dev/clock/clockimpl.h */
+static void Clock_isr(void *arg);
+
+typedef struct {
+  rtems_timecounter_simple base;
+  void (*tick)(void);
+  bool countflag;
+} ARMV7M_Timecounter;
+
+static ARMV7M_Timecounter _ARMV7M_TC;
+
+static uint32_t _ARMV7M_TC_systick_get(rtems_timecounter_simple *tc)
+{
+  volatile ARMV7M_Systick *systick = _ARMV7M_Systick;
+
+  return systick->cvr;
+}
+
+static bool _ARMV7M_TC_systick_is_pending(rtems_timecounter_simple *base)
+{
+  ARMV7M_Timecounter *tc = (ARMV7M_Timecounter *) base;
+  rtems_interrupt_level level;
+  bool countflag;
+
+  rtems_interrupt_disable(level);
+
+  countflag = tc->countflag;
+  if (!countflag) {
+    volatile ARMV7M_Systick *systick = _ARMV7M_Systick;
+
+    countflag = ((systick->csr & ARMV7M_SYSTICK_CSR_COUNTFLAG) != 0);
+    tc->countflag = countflag;
+  }
+
+  rtems_interrupt_enable(level);
+
+  return countflag;
+}
+
+static uint32_t _ARMV7M_TC_systick_get_timecount(struct timecounter *tc)
+{
+  return rtems_timecounter_simple_downcounter_get(
+    tc,
+    _ARMV7M_TC_systick_get,
+    _ARMV7M_TC_systick_is_pending
+  );
+}
+
+static void _ARMV7M_TC_systick_at_tick(rtems_timecounter_simple *base)
+{
+  ARMV7M_Timecounter *tc = (ARMV7M_Timecounter *) base;
+  volatile ARMV7M_Systick *systick = _ARMV7M_Systick;
+
+  tc->countflag = false;
+
+  /* Clear COUNTFLAG */
+  systick->csr;
+}
+
+static void _ARMV7M_TC_systick_tick(void)
+{
+  rtems_timecounter_simple_downcounter_tick(
+    &_ARMV7M_TC.base,
+    _ARMV7M_TC_systick_get,
+    _ARMV7M_TC_systick_at_tick
+  );
+}
+
+static void _ARMV7M_TC_tick(void)
+{
+  (*_ARMV7M_TC.tick)();
+}
+
+static void _ARMV7M_Systick_handler(void)
+{
+  _ARMV7M_Interrupt_service_enter();
+  Clock_isr(NULL);
+  _ARMV7M_Interrupt_service_leave();
+}
+
+static void _ARMV7M_Systick_handler_install(void)
+{
+  _ARMV7M_Set_exception_priority_and_handler(
+    ARMV7M_VECTOR_SYSTICK,
+    BSP_ARMV7M_SYSTICK_PRIORITY,
+    _ARMV7M_Systick_handler
+  );
+}
+
+static void _ARMV7M_Systick_initialize(void)
+{
+  volatile ARMV7M_Systick *systick = _ARMV7M_Systick;
+  #ifdef BSP_ARMV7M_SYSTICK_FREQUENCY
+    uint64_t freq = BSP_ARMV7M_SYSTICK_FREQUENCY;
+  #else
+    uint64_t freq = ARMV7M_SYSTICK_CALIB_TENMS_GET(systick->calib) * 100ULL;
+  #endif
+  uint64_t us_per_tick = rtems_configuration_get_microseconds_per_tick();
+  uint64_t interval = (freq * us_per_tick) / 1000000ULL;
+
+  systick->rvr = (uint32_t) interval;
+  systick->cvr = 0;
+  systick->csr = ARMV7M_SYSTICK_CSR_ENABLE
+    | ARMV7M_SYSTICK_CSR_TICKINT
+    | ARMV7M_SYSTICK_CSR_CLKSOURCE;
+
+  _ARMV7M_TC.tick = _ARMV7M_TC_systick_tick;
+  rtems_timecounter_simple_install(
+    &_ARMV7M_TC.base,
+    freq,
+    interval,
+    _ARMV7M_TC_systick_get_timecount
+  );
+}
+
+static void _ARMV7M_Systick_cleanup(void)
+{
+  volatile ARMV7M_Systick *systick = _ARMV7M_Systick;
+
+  systick->csr = 0;
+}
+
+#define Clock_driver_timecounter_tick() _ARMV7M_TC_tick()
+
+#define Clock_driver_support_initialize_hardware() \
+  _ARMV7M_Systick_initialize()
+
+#define Clock_driver_support_install_isr(isr) \
+  _ARMV7M_Systick_handler_install()
+
+#define Clock_driver_support_shutdown_hardware() \
+  _ARMV7M_Systick_cleanup()
+
+/* Include shared source clock driver code */
+#include "../../../shared/dev/clock/clockimpl.h"
+
+#endif /* ARM_MULTILIB_ARCH_V7M */
Index: bsps/arm/shared/clock/clock-nxp-lpc.c
===================================================================
--- bsps/arm/shared/clock/clock-nxp-lpc.c	(revision 7632906fc290b652416ab59eb5fb49356c064ed6)
+++ bsps/arm/shared/clock/clock-nxp-lpc.c	(revision 7632906fc290b652416ab59eb5fb49356c064ed6)
@@ -0,0 +1,136 @@
+/**
+ * @file
+ *
+ * @ingroup lpc_clock
+ *
+ * @brief Clock driver configuration.
+ */
+
+/*
+ * Copyright (c) 2009-2015 embedded brains GmbH.  All rights reserved.
+ *
+ *  embedded brains GmbH
+ *  Dornierstr. 4
+ *  82178 Puchheim
+ *  Germany
+ *  <rtems@embedded-brains.de>
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#include <rtems.h>
+#include <rtems/timecounter.h>
+
+#include <bsp/lpc-clock-config.h>
+#include <bsp/lpc-timer.h>
+
+#ifdef ARM_MULTILIB_ARCH_V4
+
+/* This is defined in ../../../shared/dev/clock/clockimpl.h */
+void Clock_isr(rtems_irq_hdl_param arg);
+
+static volatile lpc_timer *const lpc_clock =
+  (volatile lpc_timer *) LPC_CLOCK_TIMER_BASE;
+
+static volatile lpc_timer *const lpc_timecounter =
+  (volatile lpc_timer *) LPC_CLOCK_TIMECOUNTER_BASE;
+
+static struct timecounter lpc_clock_tc;
+
+static uint32_t lpc_clock_tc_get_timecount(struct timecounter *tc)
+{
+  return lpc_timecounter->tc;
+}
+
+static void lpc_clock_at_tick(void)
+{
+  lpc_clock->ir = LPC_TIMER_IR_MR0;
+}
+
+static void lpc_clock_handler_install(void)
+{
+  rtems_status_code sc = RTEMS_SUCCESSFUL;
+
+  sc = rtems_interrupt_handler_install(
+    LPC_CLOCK_INTERRUPT,
+    "Clock",
+    RTEMS_INTERRUPT_UNIQUE,
+    (rtems_interrupt_handler) Clock_isr,
+    NULL
+  );
+  if (sc != RTEMS_SUCCESSFUL) {
+    rtems_fatal_error_occurred(0xdeadbeef);
+  }
+}
+
+static void lpc_clock_initialize(void)
+{
+  uint64_t interval = ((uint64_t) LPC_CLOCK_REFERENCE
+    * (uint64_t) rtems_configuration_get_microseconds_per_tick()) / 1000000;
+
+  /* Enable module */
+  LPC_CLOCK_MODULE_ENABLE();
+
+  /* Reset timer */
+  lpc_clock->tcr = LPC_TIMER_TCR_RST;
+
+  /* Clear interrupt flags */
+  lpc_clock->ir = LPC_TIMER_IR_ALL;
+
+  /* Set timer mode */
+  lpc_clock->ccr = 0;
+
+  /* Timer is incremented every PERIPH_CLK tick */
+  lpc_clock->pr = 0;
+
+  /* Set match registers */
+  lpc_clock->mr0 = (uint32_t) interval;
+
+  /* Generate interrupt and reset counter on match with MR0 */
+  lpc_clock->mcr = LPC_TIMER_MCR_MR0_INTR | LPC_TIMER_MCR_MR0_RST;
+
+  /* No external match */
+  lpc_clock->emr = 0x0;
+
+  /* Enable timer */
+  lpc_clock->tcr = LPC_TIMER_TCR_EN;
+
+  /* Install timecounter */
+  lpc_clock_tc.tc_get_timecount = lpc_clock_tc_get_timecount;
+  lpc_clock_tc.tc_counter_mask = 0xffffffff;
+  lpc_clock_tc.tc_frequency = LPC_CLOCK_REFERENCE;
+  lpc_clock_tc.tc_quality = RTEMS_TIMECOUNTER_QUALITY_CLOCK_DRIVER;
+  rtems_timecounter_install(&lpc_clock_tc);
+}
+
+static void lpc_clock_cleanup(void)
+{
+  rtems_status_code sc = RTEMS_SUCCESSFUL;
+
+  /* Disable timer */
+  lpc_clock->tcr = 0x0;
+
+  /* Remove interrupt handler */
+  sc = rtems_interrupt_handler_remove(
+    LPC_CLOCK_INTERRUPT,
+    (rtems_interrupt_handler) Clock_isr,
+    NULL
+  );
+  if (sc != RTEMS_SUCCESSFUL) {
+    rtems_fatal_error_occurred(0xdeadbeef);
+  }
+}
+
+#define Clock_driver_support_at_tick() lpc_clock_at_tick()
+#define Clock_driver_support_initialize_hardware() lpc_clock_initialize()
+#define Clock_driver_support_install_isr(isr) \
+  lpc_clock_handler_install()
+
+#define Clock_driver_support_shutdown_hardware() lpc_clock_cleanup()
+
+/* Include shared source clock driver code */
+#include "../../../shared/dev/clock/clockimpl.h"
+
+#endif /* ARM_MULTILIB_ARCH_V4 */
Index: bsps/arm/smdk2410/clock/clockdrv.c
===================================================================
--- bsps/arm/smdk2410/clock/clockdrv.c	(revision 7632906fc290b652416ab59eb5fb49356c064ed6)
+++ bsps/arm/smdk2410/clock/clockdrv.c	(revision 7632906fc290b652416ab59eb5fb49356c064ed6)
@@ -0,0 +1,123 @@
+/*
+ *  S3C2400 clock specific using the System Timer
+ */
+
+/*
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.org/license/LICENSE.
+ */
+
+#include <rtems.h>
+#include <bsp/irq.h>
+#include <bsp.h>
+#include <s3c24xx.h>
+
+void Clock_isr(rtems_irq_hdl_param arg);
+static void clock_isr_on(const rtems_irq_connect_data *unused);
+static void clock_isr_off(const rtems_irq_connect_data *unused);
+static int clock_isr_is_on(const rtems_irq_connect_data *irq);
+
+rtems_irq_connect_data clock_isr_data = {
+  .name   = BSP_INT_TIMER4,
+  .hdl    = Clock_isr,
+  .handle = NULL,
+  .on     = clock_isr_on,
+  .off    = clock_isr_off,
+  .isOn   = clock_isr_is_on,
+};
+
+/**
+ * When we get the clock interrupt
+ *    - clear the interrupt bit?
+ *    - restart the timer?
+ */
+#define Clock_driver_support_at_tick()                \
+  do {                                                \
+        ClearPending(BIT_TIMER4);                     \
+  } while(0)
+
+
+/**
+ * Installs the clock ISR. You shouldn't need to change this.
+ */
+#define Clock_driver_support_install_isr( _new ) \
+  BSP_install_rtems_irq_handler(&clock_isr_data)
+
+
+/**
+ * Initialize the hardware for the clock
+ *   - Set the frequency
+ *   - enable it
+ *   - clear any pending interrupts
+ *
+ * Since you may want the clock always running, you can
+ * enable interrupts here. If you do so, the clock_isr_on(),
+ * clock_isr_off(), and clock_isr_is_on() functions can be
+ * NOPs.
+ */
+#define Clock_driver_support_initialize_hardware() \
+  do { \
+        uint32_t cr; \
+        uint32_t freq; \
+        /* set MUX for Timer4 to 1/16 */ \
+        cr=rTCFG1 & 0xFFF0FFFF; \
+        rTCFG1=(cr | (3<<16)); \
+        freq = get_PCLK(); \
+        /* set TIMER4 counter, input freq=PLCK/16/16Mhz*/ \
+        freq = (freq /16)/16; \
+        rTCNTB4 = ((freq / 1000) * rtems_configuration_get_microseconds_per_tick()) / 1000; \
+        /*unmask TIMER4 irq*/ \
+        rINTMSK&=~BIT_TIMER4; \
+        /* start TIMER4 with autoreload */ \
+        cr=rTCON & 0xFF8FFFFF; \
+        rTCON=(cr|(0x6<<20)); \
+        rTCON=(cr|(0x5<<20)); \
+    } while (0)
+
+/**
+ * Do whatever you need to shut the clock down and remove the
+ * interrupt handler. Since this normally only gets called on
+ * RTEMS shutdown, you may not need to do anything other than
+ * remove the ISR.
+ */
+#define Clock_driver_support_shutdown_hardware()                        \
+  do {                                                                  \
+        /* Disable timer */ \
+        BSP_remove_rtems_irq_handler(&clock_isr_data);                  \
+     } while (0)
+
+/**
+ * Enables clock interrupt.
+ *
+ * If the interrupt is always on, this can be a NOP.
+ */
+static void clock_isr_on(const rtems_irq_connect_data *unused)
+{
+}
+
+/**
+ * Disables clock interrupts
+ *
+ * If the interrupt is always on, this can be a NOP.
+ */
+static void clock_isr_off(const rtems_irq_connect_data *unused)
+{
+    return;
+}
+
+/**
+ * Tests to see if clock interrupt is enabled, and returns 1 if so.
+ * If interrupt is not enabled, returns 0.
+ *
+ * If the interrupt is always on, this always returns 1.
+ */
+static int clock_isr_is_on(const rtems_irq_connect_data *irq)
+{
+  return 1;
+}
+
+#define CLOCK_DRIVER_USE_DUMMY_TIMECOUNTER
+
+/* Make sure to include this, and only at the end of the file */
+#include "../../../shared/dev/clock/clockimpl.h"
Index: bsps/arm/smdk2410/clock/support.c
===================================================================
--- bsps/arm/smdk2410/clock/support.c	(revision 7632906fc290b652416ab59eb5fb49356c064ed6)
+++ bsps/arm/smdk2410/clock/support.c	(revision 7632906fc290b652416ab59eb5fb49356c064ed6)
@@ -0,0 +1,57 @@
+#include <rtems.h>
+#include <bsp.h>
+#include <s3c24xx.h>
+
+/* ------------------------------------------------------------------------- */
+/* NOTE: This describes the proper use of this file.
+ *
+ * BSP_OSC_FREQ should be defined as the input frequency of the PLL.
+ *
+ * get_FCLK(), get_HCLK(), get_PCLK() and get_UCLK() return the clock of
+ * the specified bus in HZ.
+ */
+/* ------------------------------------------------------------------------- */
+
+/* return FCLK frequency */
+uint32_t get_FCLK(void)
+{
+    uint32_t r, m, p, s;
+
+    r = rMPLLCON;
+    m = ((r & 0xFF000) >> 12) + 8;
+    p = ((r & 0x003F0) >> 4) + 2;
+    s = r & 0x3;
+
+    return((BSP_OSC_FREQ * m) / (p << s));
+}
+
+/* return UCLK frequency */
+uint32_t get_UCLK(void)
+{
+    uint32_t r, m, p, s;
+
+    r = rUPLLCON;
+    m = ((r & 0xFF000) >> 12) + 8;
+    p = ((r & 0x003F0) >> 4) + 2;
+    s = r & 0x3;
+
+    return((BSP_OSC_FREQ * m) / (p << s));
+}
+
+/* return HCLK frequency */
+uint32_t get_HCLK(void)
+{
+    if (rCLKDIVN & 0x2)
+	return get_FCLK()/2;
+    else
+	return get_FCLK();
+}
+
+/* return PCLK frequency */
+uint32_t get_PCLK(void)
+{
+    if (rCLKDIVN & 0x1)
+	return get_HCLK()/2;
+    else
+	return get_HCLK();
+}
Index: bsps/arm/tms570/clock/clock.c
===================================================================
--- bsps/arm/tms570/clock/clock.c	(revision 7632906fc290b652416ab59eb5fb49356c064ed6)
+++ bsps/arm/tms570/clock/clock.c	(revision 7632906fc290b652416ab59eb5fb49356c064ed6)
@@ -0,0 +1,190 @@
+/**
+ * @file clock.c
+ *
+ * @ingroup tms570
+ *
+ * @brief clock functions definitions.
+ */
+
+/*
+ * Copyright (c) 2014 Premysl Houdek <kom541000@gmail.com>
+ *
+ * Google Summer of Code 2014 at
+ * Czech Technical University in Prague
+ * Zikova 1903/4
+ * 166 36 Praha 6
+ * Czech Republic
+ *
+ * Based on LPC24xx and LPC1768 BSP
+ * by embedded brains GmbH and others
+ *
+ * The license and distribution terms for this file may be
+ * found in the file LICENSE in this distribution or at
+ * http://www.rtems.org/license/LICENSE.
+ */
+
+#include <stdlib.h>
+
+#include <rtems.h>
+#include <bsp.h>
+#include <bsp/irq.h>
+#include <bsp/tms570-rti.h>
+#include <rtems/timecounter.h>
+
+static struct timecounter tms570_rti_tc;
+
+static uint32_t tms570_rti_get_timecount(struct timecounter *tc)
+{
+  return TMS570_RTI.CNT[0].FRCx;
+}
+
+#ifndef TMS570_PREFERRED_TC_FREQUENCY
+/*
+ * Define preferred main time base counter frequency
+ * The value of 1MHz is the best matching RTEMS
+ * timing system because then there is no need
+ * to scale RTEMS configuration microseconds_per_tick
+ * parameter
+ */
+#define TMS570_PREFERRED_TC_FREQUENCY 1000000
+#endif /* TMS570_PREFERRED_TC_FREQUENCY */
+
+/**
+ *  @brief Initialize the HW peripheral for clock driver
+ *
+ *  Clock driver is implemented by RTI module
+ *
+ * @retval Void
+ */
+static void tms570_clock_driver_support_initialize_hardware( void )
+{
+
+  uint32_t microsec_per_tick;
+  uint32_t tc_frequency;
+  uint32_t tc_prescaler;
+  uint32_t tc_increments_per_tick;
+
+  microsec_per_tick = rtems_configuration_get_microseconds_per_tick();
+  tc_frequency = TMS570_PREFERRED_TC_FREQUENCY;
+
+  tc_prescaler = (BSP_PLL_OUT_CLOCK + tc_frequency) / (tc_frequency * 2);
+
+  /* Recompute actual most close frequency which can be realized */
+  tc_frequency = (BSP_PLL_OUT_CLOCK + tc_prescaler) / (tc_prescaler * 2);
+
+  /*
+   * Recompute tick period to adjust for configurable or exact
+   * preferred time base 1 usec resolution.
+   */
+  tc_increments_per_tick = ((uint64_t)microsec_per_tick * tc_frequency +
+                           500000) / 1000000;
+
+  /* Hardware specific initialize */
+  TMS570_RTI.GCTRL = 0;
+  TMS570_RTI.CNT[0].CPUCx = tc_prescaler - 1;
+  TMS570_RTI.TBCTRL = TMS570_RTI_TBCTRL_INC;
+  TMS570_RTI.CAPCTRL = 0;
+  TMS570_RTI.COMPCTRL = 0;
+  /* set counter to zero */
+  TMS570_RTI.CNT[0].UCx = 0;
+  TMS570_RTI.CNT[0].FRCx = 0;
+  /* clear interrupts*/
+  TMS570_RTI.CLEARINTENA = TMS570_RTI_CLEARINTENA_CLEAROVL1INT |
+                           TMS570_RTI_CLEARINTENA_CLEAROVL0INT |
+                           TMS570_RTI_CLEARINTENA_CLEARTBINT |
+                           TMS570_RTI_CLEARINTENA_CLEARDMA3 |
+                           TMS570_RTI_CLEARINTENA_CLEARDMA2 |
+                           TMS570_RTI_CLEARINTENA_CLEARDMA1 |
+                           TMS570_RTI_CLEARINTENA_CLEARDMA0 |
+                           TMS570_RTI_CLEARINTENA_CLEARINT3 |
+                           TMS570_RTI_CLEARINTENA_CLEARINT2 |
+                           TMS570_RTI_CLEARINTENA_CLEARINT1 |
+                           TMS570_RTI_CLEARINTENA_CLEARINT0;
+  TMS570_RTI.INTFLAG = TMS570_RTI_INTFLAG_OVL1INT |
+                       TMS570_RTI_INTFLAG_OVL0INT |
+                       TMS570_RTI_INTFLAG_TBINT |
+                       TMS570_RTI_INTFLAG_INT3 |
+                       TMS570_RTI_INTFLAG_INT2 |
+                       TMS570_RTI_INTFLAG_INT1 |
+                       TMS570_RTI_INTFLAG_INT0;
+  /* set timer */
+  TMS570_RTI.CMP[0].COMPx = TMS570_RTI.CNT[0].FRCx + tc_increments_per_tick;
+  TMS570_RTI.COMP0CLR = TMS570_RTI.CMP[0].COMPx + tc_increments_per_tick / 2;
+  TMS570_RTI.CMP[0].UDCPx = tc_increments_per_tick;
+  /* enable interupt */
+  TMS570_RTI.SETINTENA = TMS570_RTI_SETINTENA_SETINT0;
+  /* enable timer */
+  TMS570_RTI.GCTRL = TMS570_RTI_GCTRL_CNT0EN;
+  /* set timecounter */
+  tms570_rti_tc.tc_get_timecount = tms570_rti_get_timecount;
+  tms570_rti_tc.tc_counter_mask = 0xffffffff;
+  tms570_rti_tc.tc_frequency = tc_frequency;
+  tms570_rti_tc.tc_quality = RTEMS_TIMECOUNTER_QUALITY_CLOCK_DRIVER;
+  rtems_timecounter_install(&tms570_rti_tc);
+}
+
+/**
+ * @brief Clears interrupt source
+ *
+ * @retval Void
+ */
+static void tms570_clock_driver_support_at_tick( void )
+{
+  TMS570_RTI.INTFLAG = TMS570_RTI_INTFLAG_INT0;
+}
+
+/**
+ * @brief registers RTI interrupt handler
+ *
+ * @param[in] Clock_isr new ISR handler
+ * @param[in] Old_ticker old ISR handler (unused and type broken)
+ *
+ * @retval Void
+ */
+static void tms570_clock_driver_support_install_isr(
+  rtems_isr_entry Clock_isr
+)
+{
+  rtems_status_code sc = RTEMS_SUCCESSFUL;
+
+  sc = rtems_interrupt_handler_install(
+    TMS570_IRQ_TIMER_0,
+    "Clock",
+    RTEMS_INTERRUPT_UNIQUE,
+    (rtems_interrupt_handler) Clock_isr,
+    NULL
+  );
+  if ( sc != RTEMS_SUCCESSFUL ) {
+    rtems_fatal_error_occurred(0xdeadbeef);
+  }
+}
+
+/**
+ * @brief disables RTI interrupt
+ *
+ * Called when closing clock driver
+ *
+ * @retval Void
+ */
+static void tms570_clock_driver_support_shutdown_hardware( void )
+{
+  /* turn off the timer interrupts */
+  TMS570_RTI.CLEARINTENA = TMS570_RTI_CLEARINTENA_CLEAROVL0INT |
+                           TMS570_RTI_CLEARINTENA_CLEARINT0;  
+}
+
+#define Clock_driver_support_initialize_hardware \
+                        tms570_clock_driver_support_initialize_hardware
+#define Clock_driver_support_at_tick \
+                        tms570_clock_driver_support_at_tick
+#define Clock_driver_support_initialize_hardware \
+                        tms570_clock_driver_support_initialize_hardware
+#define Clock_driver_support_shutdown_hardware \
+                        tms570_clock_driver_support_shutdown_hardware
+
+#define Clock_driver_support_install_isr(Clock_isr) \
+              tms570_clock_driver_support_install_isr( Clock_isr )
+
+void Clock_isr(void *arg); /* to supress warning */
+
+#include "../../../shared/dev/clock/clockimpl.h"
