Changeset 75f09e5 in rtems for c/src/exec/score/cpu/sparc
- Timestamp:
- 02/21/96 14:43:34 (28 years ago)
- Branches:
- 4.10, 4.11, 4.8, 4.9, 5, master
- Children:
- adf98bd
- Parents:
- c4b8161d
- Location:
- c/src/exec/score/cpu/sparc
- Files:
-
- 2 edited
Legend:
- Unmodified
- Added
- Removed
-
c/src/exec/score/cpu/sparc/cpu.c
rc4b8161d r75f09e5 377 377 /*PAGE 378 378 * 379 * _CPU_ Internal_threads_Idle_thread_body379 * _CPU_Thread_Idle_body 380 380 * 381 381 * Some SPARC implementations have low power, sleep, or idle modes. This … … 393 393 #if defined(erc32) 394 394 395 void _CPU_ Internal_threads_Idle_thread_body( void )395 void _CPU_Thread_Idle_body( void ) 396 396 { 397 397 while (1) { -
c/src/exec/score/cpu/sparc/cpu.h
rc4b8161d r75f09e5 146 146 * Does this port provide a CPU dependent IDLE task implementation? 147 147 * 148 * If TRUE, then the routine _CPU_ Internal_threads_Idle_thread_body148 * If TRUE, then the routine _CPU_Thread_Idle_body 149 149 * must be provided and is the default IDLE thread body instead of 150 * _ Internal_threads_Idle_thread_body.150 * _CPU_Thread_Idle_body. 151 151 * 152 152 * If FALSE, then use the generic IDLE thread body if the BSP does … … 508 508 boolean do_zero_of_workspace; 509 509 unsigned32 interrupt_stack_size; 510 unsigned32 extra_ system_initialization_stack;510 unsigned32 extra_mpci_receive_server_stack; 511 511 } rtems_cpu_table; 512 512 … … 602 602 /* 603 603 * Amount of extra stack (above minimum stack size) required by 604 * system initializationthread. Remember that in a multiprocessor605 * system th e system intialization thread becomes the MP server thread.606 */ 607 608 #define CPU_ SYSTEM_INITIALIZATION_THREAD_EXTRA_STACK 1024604 * MPCI receive server thread. Remember that in a multiprocessor 605 * system this thread must exist and be able to process all directives. 606 */ 607 608 #define CPU_MPCI_RECEIVE_SERVER_EXTRA_STACK 1024 609 609 610 610 /* … … 899 899 900 900 /* 901 * _CPU_ Internal_threads_Idle_thread_body901 * _CPU_Thread_Idle_body 902 902 * 903 903 * Some SPARC implementations have low power, sleep, or idle modes. This … … 905 905 */ 906 906 907 void _CPU_ Internal_threads_Idle_thread_body( void );907 void _CPU_Thread_Idle_body( void ); 908 908 909 909 #endif /* CPU_PROVIDES_IDLE_THREAD_BODY */
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