Changeset 75da3f5 in rtems


Ignore:
Timestamp:
Aug 16, 2008, 4:06:34 AM (11 years ago)
Author:
Ralf Corsepius <ralf.corsepius@…>
Branches:
4.10, 4.11, 4.9, master
Children:
e4cdd302
Parents:
18001dc8
Message:

Cosmetic indentation fixes.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • cpukit/score/cpu/powerpc/rtems/powerpc/registers.h

    r18001dc8 r75da3f5  
    337337{ asm volatile ("mtmsr %0" : "=&r" ((_msr_value)) : "0" ((_msr_value))); }
    338338
    339 static inline void ppc_interrupt_set_disable_mask( uint32_t mask)
     339static inline void ppc_interrupt_set_disable_mask( uint32_t mask )
    340340{
    341341  asm volatile (
     
    346346}
    347347
    348 static inline uint32_t ppc_interrupt_get_disable_mask( void)
     348static inline uint32_t ppc_interrupt_get_disable_mask( void )
    349349{
    350350  uint32_t mask;
     
    358358}
    359359
    360 static inline uint32_t ppc_interrupt_disable( void)
     360static inline uint32_t ppc_interrupt_disable( void )
    361361{
    362362  uint32_t level;
     
    374374}
    375375
    376 static inline void ppc_interrupt_enable( uint32_t level)
     376static inline void ppc_interrupt_enable( uint32_t level )
    377377{
    378378  asm volatile (
     
    383383}
    384384
    385 static inline void ppc_interrupt_flash( uint32_t level)
     385static inline void ppc_interrupt_flash( uint32_t level )
    386386{
    387387  uint32_t current_level;
     
    408408
    409409#define _CPU_ISR_Enable( _isr_cookie )  \
    410   ppc_interrupt_enable( _isr_cookie)
     410  ppc_interrupt_enable(_isr_cookie)
    411411
    412412/*
     
    422422
    423423#define _CPU_ISR_Flash( _isr_cookie ) \
    424   ppc_interrupt_flash( _isr_cookie)
     424  ppc_interrupt_flash(_isr_cookie)
    425425
    426426/* end of ISR handler macros */
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