Index: c/src/lib/libbsp/i386/i386ex/clock/ckinit.c
===================================================================
--- c/src/lib/libbsp/i386/i386ex/clock/ckinit.c	(revision 752cd8fb98f1c65b9f482bdbebeef0bd14d98856)
+++ c/src/lib/libbsp/i386/i386ex/clock/ckinit.c	(revision 752cd8fb98f1c65b9f482bdbebeef0bd14d98856)
@@ -0,0 +1,93 @@
+/*  Clock_initialize
+ *
+ *  This routine initializes the Timer/Counter on the Intel
+ *  386ex evaluation board.
+ *
+ *  The tick frequency is 1 millisecond.
+ *
+ *  Input parameters:  NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <bsp.h>
+#include <clockdrv.h>
+#include <stdlib.h>
+
+volatile rtems_unsigned32 Clock_driver_ticks;
+rtems_unsigned32 Clock_isrs;              /* ISRs until next tick */
+rtems_isr_entry  Old_ticker;
+
+rtems_device_driver Clock_initialize(
+  rtems_device_major_number major,
+  rtems_device_minor_number minor,
+  void *pargp,
+  rtems_id tid,
+  rtems_unsigned32 *rval
+)
+{
+  Install_clock( Clock_isr );
+}
+
+void ReInstall_clock(
+  rtems_isr_entry clock_isr
+)
+{
+  rtems_unsigned32 isrlevel = 0;
+
+  rtems_interrupt_disable( isrlevel );
+   (void) set_vector( clock_isr, 0x20, 1 ); /* was 0x38 */
+  rtems_interrupt_enable( isrlevel );
+}
+
+void Install_clock(
+  rtems_isr_entry clock_isr
+)
+{
+  Clock_driver_ticks = 0;
+  Clock_isrs = BSP_Configuration.microseconds_per_tick / 1000;
+
+  if ( BSP_Configuration.ticks_per_timeslice ) {
+    Old_ticker = ( rtems_isr_entry ) set_vector( clock_isr, 0x20, 1 ); 
+                                                     /* was 0x38 */
+
+/*  The following is already set up in interns.s -> 
+    ( This is test code only... production code will move the 
+      TMRCFG stuff here )
+*/
+#define TMR0	  0xF040
+#define TMR1	  0xF041
+#define TMR2	  0xF042
+#define TMRCON	  0xF043
+#define TMRCFG    0xF834
+	
+	outport_byte	( TMRCFG , 0x80 );
+
+	outport_byte    ( TMRCON , 0x34 ); 
+	outport_byte	( TMR0   , 0xA8 ); 
+	outport_byte    ( TMR0   , 0x04 ); 
+
+	outport_byte    ( TMRCFG , 0x00 ); 
+  }
+  atexit( Clock_exit );
+}
+
+void Clock_exit( void )
+{
+  if ( BSP_Configuration.ticks_per_timeslice ) {
+/*     outport_byte( TBCR, 0x00 ); */ /* initial value */
+/*    outport_byte( IERA, 0x40 ); */ /* disable interrupt */
+/* ??? Is "do not restore old vector" causing problems? */
+  }
+}
+
Index: c/src/lib/libbsp/i386/i386ex/console/console.c
===================================================================
--- c/src/lib/libbsp/i386/i386ex/console/console.c	(revision 752cd8fb98f1c65b9f482bdbebeef0bd14d98856)
+++ c/src/lib/libbsp/i386/i386ex/console/console.c	(revision 752cd8fb98f1c65b9f482bdbebeef0bd14d98856)
@@ -0,0 +1,220 @@
+/*
+ *  This file contains the Force CPU386 console IO package.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#define F386_INIT
+
+#include <stdlib.h>
+#include <stdio.h>   /* to be removed */
+
+#include <rtems.h>
+#include "console.h"
+#include "bsp.h"
+#include "../startup/80386ex.h"
+
+/*  console_cleanup
+ *
+ *  This routine is called at exit to clean up the console hardware.
+ *
+ *  Input parameters: NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  Return values:
+ */
+
+void console_cleanup( void )
+{
+  register rtems_unsigned8 ignored;
+
+/* clear the read buffer */
+
+   inport_byte( RBR0, ignored );
+
+/*  inport_byte( RBR0, ignored );
+ *  inport_byte( RBR0, ignored );
+ *  inport_byte( RBR0, ignored );
+ *  inport_byte( RBR0, ignored );
+ */
+
+}
+
+/*  console_initialize
+ *
+ *  This routine initializes the console IO driver.
+ *
+ *  Input parameters: NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  Return values:
+ */
+
+rtems_device_driver console_initialize(
+  rtems_device_major_number  major,
+  rtems_device_minor_number  minor,
+  void                      *arg,
+  rtems_id                   self,
+  rtems_unsigned32          *status
+)
+{
+   /*
+    *  flush the console now and at exit.  Just in case.
+    */
+
+   console_cleanup();
+
+   atexit( console_cleanup );
+}
+
+
+/*  is_character_ready
+ *
+ *  This routine returns TRUE if a character is available.
+ *
+ *  Input parameters: NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  Return values:
+ */
+
+rtems_boolean is_character_ready(
+  char *ch
+)
+{
+  register rtems_unsigned8 status;
+
+  inport_byte( LSR1, status );
+
+  if ( Is_rx_ready( status ) ) {
+     inport_byte( RBR1,  status );
+     *ch = status;
+     return TRUE;
+  }
+  return FALSE;
+}
+
+/*  inbyte
+ *
+ *  This routine reads a character from the UART.
+ *
+ *  Input parameters: NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  Return values:
+ *    character read from UART
+ */
+
+char inbyte( void )
+{
+  register rtems_unsigned8 status; 
+  char                     ch;
+
+  do {
+    inport_byte( LSR1, status );
+  } while ( !( status & 0x01 ));/* s/b while ( !( Is_rx_ready( status ) ) ); */
+
+  inport_byte( RBR1, ch );
+
+  return ch;
+}
+
+/*  outbyte
+ *
+ *  This routine transmits a character out the port.  It supports
+ *  XON/XOFF flow control.
+ *
+ *  Input parameters:
+ *    ch  - character to be transmitted
+ *
+ *  Output parameters:  NONE
+ */
+
+void outbyte(
+  char ch
+)
+{
+  rtems_unsigned8 status;
+
+  do {
+    inport_byte( LSR1, status );
+  } while ( ! ( 0x40 & status ) ); /* ( Is_tx_ready( status ) ) );*/
+
+/*
+ *  GDB will NOT use XON/XOFF protocol
+ */
+
+
+#ifdef USE_XON
+  
+  while ( is_character_ready( &status ) == TRUE ) { 
+    if ( status == XOFF )
+      do {
+        while ( is_character_ready( &status ) == FALSE ) ;
+      } while ( status != XON );
+  }
+
+#endif
+
+  outport_byte( TBR1, ch );
+
+}
+
+/*
+ * __read  -- read bytes from the serial port. Ignore fd, since
+ *            we only have stdin.
+ */
+
+int __read(
+  int fd,
+  char *buf,
+  int nbytes
+)
+{
+  int i = 0;
+
+  for (i = 0; i < nbytes; i++) {
+    *(buf + i) = inbyte();
+    if ((*(buf + i) == '\n') || (*(buf + i) == '\r')) {
+      (*(buf + i++)) = '\n';
+      (*(buf + i)) = 0;
+      break;
+    }
+  }
+  return (i);
+}
+
+/*
+ * __write -- write bytes to the serial port. Ignore fd, since
+ *            stdout and stderr are the same. Since we have no filesystem,
+ *            open will only return an error.
+ */
+
+int __write(
+  int fd,
+  char *buf,
+  int nbytes
+)
+{
+  int i;
+
+  for (i = 0; i < nbytes; i++) {
+    if (*(buf + i) == '\n') {
+      outbyte ('\r');
+    }
+    outbyte (*(buf + i));
+  }
+  return (nbytes);
+}
Index: c/src/lib/libbsp/i386/i386ex/include/bsp.h
===================================================================
--- c/src/lib/libbsp/i386/i386ex/include/bsp.h	(revision 752cd8fb98f1c65b9f482bdbebeef0bd14d98856)
+++ c/src/lib/libbsp/i386/i386ex/include/bsp.h	(revision 752cd8fb98f1c65b9f482bdbebeef0bd14d98856)
@@ -0,0 +1,138 @@
+/*  bsp.h
+ *
+ *  This include file definitions related to the Force CPU-386 board.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#ifndef __FORCE386_h
+#define __FORCE386_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <rtems.h>
+#include <iosupp.h>
+
+/*
+ *  Define the time limits for RTEMS Test Suite test durations.
+ *  Long test and short test duration limits are provided.  These
+ *  values are in seconds and need to be converted to ticks for the
+ *  application.
+ *
+ */
+
+#define MAX_LONG_TEST_DURATION       300 /* 5 minutes = 300 seconds */
+#define MAX_SHORT_TEST_DURATION      3   /* 3 seconds */
+
+/*
+ *  Define the interrupt mechanism for Time Test 27
+ *
+ *  NOTE: Use a software interrupt for the i386.
+ */
+
+#define MUST_WAIT_FOR_INTERRUTPT 0
+
+#define Install_tm27_vector( handler ) set_vector( (handler), 0x90, 1 )
+
+#define Cause_tm27_intr()              asm volatile( "int $0x90" : : );
+
+#define Clear_tm27_intr()
+
+#define Lower_tm27_intr()
+
+/*
+ *  Simple spin delay in microsecond units for device drivers.
+ *  This is very dependent on the clock speed of the target.
+ */
+
+#define delay( _microseconds ) \
+  { \
+    rtems_unsigned32 _counter; \
+    \
+    _counter = (_microseconds); \
+    \
+    asm volatile ( "0: nop;" \
+                   " mov %0,%0 ;" \
+                   " loop 0b" : "=c" (_counter) \
+                              : "0"  (_counter) \
+                 ); \
+    \
+  }
+
+/* Constants */
+
+#define RAM_START 0
+
+/* replaced the earlier EI kludge of 0xfffff */
+
+#define RAM_END   0x100000
+
+/* I/O addressing */
+
+/*
+ *#define Is_tx_ready( _status ) ( (_status) & 0x20 )
+ */
+/* dec 20. try the TE instead of TBE as the check */
+
+#define Is_tx_ready( _status ) ( (_status) & 0x40 )
+
+
+#define Is_rx_ready( _status ) ( (_status) & 0x01 )
+
+/* Timer constants: WE DON'T use THESE */
+
+#define IERA   0x106     /* Interrupt Enable Register A */
+#define IMRA   0x112     /* Interrupt Mask Register A */
+#define TACR   0x118     /* Timer A Control Register */
+#define TADR   0x11e     /* Timer A Data Register */
+
+#define IERB   0x108     /* Interrupt Enable Register B */
+#define TBCR   0x11a     /* Timer B Control Register */
+#define TBDR   0x120     /* Timer B Data Register */
+
+/* Structures */
+
+#ifdef F386_INIT
+#undef BSP_EXTERN
+#define BSP_EXTERN
+#else
+#undef BSP_EXTERN
+#define BSP_EXTERN extern
+#endif
+
+/* miscellaneous stuff assumed to exist */
+
+extern rtems_configuration_table BSP_Configuration;
+
+extern i386_IDT_slot Interrupt_descriptor_table[ 256 ];
+extern i386_GDT_slot Global_descriptor_table[ 8192 ];
+
+BSP_EXTERN unsigned short Idt[3];  /* Interrupt Descriptor Table Address */
+BSP_EXTERN unsigned short Gdt[3];  /* Global Descriptor Table Address */
+BSP_EXTERN unsigned int   Idt_base;
+BSP_EXTERN unsigned int   Gdt_base;
+
+/* routines */
+
+i386_isr_entry set_vector(
+  rtems_isr_entry     handler,
+  rtems_vector_number vector,
+  int                 type
+);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+/* end of include file */
Index: c/src/lib/libbsp/i386/i386ex/include/coverhd.h
===================================================================
--- c/src/lib/libbsp/i386/i386ex/include/coverhd.h	(revision 752cd8fb98f1c65b9f482bdbebeef0bd14d98856)
+++ c/src/lib/libbsp/i386/i386ex/include/coverhd.h	(revision 752cd8fb98f1c65b9f482bdbebeef0bd14d98856)
@@ -0,0 +1,104 @@
+/* coverhd.h
+ *
+ *  This include file has defines to represent the overhead associated
+ *  with calling a particular directive from C on this target.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#ifndef __COVERHD_h
+#define __COVERHD_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define CALLING_OVERHEAD_INITIALIZE_EXECUTIVE      3
+#define CALLING_OVERHEAD_SHUTDOWN_EXECUTIVE        3
+#define CALLING_OVERHEAD_TASK_CREATE               4
+#define CALLING_OVERHEAD_TASK_IDENT                4
+#define CALLING_OVERHEAD_TASK_START                4
+#define CALLING_OVERHEAD_TASK_RESTART              3
+#define CALLING_OVERHEAD_TASK_DELETE               3
+#define CALLING_OVERHEAD_TASK_SUSPEND              3
+#define CALLING_OVERHEAD_TASK_RESUME               3
+#define CALLING_OVERHEAD_TASK_SET_PRIORITY         4
+#define CALLING_OVERHEAD_TASK_MODE                 4
+#define CALLING_OVERHEAD_TASK_GET_NOTE             4
+#define CALLING_OVERHEAD_TASK_SET_NOTE             4
+#define CALLING_OVERHEAD_TASK_WAKE_WHEN            7
+#define CALLING_OVERHEAD_TASK_WAKE_AFTER           3
+#define CALLING_OVERHEAD_INTERRUPT_CATCH           4
+#define CALLING_OVERHEAD_CLOCK_GET                 7
+#define CALLING_OVERHEAD_CLOCK_SET                 7
+#define CALLING_OVERHEAD_CLOCK_TICK                2
+
+#define CALLING_OVERHEAD_TIMER_CREATE              3
+#define CALLING_OVERHEAD_TIMER_IDENT               3
+#define CALLING_OVERHEAD_TIMER_DELETE              3
+#define CALLING_OVERHEAD_TIMER_FIRE_AFTER          4
+#define CALLING_OVERHEAD_TIMER_FIRE_WHEN           8
+#define CALLING_OVERHEAD_TIMER_RESET               3
+#define CALLING_OVERHEAD_TIMER_CANCEL              3
+#define CALLING_OVERHEAD_SEMAPHORE_CREATE          4
+#define CALLING_OVERHEAD_SEMAPHORE_DELETE          3
+#define CALLING_OVERHEAD_SEMAPHORE_IDENT           4
+#define CALLING_OVERHEAD_SEMAPHORE_OBTAIN          4
+#define CALLING_OVERHEAD_SEMAPHORE_RELEASE         3
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_CREATE      4
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_IDENT       4
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_DELETE      3
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_SEND        3
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_URGENT      3
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_BROADCAST   4
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_RECEIVE     4
+#define CALLING_OVERHEAD_MESSAGE_QUEUE_FLUSH       3
+
+#define CALLING_OVERHEAD_EVENT_SEND                4
+#define CALLING_OVERHEAD_EVENT_RECEIVE             4
+#define CALLING_OVERHEAD_SIGNAL_CATCH              3
+#define CALLING_OVERHEAD_SIGNAL_SEND               3
+#define CALLING_OVERHEAD_PARTITION_CREATE          4
+#define CALLING_OVERHEAD_PARTITION_IDENT           4
+#define CALLING_OVERHEAD_PARTITION_DELETE          3
+#define CALLING_OVERHEAD_PARTITION_GET_BUFFER      4
+#define CALLING_OVERHEAD_PARTITION_RETURN_BUFFER   4
+#define CALLING_OVERHEAD_REGION_CREATE             4
+#define CALLING_OVERHEAD_REGION_IDENT              3
+#define CALLING_OVERHEAD_REGION_DELETE             3
+#define CALLING_OVERHEAD_REGION_GET_SEGMENT        4
+#define CALLING_OVERHEAD_REGION_RETURN_SEGMENT     4
+#define CALLING_OVERHEAD_PORT_CREATE               4
+#define CALLING_OVERHEAD_PORT_IDENT                3
+#define CALLING_OVERHEAD_PORT_DELETE               3
+#define CALLING_OVERHEAD_PORT_EXTERNAL_TO_INTERNAL 4
+#define CALLING_OVERHEAD_PORT_INTERNAL_TO_EXTERNAL 4
+
+#define CALLING_OVERHEAD_IO_INITIALIZE             4
+#define CALLING_OVERHEAD_IO_OPEN                   4
+#define CALLING_OVERHEAD_IO_CLOSE                  4
+#define CALLING_OVERHEAD_IO_READ                   4
+#define CALLING_OVERHEAD_IO_WRITE                  4
+#define CALLING_OVERHEAD_IO_CONTROL                4
+#define CALLING_OVERHEAD_FATAL_ERROR_OCCURRED      3
+#define CALLING_OVERHEAD_RATE_MONOTONIC_CREATE     3
+#define CALLING_OVERHEAD_RATE_MONOTONIC_IDENT      3
+#define CALLING_OVERHEAD_RATE_MONOTONIC_DELETE     3
+#define CALLING_OVERHEAD_RATE_MONOTONIC_CANCEL     3
+#define CALLING_OVERHEAD_RATE_MONOTONIC_PERIOD     3
+#define CALLING_OVERHEAD_MULTIPROCESSING_ANNOUNCE  2
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+/* end of include file */
Index: c/src/lib/libbsp/i386/i386ex/startup/README
===================================================================
--- c/src/lib/libbsp/i386/i386ex/startup/README	(revision 752cd8fb98f1c65b9f482bdbebeef0bd14d98856)
+++ c/src/lib/libbsp/i386/i386ex/startup/README	(revision 752cd8fb98f1c65b9f482bdbebeef0bd14d98856)
@@ -0,0 +1,25 @@
+
+
+	The doit shell file cd's to $H, which refers to the directory
+that contains the hello world test.  The console is a raw com port.  
+Certain test programs behave differently with different com port speeds.
+To test the programs, it is required that you hook up a terminal 
+( or minicom or procomm it doesn't really matter ) to the comm port of 
+the target hardware.  You must ensure that the baud rate, parity etc
+is set properly.  This is done on the target hardware within interns.s .
+( Set your terminal emulator to match. ) Currently, the settings
+are 9600,8,n,1 .
+
+The format and layout of the file interns.s is taken from the 
+intel ApBuilder software, freely distributed by Intel.  Some
+easy macros ( SetExRegByte and SetExRegWord ) are basically lifted
+from the Intel macros.  Similarly for the names of the IO ports.
+
+This "port" begain with the forceCPU bsp.  Hence I am sure that 
+there is some real trash that is not appropriate.  For example
+the act of copying the Interrupt Descriptor tables and Global
+descriptor tables "into our space". ( in start.s I think ) 
+
+Erik
+
+	
Index: c/src/lib/libbsp/i386/i386ex/startup/bspstart.c
===================================================================
--- c/src/lib/libbsp/i386/i386ex/startup/bspstart.c	(revision 752cd8fb98f1c65b9f482bdbebeef0bd14d98856)
+++ c/src/lib/libbsp/i386/i386ex/startup/bspstart.c	(revision 752cd8fb98f1c65b9f482bdbebeef0bd14d98856)
@@ -0,0 +1,160 @@
+/*  bsp_start()
+ *
+ *  This routine starts the application.  It includes application,
+ *  board, and monitor specific initialization and configuration.
+ *  The generic CPU dependent initialization has been performed
+ *  before this routine is invoked.
+ *
+ *  INPUT:  NONE
+ *
+ *  OUTPUT: NONE
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+#include <libcsupport.h>
+
+#include <stackchk.h>
+
+#include <stdio.h>
+extern void outbyte(char);
+
+/*
+ *  The original table from the application and our copy of it with
+ *  some changes.
+ */
+
+extern rtems_configuration_table  Configuration;
+rtems_configuration_table  BSP_Configuration;
+
+rtems_cpu_table Cpu_table;
+
+/*      Initialize whatever libc we are using
+ *      called from postdriver hook
+ */
+
+void bsp_libc_init()
+{
+    extern int end;
+    rtems_unsigned32        heap_start;
+
+    heap_start = (rtems_unsigned32) &end;
+    if (heap_start & (CPU_ALIGNMENT-1))
+        heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1);
+
+    RTEMS_Malloc_Initialize((void *) heap_start, 64 * 1024, 0);
+
+    /*
+     * Set up for the libc handling.
+     */
+
+    if (BSP_Configuration.ticks_per_timeslice > 0)
+        libc_init(1);                /* reentrant if possible */
+    else
+        libc_init(0);                /* non-reentrant */
+
+    /*
+     *  Initialize the stack bounds checker
+     */
+
+#ifdef STACK_CHECKER_ON
+    Stack_check_Initialize();
+#endif
+
+}
+extern char inbyte(void);
+extern void outbyte(char);
+
+int bsp_start(
+  int argc,
+  char **argv,
+  char **environp
+)
+{
+#ifdef PRINTON   
+
+  outbyte('a');
+  outbyte('b');
+  outbyte('c');
+  outbyte ('S');
+
+#endif
+
+  /*
+   *  we do not use the pretasking_hook.
+   */
+
+  Cpu_table.pretasking_hook = NULL;
+
+  Cpu_table.predriver_hook = bsp_libc_init;  /* RTEMS resources available */
+
+  Cpu_table.postdriver_hook = NULL;   /* Call our main() for constructors */
+
+  Cpu_table.idle_task = NULL;  /* do not override system IDLE task */
+
+  Cpu_table.do_zero_of_workspace = TRUE;
+
+  Cpu_table.interrupt_table_segment = get_ds();
+
+  Cpu_table.interrupt_table_offset = (void *)Interrupt_descriptor_table;
+
+  Cpu_table.interrupt_stack_size = 4096;
+
+  Cpu_table.extra_system_initialization_stack = 0;
+
+  /*
+   *  Copy the table
+   */
+
+  BSP_Configuration = Configuration;
+
+  BSP_Configuration.work_space_start = (void *)
+     RAM_END - BSP_Configuration.work_space_size;
+
+  
+
+#ifdef SPRINTON 
+  sprintf( x_buffer, "ram end : %u, work_space_size: %d\n", 
+           RAM_END ,  BSP_Configuration.work_space_size ); 
+  do {
+    outbyte ( x_buffer[i] );
+  } while ( x_buffer[i++] != '\n');
+#endif
+
+  /*
+   * Add 1 region for Malloc in libc_low
+   */
+
+  BSP_Configuration.maximum_regions++;
+
+  /*
+   * Add 1 extension for newlib libc
+   */
+
+#ifdef RTEMS_NEWLIB
+    BSP_Configuration.maximum_extensions++;
+#endif
+
+  /*
+   * Add another extension if using the stack checker
+   */
+
+#ifdef STACK_CHECKER_ON
+    BSP_Configuration.maximum_extensions++;
+#endif
+
+  rtems_initialize_executive( &BSP_Configuration, &Cpu_table );
+  /* does not return */
+  /* no cleanup necessary for Force CPU-386 */
+  for (;;);  /* was return 0 to go to the debug monitor */
+}
Index: c/src/lib/libbsp/i386/i386ex/startup/linkcmds
===================================================================
--- c/src/lib/libbsp/i386/i386ex/startup/linkcmds	(revision 752cd8fb98f1c65b9f482bdbebeef0bd14d98856)
+++ c/src/lib/libbsp/i386/i386ex/startup/linkcmds	(revision 752cd8fb98f1c65b9f482bdbebeef0bd14d98856)
@@ -0,0 +1,106 @@
+/*
+ *  This file contains directives for the GNU linker which are specific
+ *  to the Intel 386ex evaluation board.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  linkcmds,v 1.0 1995/11/30 16:52:02 Erik Ivanenko
+ */
+
+
+	ENTRY(reset) ;
+SECTIONS
+{
+	_rom_ints = 0x3fb0000;
+	.ints 0x0100 :
+	AT ( _rom_ints )          /* was 0x3fb3300 */
+	{
+	_sints = .;
+	*(.ints);
+	_eints = ALIGN (0x010);
+	}	
+	_cs4_ints_segment   = 0x0010 ;   
+	_cs4_ints_offset    = 0x0000 ;       
+	_cs6_t_ints_segment = 0xF000 ; /* was 0xF000 */ 
+	_cs6_t_ints_offset  = 0x0000 ; /* was 0x3300 */
+	_cs6_t_ints_size    = _eints - _sints ;
+
+        _rom_gdt = _rom_ints + _cs6_t_ints_size;
+	.gdt  0x1000  :
+        AT ( _rom_gdt )
+	{
+	_sgdt = .;
+	*(.gdt);
+	_egdt = ALIGN (0x10);
+	}
+	_cs4_gdt_segment   = 0x0100 ; /* evaluates to  0x1000 */
+	_cs4_gdt_offset    = 0x0000 ;
+	_cs6_t_gdt_segment = 0xF000;
+	_cs6_t_gdt_offset  = _cs6_t_ints_size;  /* was 0x0 */
+	_cs6_t_gdt_size    = _egdt - _sgdt;
+
+        _rom_idt = _rom_gdt + _cs6_t_gdt_size + _cs6_t_ints_size ;
+	.idt 0x1200 :
+	AT ( _rom_idt )
+	{
+	_sidt = .;
+	*(.idt);
+	_eidt = ALIGN (0x10);
+	}
+ 	_cs4_idt_segment	= 0x0120;
+	_cs4_idt_offset		= 0x0000 ;
+	_cs6_t_idt_segment	= 0xF000 ;
+	_cs6_t_idt_offset   	= _cs6_t_ints_size + _cs6_t_gdt_size ; /* was 0x1000 */
+	_cs6_t_idt_size		= _eidt - _sidt;
+
+	_rom_data_start = _rom_idt + _cs6_t_idt_size ;
+        .data : 
+        AT ( _rom_data_start )       /* was 0x3fd0000 */
+        {
+        _sdata = .;
+        *(.data);
+        _edata = ALIGN( 0x10 ) ;
+   	}
+        _data_start       = ADDR(.data) ;
+        _data_size        = _edata - _sdata ;
+	_edata            = _data_start + _data_size ;
+
+	.bss :
+	{
+	_bss_start = .;
+	*(.bss);
+	*(COMMON);
+	_ebss = ALIGN(0x10);
+	end = _ebss;
+	_end = end;
+	__end = end;
+	}
+        _bss_size = _ebss - _bss_start ;
+
+        
+        .text ( 0x3f80000 ):
+        {
+        _text_start = . ;
+        *(.text ) ;
+        _etext = ALIGN( 0x10 ); 
+        }
+
+	.initial  0x3ff1000:
+	{
+	*(.initial);
+	}
+
+	.reset    0x3fffff0:
+	{
+	*(.reset);
+        }
+}
+
+
+
Index: c/src/lib/libbsp/i386/i386ex/startup/setvec.c
===================================================================
--- c/src/lib/libbsp/i386/i386ex/startup/setvec.c	(revision 752cd8fb98f1c65b9f482bdbebeef0bd14d98856)
+++ c/src/lib/libbsp/i386/i386ex/startup/setvec.c	(revision 752cd8fb98f1c65b9f482bdbebeef0bd14d98856)
@@ -0,0 +1,59 @@
+/*  set_vector
+ *
+ *  This routine installs an interrupt vector on the Force CPU-386.
+ *
+ *  INPUT:
+ *    handler - interrupt handler entry point
+ *    vector  - vector number
+ *    type    - 0 indicates raw hardware connect
+ *              1 indicates RTEMS interrupt connect
+ *
+ *  RETURNS:
+ *    address of previous interrupt handler
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include <rtems.h>
+#include <bsp.h>
+
+i386_isr_entry set_vector(                      /* returns old vector */
+  rtems_isr_entry     handler,                  /* isr routine        */
+  rtems_vector_number vector,                   /* vector number      */
+  int                 type                      /* RTEMS or RAW intr  */
+)
+{
+  i386_isr_entry previous_isr;
+  i386_IDT_slot  idt;
+
+  if ( type )
+    rtems_interrupt_catch( handler, vector, (rtems_isr_entry *) &previous_isr );
+  else {
+    /* get the address of the old handler */
+
+    idt = Interrupt_descriptor_table[ vector ];
+
+    previous_isr = (i386_isr_entry)
+                      ((idt.offset_16_31 << 16) | idt.offset_0_15);
+
+    /* build the IDT entry */
+    idt.offset_0_15      = ((rtems_unsigned32) handler) & 0xffff;
+    idt.segment_selector = get_cs();
+    idt.reserved         = 0x00;
+    idt.p_dpl            = 0x8e;         /* present, ISR */
+    idt.offset_16_31     = ((rtems_unsigned32) handler) >> 16;
+
+    /* install the IDT entry */
+    Interrupt_descriptor_table[ vector ] = idt;
+  }
+  return previous_isr;
+}
+
Index: c/src/lib/libbsp/i386/i386ex/timer/timer.c
===================================================================
--- c/src/lib/libbsp/i386/i386ex/timer/timer.c	(revision 752cd8fb98f1c65b9f482bdbebeef0bd14d98856)
+++ c/src/lib/libbsp/i386/i386ex/timer/timer.c	(revision 752cd8fb98f1c65b9f482bdbebeef0bd14d98856)
@@ -0,0 +1,99 @@
+/*  Timer_init()
+ *
+ *  This routine initializes the timer on the FORCE CPU-386 board.
+ *
+ *  Input parameters:  NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  NOTE: This routine will not work if the optimizer is enabled
+ *        for some compilers.  The multiple writes to the Z8036
+ *        may be optimized away.
+ *
+ *        It is important that the timer start/stop overhead be
+ *        determined when porting or modifying this code.
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+
+#include <rtems.h>
+#include <bsp.h>
+
+int Ttimer_val;
+rtems_boolean Timer_driver_Find_average_overhead;
+
+rtems_isr timerisr();
+
+#define TMR0	  0xF040
+#define TMR1	  0xF041
+#define TMR2	  0xF042
+#define TMRCON	  0xF043
+#define TMRCFG    0xF834
+
+void Timer_initialize()
+{
+
+  (void) set_vector( timerisr, 0x2a, 0 );   /* install ISR ( IR2 ) was 0x38*/
+
+  Ttimer_val = 0;                           /* clear timer ISR count */
+
+  outport_byte  ( TMRCON , 0xb0 ); /* select tmr2, stay in mode 0 */
+  outport_byte  ( TMR1   , 0xd2 ); /* set to 250 usec interval */
+  outport_byte	( TMR1   , 0x00 );
+  outport_byte  ( TMRCON , 0x64 ); /* change to mode 2 ( starts timer ) */ 
+                                   /* interrupts ARE enabled */
+/*  outport_byte( IERA, 0x41 );             enable interrupt */
+
+}
+
+#define AVG_OVERHEAD      3  /* It typically takes 3.0 microseconds */
+                             /* (3 ticks) to start/stop the timer. */
+#define LEAST_VALID       4  /* Don't trust a value lower than this */
+
+int Read_timer()
+{
+  register rtems_unsigned32 clicks;
+  register rtems_unsigned32 total;
+
+/*  outport_byte( TBCR, 0x00 );  stop the timer -- not needed on intel */
+
+  outport_byte ( TMRCON, 0x40 );   /* latch the count */
+  inport_byte  ( TMR1,   clicks ); /* read the count */ 
+
+  total = Ttimer_val + 250 - clicks;
+
+/*  outport_byte( TBCR, 0x00 );   initial value */
+/*  outport_byte( IERA, 0x40 );   disable interrupt */
+
+  /* ??? Is "do not restore old vector" causing problems? */
+
+  if ( Timer_driver_Find_average_overhead == 1 )
+    return total;          /* in one microsecond units */
+
+  else {
+    if ( total < LEAST_VALID )
+      return 0;            /* below timer resolution */
+    return (total - AVG_OVERHEAD);
+  }
+}
+
+rtems_status_code Empty_function( void )
+{
+  return RTEMS_SUCCESSFUL;
+}
+
+void Set_find_average_overhead(
+  rtems_boolean find_flag
+)
+{
+  Timer_driver_Find_average_overhead = find_flag;
+}
Index: c/src/lib/libbsp/i386/i386ex/timer/timerisr.s
===================================================================
--- c/src/lib/libbsp/i386/i386ex/timer/timerisr.s	(revision 752cd8fb98f1c65b9f482bdbebeef0bd14d98856)
+++ c/src/lib/libbsp/i386/i386ex/timer/timerisr.s	(revision 752cd8fb98f1c65b9f482bdbebeef0bd14d98856)
@@ -0,0 +1,34 @@
+/*  timer_isr()
+ *
+ *  This routine provides the ISR for the Z8036 timer on the MVME136
+ *  board.   The timer is set up to generate an interrupt at maximum
+ *  intervals.
+ *
+ *  Input parameters:  NONE
+ *
+ *  Output parameters:  NONE
+ *
+ *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
+ *  On-Line Applications Research Corporation (OAR).
+ *  All rights assigned to U.S. Government, 1994.
+ *
+ *  This material may be reproduced by or for the U.S. Government pursuant
+ *  to the copyright license under the clause at DFARS 252.227-7013.  This
+ *  notice must appear in all copies of this file and its derivatives.
+ *
+ *  $Id$
+ */
+
+#include "asm.h"
+
+        BEGIN_CODE
+
+        EXTERN (Ttimer_val)
+
+        PUBLIC (timerisr)
+SYM (timerisr):
+        addl    $250, SYM (Ttimer_val)   # another 250 microseconds
+        iret
+
+END_CODE
+END
