Changeset 73cdeb6 in rtems for c/src/lib/libbsp


Ignore:
Timestamp:
Jul 4, 2007, 12:25:49 PM (13 years ago)
Author:
Thomas Doerfler <Thomas.Doerfler@…>
Branches:
4.10, 4.11, 4.8, 4.9, master
Children:
862c2317
Parents:
8bfffd9b
Message:

merged individual exception handler code to a common one.

Location:
c/src/lib/libbsp/powerpc
Files:
8 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/powerpc/ChangeLog

    r8bfffd9b r73cdeb6  
     12007-07-02      Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
     2
     3        * acinclude.m4, shared/irq/irq_asm.S, shared/irq/irq.c,
     4        * shared/vectors/vectors_entry.S, shared/vectors/vectors.h,
     5        * shared/vectors/vectors_init.c, shared/vectors/vectors.S:
     6        converted various BSP specific implementations into a more general
     7        "shared" one
     8
     92007-07-02      Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
     10
     11        * vitex/:
     12        integrated "virtex" BSP to support PPC core implemented in a
     13        Xilinx virtex FPGA
     14
    1152007-06-20      Joel Sherrill <joel.sherrill@oarcorp.com>
    216
  • c/src/lib/libbsp/powerpc/acinclude.m4

    r8bfffd9b r73cdeb6  
    2525  ss555 )
    2626    AC_CONFIG_SUBDIRS([ss555]);;
     27  virtex )
     28    AC_CONFIG_SUBDIRS([virtex]);;
    2729  *)
    2830    AC_MSG_ERROR([Invalid BSP]);;
  • c/src/lib/libbsp/powerpc/motorola_powerpc/Makefile.am

    r8bfffd9b r73cdeb6  
    129129vectors_rel_SOURCES = ../../powerpc/shared/vectors/vectors.h \
    130130    ../../powerpc/shared/vectors/vectors_init.c \
     131    ../../powerpc/shared/vectors/vectors_entry.S \
    131132    ../../powerpc/shared/vectors/vectors.S
    132133vectors_rel_CPPFLAGS = $(AM_CPPFLAGS)
     
    162163    ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
    163164    ../../../libcpu/@RTEMS_CPU@/mpc6xx/clock.rel \
    164     ../../../libcpu/@RTEMS_CPU@/mpc6xx/exceptions.rel \
     165    ../../../libcpu/@RTEMS_CPU@/@exceptions@/raw_exception.rel \
    165166    ../../../libcpu/@RTEMS_CPU@/mpc6xx/mmu.rel \
    166167    ../../../libcpu/@RTEMS_CPU@/mpc6xx/timer.rel
    167168
    168169EXTRA_DIST += BOOTING README.mtx603e README.MVME2100 README.MVME2300 \
     170              README.MVME2400 \
    169171    README.OTHERBOARDS README.mcp750 README.MVME2307 README.dec21140
    170172EXTRA_DIST += times.mcp750 times.mvme2307
  • c/src/lib/libbsp/powerpc/shared/irq/irq.c

    r8bfffd9b r73cdeb6  
    334334    vectorDesc.off              =       nop_func;
    335335    vectorDesc.isOn             =       connected;
    336     if (!mpc60x_set_exception (&vectorDesc)) {
     336    if (!ppc_set_exception (&vectorDesc)) {
    337337      BSP_panic("Unable to initialize RTEMS decrementer raw exception\n");
    338338    }
     
    341341    vectorDesc.hdl.raw_hdl      =       external_exception_vector_prolog_code;
    342342    vectorDesc.hdl.raw_hdl_size =       (unsigned) external_exception_vector_prolog_code_size;
    343     if (!mpc60x_set_exception (&vectorDesc)) {
     343    if (!ppc_set_exception (&vectorDesc)) {
    344344      BSP_panic("Unable to initialize RTEMS external raw exception\n");
    345345    }
  • c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S

    r8bfffd9b r73cdeb6  
    3131        .text
    3232        .p2align 5
    33 
     33#if defined(ASM_DEC_VECTOR)
    3434        PUBLIC_VAR(decrementer_exception_vector_prolog_code)
    3535
     
    4646
    4747        decrementer_exception_vector_prolog_code_size = . - decrementer_exception_vector_prolog_code
    48 
     48#endif
     49
     50#if defined(ASM_PIT_VECTOR)
     51        PUBLIC_VAR(pit_exception_vector_prolog_code)
     52
     53SYM (pit_exception_vector_prolog_code):
     54        /*
     55         * let room for exception frame
     56         */
     57        stwu    r1, - (EXCEPTION_FRAME_END)(r1)
     58        stw     r4, GPR4_OFFSET(r1)
     59        li      r4, ASM_PIT_VECTOR
     60        ba      shared_raw_irq_code_entry
     61
     62        PUBLIC_VAR (pit_exception_vector_prolog_code_size)
     63
     64        pit_exception_vector_prolog_code_size = . - pit_exception_vector_prolog_code
     65#endif
     66
     67#if defined(ASM_FIT_VECTOR)
     68        PUBLIC_VAR(fit_exception_vector_prolog_code)
     69
     70SYM (fit_exception_vector_prolog_code):
     71        /*
     72         * let room for exception frame
     73         */
     74        stwu    r1, - (EXCEPTION_FRAME_END)(r1)
     75        stw     r4, GPR4_OFFSET(r1)
     76        li      r4, ASM_FIT_VECTOR
     77        ba      shared_raw_irq_code_entry
     78
     79        PUBLIC_VAR (fit_exception_vector_prolog_code_size)
     80
     81        fit_exception_vector_prolog_code_size = . - fit_exception_vector_prolog_code
     82#endif
     83       
    4984        PUBLIC_VAR(external_exception_vector_prolog_code)
    5085
     86#if defined(ASM_EXT_VECTOR)
    5187SYM (external_exception_vector_prolog_code):
    5288        /*
     
    6197
    6298        external_exception_vector_prolog_code_size = . - external_exception_vector_prolog_code
     99#endif
    63100
    64101        PUBLIC_VAR(shared_raw_irq_code_entry)
     
    91128        stw     r3, SRR1_FRAME_OFFSET(r1)
    92129
     130#if defined(PPC_MSR_EXC_BITS)
    93131        mfmsr   r3
    94132        /*
    95133         * Enable data and instruction address translation, exception recovery
    96134         */
    97         ori     r3, r3, MSR_RI | MSR_IR | MSR_DR
     135        ori     r3, r3, PPC_MSR_EXC_BITS
    98136        mtmsr   r3
     137#endif
    99138        SYNC
    100139        /*
     
    281320         * Disable data and instruction translation. Make path non recoverable...
    282321         */
     322#if defined(PPC_MSR_EXC_BITS)
    283323        mfmsr   r3
    284         xori    r3, r3, MSR_RI | MSR_IR | MSR_DR
     324        xori    r3, r3, PPC_MSR_EXC_BITS
    285325        mtmsr   r3
    286326        SYNC
     327#endif
    287328        /*
    288329         * Restore rfi related settings
     
    332373         * translation.
    333374         */
     375#if defined(PPC_MSR_EXC_BITS)
    334376        mfmsr   r3
    335         xori    r3, r3, MSR_RI | MSR_IR | MSR_DR
     377        xori    r3, r3, PPC_MSR_EXC_BITS
    336378        mtmsr   r3
    337379        SYNC
     380#endif
    338381        /*
    339382         * Restore rfi related settings
  • c/src/lib/libbsp/powerpc/shared/vectors/vectors.S

    r8bfffd9b r73cdeb6  
    1313#include <bsp/vectors.h>
    1414#include <libcpu/raw_exception.h>
    15 
     15               
    1616#define SYNC \
    1717        sync; \
    1818        isync
    1919
    20         PUBLIC_VAR (__rtems_start)
    21         .section .entry_point_section,"awx",@progbits
    22 /*
    23  * Entry point information used by bootloader code
    24  */
    25 SYM (__rtems_start):
    26         .long   __rtems_entry_point
    27 
    28         /*
    29          * end of special Entry point section
    30          */
    3120        .text
    3221        /* 603e shadows GPR0..GPR3 for certain exceptions. We must switch
     
    7362         * (256 * vector number) + few instructions
    7463         */
     64        /*
     65         * FIXME: vectors should distingish
     66         * all bits in mask 0x00003ff0
     67         * and keep in mind that the LR/R3 contains the
     68         * address BEHIND the entry code
     69         */
    7570        mflr    r3
    7671        /* mask upper bits in case vectors are in the high area (psim) */
    7772        rlwinm  r3, r3, 32-5, 20, 31
     73#if defined(ASM_VEC_VECTOR)
    7874        /*
    7975         * Remap altivec unavaliable (0xf20) to its vector number...
     
    8379        li              r3,ASM_VEC_VECTOR<<3
    84801:
     81#endif
    8582        /*
    8683         * r3 = r3 >> 8 = vector #
     
    9390         */
    9491        stw     r2, GPR2_OFFSET(r1)
     92#if defined(ASM_VECTORS_CRITICAL)
     93        lis     r0,ASM_VECTORS_CRITICAL@h
     94        ori     r0,r0,ASM_VECTORS_CRITICAL@l
     95        rlwnm.  r0,r0,r3,0,0
     96        beq     1f
     97        /*
     98         * NOTE: srr2/3 are stored in slots SRR0/1
     99         * for critical exceptions
     100         */
     101        mfsrr2  r3
     102        stw     r3, SRR0_FRAME_OFFSET(r1)
     103        mfsrr3  r3
     104        stw     r3, SRR1_FRAME_OFFSET(r1)
     105        b       2f
     1061:             
     107#endif 
    95108        mfsrr0  r3
    96109        stw     r3, SRR0_FRAME_OFFSET(r1)
    97110        mfsrr1  r3
    98111        stw     r3, SRR1_FRAME_OFFSET(r1)
     1122:     
    99113        /*
    100114         * Save general purpose registers
     
    124138         */
    125139        stw     r3, GPR1_OFFSET(r1)
     140
     141#if defined(PPC_MSR_EXC_BITS)
    126142        /*
    127143         * Enable data and instruction address translation, exception nesting
    128144         */
    129145        mfmsr   r3
    130         ori     r3,r3, MSR_RI | MSR_IR | MSR_DR
     146        ori     r3,r3, PPC_MSR_EXC_BITS
    131147        mtmsr   r3
    132148        SYNC
    133 
     149#endif
    134150        /*
    135151         * Call C exception handler
     
    162178        lmw     r4, GPR4_OFFSET(r1)
    163179        lwz     r2, GPR2_OFFSET(r1)
     180
     181        /*
     182         * Disable data and instruction translation. Mark path non recoverable
     183         */
     184#if defined(PPC_MSR_EXC_BITS)
     185        mfmsr   r3
     186        xori    r3, r3, PPC_MSR_EXC_BITS
     187        mtmsr   r3
     188        SYNC
     189#endif
     190#if defined(ASM_VECTORS_CRITICAL)
     191        /*
     192         * determine, whether to restore from
     193         * srr0/1 or srr2/3
     194         */
     195        lis     r0,ASM_VECTORS_CRITICAL@h
     196        lwz     r3,EXCEPTION_NUMBER_OFFSET(r1)
     197        ori     r0,r0,ASM_VECTORS_CRITICAL@l
     198        rlwnm.  r0,r0,r3,0,0
     199        beq     1f
     200        /*
     201         * NOTE: srr2/3 are stored in slots SRR0/1
     202         * for critical exceptions
     203         */
     204        lwz     r3, SRR1_FRAME_OFFSET(r1)
     205        mtsrr3  r3
     206        lwz     r3, SRR0_FRAME_OFFSET(r1)
     207        mtsrr2  r3
     208        lwz     r3, GPR3_OFFSET(r1)
    164209        lwz     r0, GPR0_OFFSET(r1)
    165 
    166         /*
    167          * Disable data and instruction translation. Make path non recoverable...
    168          */
    169         mfmsr   r3
    170         xori    r3, r3, MSR_RI | MSR_IR | MSR_DR
    171         mtmsr   r3
    172         SYNC
     210        /* DONT add back the frame size but reload the value
     211         * stored in the frame -- maybe the exception handler
     212         * changed it with good reason (e.g., gdb pushed a dummy frame)
     213         */
     214        lwz r1, GPR1_OFFSET(r1)
     215        SYNC
     216        rfci
     2171:             
     218#endif 
    173219        /*
    174220         * Restore rfi related settings
     
    181227
    182228        lwz     r3, GPR3_OFFSET(r1)
     229        lwz     r0, GPR0_OFFSET(r1)
    183230        /* DONT add back the frame size but reload the value
    184231         * stored in the frame -- maybe the exception handler
  • c/src/lib/libbsp/powerpc/shared/vectors/vectors.h

    r8bfffd9b r73cdeb6  
    1313 *  $Id$
    1414 */
    15 #ifndef LIBBSP_POWERPC_MCP750_VECTORS_H
    16 #define LIBBSP_POWERPC_MCP750_VECTORS_H
     15#ifndef LIBBSP_POWERPC_SHARED_VECTORS_H
     16#define LIBBSP_POWERPC_SHARED_VECTORS_H
     17#include <libcpu/raw_exception.h>
    1718
    1819/*
     
    7374/*
    7475 * default raw exception handlers
     76 * The "*_size" symbol is generated by the linker; prevent it from
     77 * being accessed in one of the short data areas by declaring
     78 * it as an array
    7579 */
    7680
    7781extern  void default_exception_vector_code_prolog();
     82extern  unsigned int  default_exception_vector_code_prolog_size[];
    7883extern  void tgpr_clr_exception_vector_code_prolog();
    79 /* This symbol is generated by the linker; prevent it from
    80  * being accessed in one of the short data areas by declaring
    81  * it as an array
     84extern  unsigned int  tgpr_clr_exception_vector_code_prolog_size[];
     85/*
     86 * FIXME: these should move to a "irq_asm.h"
    8287 */
    83 extern  int  default_exception_vector_code_prolog_size[];
    84 extern  int  tgpr_clr_exception_vector_code_prolog_size[];
     88extern  void external_exception_vector_prolog_code();
     89extern  unsigned int  external_exception_vector_prolog_code_size[];
     90extern  void decrementer_exception_vector_prolog_code();
     91extern  unsigned int  decrementer_exception_vector_prolog_code_size[];
     92extern  void pit_exception_vector_prolog_code();
     93extern  unsigned int  pit_exception_vector_prolog_code_size[];
     94extern  void fit_exception_vector_prolog_code();
     95extern  unsigned int  fit_exception_vector_prolog_code_size[];
    8596
    8697/* codemove is like memmove, but it also gets the cache line size
     
    92103 */
    93104extern void * codemove(void *, const void *, unsigned int, unsigned long);
     105extern void exception_nop_enable(const rtems_raw_except_connect_data* ptr);
     106extern int  exception_always_enabled(const rtems_raw_except_connect_data* ptr);
    94107extern void initialize_exceptions();
    95108
     
    146159typedef exception_handler_t cpuExcHandlerType;
    147160
     161/*
     162 * dummy functions for exception interface
     163 */
     164void exception_nop_enable(const rtems_raw_except_connect_data* ptr);
     165int exception_always_enabled(const rtems_raw_except_connect_data* ptr);
     166
    148167#endif /* ASM */
    149168
  • c/src/lib/libbsp/powerpc/shared/vectors/vectors_init.c

    r8bfffd9b r73cdeb6  
    2626static rtems_raw_except_connect_data    exception_table[LAST_VALID_EXC + 1];
    2727
    28 extern exception_handler_t globalExceptHdl;
    2928exception_handler_t globalExceptHdl;
    3029
     
    116115  printk("\t XER = %x\n", excPtr->EXC_XER);
    117116  printk("\t LR = %x\n", excPtr->EXC_LR);
     117  printk("\t MSR = %x\n", excPtr->EXC_MSR);
    118118  printk("\t DAR = %x\n", excPtr->EXC_DAR);
    119119
     
    134134}
    135135
    136 void nop_except_enable(const rtems_raw_except_connect_data* ptr)
    137 {
    138 }
    139 int except_always_enabled(const rtems_raw_except_connect_data* ptr)
     136/***********************************************************
     137 * dummy functions for on/off/isOn calls
     138 * these functions just do nothing fulfill the semantic
     139 * requirements to enable/disable a certain exception
     140 */
     141void exception_nop_enable(const rtems_raw_except_connect_data* ptr)
     142{
     143}
     144
     145int exception_always_enabled(const rtems_raw_except_connect_data* ptr)
    140146{
    141147  return 1;
    142148}
    143 
    144 int mpc60x_vector_is_valid(rtems_vector vector);
    145149
    146150void initialize_exceptions()
     
    175179  }
    176180  for (i=0; i <= exception_config.exceptSize; i++) {
    177     if (!mpc60x_vector_is_valid (i)) {
     181    if (!ppc_vector_is_valid (i)) {
    178182      continue;
    179183    }
    180184    exception_table[i].exceptIndex      = i;
     185#if defined(PPC_HAS_60X_VECTORS)
    181186    if ( has_shadowed_gprs
    182187         && (   ASM_IMISS_VECTOR  == i
     
    186191      exception_table[i].hdl.raw_hdl_size = (unsigned)tgpr_clr_exception_vector_code_prolog_size;
    187192    } else {
    188       exception_table[i].hdl              = exception_config.defaultRawEntry.hdl;
     193      exception_table[i].hdl            = exception_config.defaultRawEntry.hdl;
    189194    }
     195#else
     196    exception_table[i].hdl              = exception_config.defaultRawEntry.hdl;
     197#endif
    190198    exception_table[i].hdl.vector       = i;
    191     exception_table[i].on               = nop_except_enable;
    192     exception_table[i].off              = nop_except_enable;
    193     exception_table[i].isOn             = except_always_enabled;
    194   }
    195   if (!mpc60x_init_exceptions(&exception_config)) {
     199    exception_table[i].on               = exception_nop_enable;
     200    exception_table[i].off              = exception_nop_enable;
     201    exception_table[i].isOn             = exception_always_enabled;
     202  }
     203  if (!ppc_init_exceptions(&exception_config)) {
    196204    BSP_panic("Exception handling initialization failed\n");
    197205  }
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