Changeset 7171baf in rtems


Ignore:
Timestamp:
Jan 31, 2011, 3:46:13 PM (8 years ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
4.11, master
Children:
b10be06
Parents:
f95073ab
Message:

2011-01-31 Sebastian Huber <sebastian.huber@…>

  • rtems/powerpc/registers.h: Changed Freescale EIS prefix. More Freescale EIS defines. Added MSR_IS, MSR_DS, and MSR_PMM defines.
Location:
cpukit/score/cpu/powerpc
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • cpukit/score/cpu/powerpc/ChangeLog

    rf95073ab r7171baf  
     12011-01-31      Sebastian Huber <sebastian.huber@embedded-brains.de>
     2
     3        * rtems/powerpc/registers.h: Changed Freescale EIS prefix.  More
     4        Freescale EIS defines.  Added MSR_IS, MSR_DS, and MSR_PMM defines.
     5
    162011-01-26      Sebastian Huber <sebastian.huber@embedded-brains.de>
    27
  • cpukit/score/cpu/powerpc/rtems/powerpc/registers.h

    rf95073ab r7171baf  
    3838#define MSR_IR          (1<<5)          /* Instruction MMU enable */
    3939#define MSR_DR          (1<<4)          /* Data MMU enable */
     40#define MSR_IS          (1<<5)          /* Instruction address space */
     41#define MSR_DS          (1<<4)          /* Data address space */
     42#define MSR_PMM         (1<<2)          /* Performance monitor mark */
    4043#define MSR_RI          (1<<1)          /* Recoverable Exception */
    4144#define MSR_LE          (1<<0)          /* Little-Endian enable */
     
    320323/* Freescale Book E Implementation Standards (EIS): MMU Control and Status */
    321324
    322 #define FREESCALE_EIS_MAS0 624
    323 #define FREESCALE_EIS_MAS1 625
    324 #define FREESCALE_EIS_MAS2 626
    325 #define FREESCALE_EIS_MAS3 627
    326 #define FREESCALE_EIS_MAS4 628
    327 #define FREESCALE_EIS_MAS5 629
    328 #define FREESCALE_EIS_MAS6 630
    329 #define FREESCALE_EIS_MAS7 944
    330 #define FREESCALE_EIS_MMUCFG 1015
    331 #define FREESCALE_EIS_MMUCSR0 1012
    332 #define FREESCALE_EIS_PID0 48
    333 #define FREESCALE_EIS_PID1 633
    334 #define FREESCALE_EIS_PID2 634
    335 #define FREESCALE_EIS_TLB0CFG 688
    336 #define FREESCALE_EIS_TLB1CFG 689
     325#define FSL_EIS_MAS0 624
     326#define FSL_EIS_MAS0_TLBSEL (1 << (63 - 35))
     327#define FSL_EIS_MAS0_ESEL(n) ((0xf & (n)) << (63 - 47))
     328#define FSL_EIS_MAS0_ESEL_GET(m) (((m) >> (63 - 47)) & 0xf)
     329#define FSL_EIS_MAS0_NV (1 << (63 - 63))
     330
     331#define FSL_EIS_MAS1 625
     332#define FSL_EIS_MAS1_V (1 << (63 - 32))
     333#define FSL_EIS_MAS1_IPROT (1 << (63 - 33))
     334#define FSL_EIS_MAS1_TID(n) ((0xff & (n)) << (63 - 47))
     335#define FSL_EIS_MAS1_TID_GET(n) (((n) >> (63 - 47)) & 0xfff)
     336#define FSL_EIS_MAS1_TS (1 << (63 - 51))
     337#define FSL_EIS_MAS1_TSIZE(n) ((0xf & (n)) << (63 - 55))
     338#define FSL_EIS_MAS1_TSIZE_GET(n) (((n)>>(63 - 55)) & 0xf)
     339
     340#define FSL_EIS_MAS2 626
     341#define FSL_EIS_MAS2_EPN(n) ((((1 << 21) - 1)&(n)) << (63-51))
     342#define FSL_EIS_MAS2_EPN_GET(n) (((n) >> (63 - 51)) & 0xfffff)
     343#define FSL_EIS_MAS2_EA(n) FSL_EIS_MAS2_EPN((n) >> 12)
     344#define FSL_EIS_MAS2_EA_GET(n) (FSL_EIS_MAS2_EPN_GET(n) << 12)
     345#define FSL_EIS_MAS2_X0 (1 << (63 - 57))
     346#define FSL_EIS_MAS2_X1 (1 << (63 - 58))
     347#define FSL_EIS_MAS2_W (1 << (63 - 59))
     348#define FSL_EIS_MAS2_I (1 << (63 - 60))
     349#define FSL_EIS_MAS2_M (1 << (63 - 61))
     350#define FSL_EIS_MAS2_G (1 << (63 - 62))
     351#define FSL_EIS_MAS2_E (1 << (63 - 63))
     352#define FSL_EIS_MAS2_ATTR(x) ((x) & 0x7f)
     353#define FSL_EIS_MAS2_ATTR_GET(x) ((x) & 0x7f)
     354
     355#define FSL_EIS_MAS3 627
     356#define FSL_EIS_MAS3_RPN(n) ((((1 << 21) - 1) & (n)) << (63-51))
     357#define FSL_EIS_MAS3_RPN_GET(n) (((n)>>(63 - 51)) & 0xfffff)
     358#define FSL_EIS_MAS3_RA(n) FSL_EIS_MAS3_RPN((n) >> 12)
     359#define FSL_EIS_MAS3_RA_GET(n) (FSL_EIS_MAS3_RPN_GET(n) << 12)
     360#define FSL_EIS_MAS3_U0 (1 << (63 - 54))
     361#define FSL_EIS_MAS3_U1 (1 << (63 - 55))
     362#define FSL_EIS_MAS3_U2 (1 << (63 - 56))
     363#define FSL_EIS_MAS3_U3 (1 << (63 - 57))
     364#define FSL_EIS_MAS3_UX (1 << (63 - 58))
     365#define FSL_EIS_MAS3_SX (1 << (63 - 59))
     366#define FSL_EIS_MAS3_UW (1 << (63 - 60))
     367#define FSL_EIS_MAS3_SW (1 << (63 - 61))
     368#define FSL_EIS_MAS3_UR (1 << (63 - 62))
     369#define FSL_EIS_MAS3_SR (1 << (63 - 63))
     370#define FSL_EIS_MAS3_PERM(n) ((n) & 0x3ff)
     371#define FSL_EIS_MAS3_PERM_GET(n) ((n) & 0x3ff)
     372
     373#define FSL_EIS_MAS4 628
     374#define FSL_EIS_MAS4_TLBSELD (1 << (63 - 35))
     375#define FSL_EIS_MAS4_TIDSELD(n) ((0x3 & (n)) << (63 - 47))
     376#define FSL_EIS_MAS4_TSIZED(n) ((0xf & (n)) << (63 - 55))
     377#define FSL_EIS_MAS4_X0D FSL_EIS_MAS2_X0
     378#define FSL_EIS_MAS4_X1D FSL_EIS_MAS2_X1
     379#define FSL_EIS_MAS4_WD FSL_EIS_MAS2_W
     380#define FSL_EIS_MAS4_ID FSL_EIS_MAS2_I
     381#define FSL_EIS_MAS4_MD FSL_EIS_MAS2_M
     382#define FSL_EIS_MAS4_GD FSL_EIS_MAS2_G
     383#define FSL_EIS_MAS4_ED FSL_EIS_MAS2_E
     384
     385#define FSL_EIS_MAS5 629
     386
     387#define FSL_EIS_MAS6 630
     388#define FSL_EIS_MAS6_SPID0(n) ((0xff & (n)) << (63 - 55))
     389#define FSL_EIS_MAS6_SAS (1 << (63 - 63))
     390
     391#define FSL_EIS_MAS7 944
     392
     393#define FSL_EIS_MMUCFG 1015
     394#define FSL_EIS_MMUCSR0 1012
     395#define FSL_EIS_PID0 48
     396#define FSL_EIS_PID1 633
     397#define FSL_EIS_PID2 634
     398#define FSL_EIS_TLB0CFG 688
     399#define FSL_EIS_TLB1CFG 689
    337400
    338401/* Freescale Book E Implementation Standards (EIS): L1 Cache */
    339402
    340 #define FREESCALE_EIS_L1CFG0 515
    341 #define FREESCALE_EIS_L1CFG1 516
    342 #define FREESCALE_EIS_L1CSR0 1010
    343 #define FREESCALE_EIS_L1CSR1 1011
     403#define FSL_EIS_L1CFG0 515
     404#define FSL_EIS_L1CFG1 516
     405#define FSL_EIS_L1CSR0 1010
     406#define FSL_EIS_L1CSR1 1011
    344407
    345408/**
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