Changeset 7068d7ac in rtems


Ignore:
Timestamp:
May 17, 2005, 3:05:03 PM (15 years ago)
Author:
Jennifer Averett <Jennifer.Averett@…>
Branches:
4.10, 4.11, 4.8, 4.9, master
Children:
d8999b7
Parents:
490fd4a
Message:

2005-05-17 Jennifer Averett <jennifer.averett@…>

  • irq/irq.c, irq/irq.h: Modified to use rtems/irq.h.
Location:
c/src/lib/libbsp/powerpc
Files:
9 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/powerpc/mpc8260ads/ChangeLog

    r490fd4a r7068d7ac  
     12005-05-17      Jennifer Averett <jennifer.averett@oarcorp.com>
     2
     3        * irq/irq.c, irq/irq.h: Modified to use rtems/irq.h.
     4
    152005-05-10      Ralf Corsepius <ralf.corsepius@rtems.org>
    26
  • c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq.c

    r490fd4a r7068d7ac  
    4242 * Check if symbolic IRQ name is an CPM IRQ
    4343 */
    44 static inline int is_cpm_irq(const rtems_irq_symbolic_name irqLine)
     44static inline int is_cpm_irq(const rtems_irq_number irqLine)
    4545{
    4646        return (((int) irqLine <= BSP_CPM_IRQ_MAX_OFFSET) &
     
    5252 * Check if symbolic IRQ name is a Processor IRQ
    5353 */
    54 static inline int is_processor_irq(const rtems_irq_symbolic_name irqLine)
     54static inline int is_processor_irq(const rtems_irq_number irqLine)
    5555{
    5656        return (((int) irqLine <= BSP_PROCESSOR_IRQ_MAX_OFFSET) &
     
    197197}
    198198
    199 int BSP_irq_enable_at_cpm(const rtems_irq_symbolic_name irqLine)
     199int BSP_irq_enable_at_cpm(const rtems_irq_number irqLine)
    200200{
    201201        int cpm_irq_index;
     
    212212}
    213213
    214 int BSP_irq_disable_at_cpm(const rtems_irq_symbolic_name irqLine)
     214int BSP_irq_disable_at_cpm(const rtems_irq_number irqLine)
    215215{
    216216        int cpm_irq_index;
     
    227227}
    228228
    229 int BSP_irq_enabled_at_cpm(const rtems_irq_symbolic_name irqLine)
     229int BSP_irq_enabled_at_cpm(const rtems_irq_number irqLine)
    230230{
    231231        int cpm_irq_index;
  • c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq.h

    r490fd4a r7068d7ac  
    2727 */
    2828
    29 #ifndef LIBBSP_POWERPC_MBX8XX_IRQ_IRQ_H
    30 #define LIBBSP_POWERPC_MBX8XX_IRQ_IRQ_H
     29#ifndef LIBBSP_POWERPC_IRQ_H
     30#define LIBBSP_POWERPC_IRQ_H
     31#include <rtems/irq.h>
    3132
    3233#define BSP_ASM_IRQ_VECTOR_BASE 0x0
     
    4647 */
    4748
    48 typedef enum {
    4949  /* Base vector for our SIU IRQ handlers. */
    50   BSP_SIU_VECTOR_BASE   =       BSP_ASM_IRQ_VECTOR_BASE,
     50#define BSP_SIU_VECTOR_BASE             (BSP_ASM_IRQ_VECTOR_BASE)
    5151
    5252  /*
     
    5454   * CAUTION : BSP_CPM_IRQ_LOWEST_OFFSET should be equal to OPENPIC_VEC_SOURCE
    5555   */
    56   BSP_CPM_IRQ_NUMBER            =       64,
    57   BSP_CPM_IRQ_LOWEST_OFFSET     =       BSP_SIU_VECTOR_BASE,
    58   BSP_CPM_IRQ_MAX_OFFSET        =       BSP_CPM_IRQ_LOWEST_OFFSET + BSP_CPM_IRQ_NUMBER - 1,
     56#define BSP_CPM_IRQ_NUMBER              (64)
     57#define BSP_CPM_IRQ_LOWEST_OFFSET       (BSP_SIU_VECTOR_BASE)
     58#define BSP_CPM_IRQ_MAX_OFFSET          (BSP_CPM_IRQ_LOWEST_OFFSET + BSP_CPM_IRQ_NUMBER - 1)
    5959  /*
    6060   * PowerPc exceptions handled as interrupt where a rtems managed interrupt
    6161   * handler might be connected
    6262   */
    63   BSP_PROCESSOR_IRQ_NUMBER      =       1,
    64   BSP_PROCESSOR_IRQ_LOWEST_OFFSET =     BSP_CPM_IRQ_MAX_OFFSET + 1,
    65   BSP_PROCESSOR_IRQ_MAX_OFFSET  =       BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER - 1,
     63#define BSP_PROCESSOR_IRQ_NUMBER        (1)
     64#define BSP_PROCESSOR_IRQ_LOWEST_OFFSET (BSP_CPM_IRQ_MAX_OFFSET + 1)
     65#define BSP_PROCESSOR_IRQ_MAX_OFFSET    (BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER - 1)
    6666  /*
    6767   * Summary
    6868   */
    69   BSP_IRQ_NUMBER                =       BSP_PROCESSOR_IRQ_MAX_OFFSET + 1,
    70   BSP_LOWEST_OFFSET             =       BSP_CPM_IRQ_LOWEST_OFFSET,
    71   BSP_MAX_OFFSET                =       BSP_PROCESSOR_IRQ_MAX_OFFSET,
     69#define BSP_IRQ_NUMBER                  (BSP_PROCESSOR_IRQ_MAX_OFFSET + 1)
     70#define BSP_LOWEST_OFFSET               (BSP_CPM_IRQ_LOWEST_OFFSET)
     71#define BSP_MAX_OFFSET                  (BSP_PROCESSOR_IRQ_MAX_OFFSET)
    7272
    7373  /*
     
    8888   * Some CPM IRQ symbolic name definition
    8989   */
    90   BSP_CPM_IRQ_ERROR             =       BSP_CPM_IRQ_LOWEST_OFFSET,
    91   BSP_CPM_IRQ_I2C               =       BSP_CPM_IRQ_LOWEST_OFFSET + 1,
    92   BSP_CPM_IRQ_SPI               =       BSP_CPM_IRQ_LOWEST_OFFSET + 2,
    93   BSP_CPM_IRQ_RISC_TIMERS       =       BSP_CPM_IRQ_LOWEST_OFFSET + 3,
    94   BSP_CPM_IRQ_SMC1              =       BSP_CPM_IRQ_LOWEST_OFFSET + 4,
    95   BSP_CPM_IRQ_SMC2              =       BSP_CPM_IRQ_LOWEST_OFFSET + 5,
    96   BSP_CPM_IRQ_IDMA1             =       BSP_CPM_IRQ_LOWEST_OFFSET + 6,
    97   BSP_CPM_IRQ_IDMA2             =       BSP_CPM_IRQ_LOWEST_OFFSET + 7,
    98   BSP_CPM_IRQ_IDMA3             =       BSP_CPM_IRQ_LOWEST_OFFSET + 8,
    99   BSP_CPM_IRQ_IDMA4             =       BSP_CPM_IRQ_LOWEST_OFFSET + 9,
    100   BSP_CPM_IRQ_SDMA              =       BSP_CPM_IRQ_LOWEST_OFFSET + 10,
     90#define BSP_CPM_IRQ_ERROR               (BSP_CPM_IRQ_LOWEST_OFFSET + 0)
     91#define BSP_CPM_IRQ_I2C                 (BSP_CPM_IRQ_LOWEST_OFFSET + 1)
     92#define BSP_CPM_IRQ_SPI                 (BSP_CPM_IRQ_LOWEST_OFFSET + 2)
     93#define BSP_CPM_IRQ_RISC_TIMERS         (BSP_CPM_IRQ_LOWEST_OFFSET + 3)
     94#define BSP_CPM_IRQ_SMC1                (BSP_CPM_IRQ_LOWEST_OFFSET + 4)
     95#define BSP_CPM_IRQ_SMC2                (BSP_CPM_IRQ_LOWEST_OFFSET + 5)
     96#define BSP_CPM_IRQ_IDMA1               (BSP_CPM_IRQ_LOWEST_OFFSET + 6)
     97#define BSP_CPM_IRQ_IDMA2               (BSP_CPM_IRQ_LOWEST_OFFSET + 7)
     98#define BSP_CPM_IRQ_IDMA3               (BSP_CPM_IRQ_LOWEST_OFFSET + 8)
     99#define BSP_CPM_IRQ_IDMA4               (BSP_CPM_IRQ_LOWEST_OFFSET + 9)
     100#define BSP_CPM_IRQ_SDMA                (BSP_CPM_IRQ_LOWEST_OFFSET + 10)
    101101
    102   BSP_CPM_IRQ_TIMER_1           =       BSP_CPM_IRQ_LOWEST_OFFSET + 12,
    103   BSP_CPM_IRQ_TIMER_2           =       BSP_CPM_IRQ_LOWEST_OFFSET + 13,
    104   BSP_CPM_IRQ_TIMER_3           =       BSP_CPM_IRQ_LOWEST_OFFSET + 14,
    105   BSP_CPM_IRQ_TIMER_4           =       BSP_CPM_IRQ_LOWEST_OFFSET + 15,
    106   BSP_CPM_IRQ_TMCNT             =       BSP_CPM_IRQ_LOWEST_OFFSET + 16,
    107   BSP_CPM_IRQ_PIT               =       BSP_CPM_IRQ_LOWEST_OFFSET + 17,
     102#define BSP_CPM_IRQ_TIMER_1             (BSP_CPM_IRQ_LOWEST_OFFSET + 12)
     103#define BSP_CPM_IRQ_TIMER_2             (BSP_CPM_IRQ_LOWEST_OFFSET + 13)
     104#define BSP_CPM_IRQ_TIMER_3             (BSP_CPM_IRQ_LOWEST_OFFSET + 14)
     105#define BSP_CPM_IRQ_TIMER_4             (BSP_CPM_IRQ_LOWEST_OFFSET + 15)
     106#define BSP_CPM_IRQ_TMCNT               (BSP_CPM_IRQ_LOWEST_OFFSET + 16)
     107#define BSP_CPM_IRQ_PIT                 (BSP_CPM_IRQ_LOWEST_OFFSET + 17)
    108108
    109   BSP_CPM_IRQ_IRQ1              =       BSP_CPM_IRQ_LOWEST_OFFSET + 19,
    110   BSP_CPM_IRQ_IRQ2              =       BSP_CPM_IRQ_LOWEST_OFFSET + 20,
    111   BSP_CPM_IRQ_IRQ3              =       BSP_CPM_IRQ_LOWEST_OFFSET + 21,
    112   BSP_CPM_IRQ_IRQ4              =       BSP_CPM_IRQ_LOWEST_OFFSET + 22,
    113   BSP_CPM_IRQ_IRQ5              =       BSP_CPM_IRQ_LOWEST_OFFSET + 23,
    114   BSP_CPM_IRQ_IRQ6              =       BSP_CPM_IRQ_LOWEST_OFFSET + 24,
    115   BSP_CPM_IRQ_IRQ7              =       BSP_CPM_IRQ_LOWEST_OFFSET + 25,
     109#define BSP_CPM_IRQ_IRQ1                (BSP_CPM_IRQ_LOWEST_OFFSET + 19)
     110#define BSP_CPM_IRQ_IRQ2                (BSP_CPM_IRQ_LOWEST_OFFSET + 20)
     111#define BSP_CPM_IRQ_IRQ3                (BSP_CPM_IRQ_LOWEST_OFFSET + 21)
     112#define BSP_CPM_IRQ_IRQ4                (BSP_CPM_IRQ_LOWEST_OFFSET + 22)
     113#define BSP_CPM_IRQ_IRQ5                (BSP_CPM_IRQ_LOWEST_OFFSET + 23)
     114#define BSP_CPM_IRQ_IRQ6                (BSP_CPM_IRQ_LOWEST_OFFSET + 24)
     115#define BSP_CPM_IRQ_IRQ7                (BSP_CPM_IRQ_LOWEST_OFFSET + 25)
    116116
    117   BSP_CPM_IRQ_FCC1              =       BSP_CPM_IRQ_LOWEST_OFFSET + 32,
    118   BSP_CPM_IRQ_FCC2              =       BSP_CPM_IRQ_LOWEST_OFFSET + 33,
    119   BSP_CPM_IRQ_FCC3              =       BSP_CPM_IRQ_LOWEST_OFFSET + 34,
     117#define BSP_CPM_IRQ_FCC1                (BSP_CPM_IRQ_LOWEST_OFFSET + 32)
     118#define BSP_CPM_IRQ_FCC2                (BSP_CPM_IRQ_LOWEST_OFFSET + 33)
     119#define BSP_CPM_IRQ_FCC3                (BSP_CPM_IRQ_LOWEST_OFFSET + 34)
     120#define BSP_CPM_IRQ_MCC1                (BSP_CPM_IRQ_LOWEST_OFFSET + 36)
     121#define BSP_CPM_IRQ_MCC2                (BSP_CPM_IRQ_LOWEST_OFFSET + 37)
    120122
    121   BSP_CPM_IRQ_MCC1              =       BSP_CPM_IRQ_LOWEST_OFFSET + 36,
    122   BSP_CPM_IRQ_MCC2              =       BSP_CPM_IRQ_LOWEST_OFFSET + 37,
     123#define BSP_CPM_IRQ_SCC1                (BSP_CPM_IRQ_LOWEST_OFFSET + 40)
     124#define BSP_CPM_IRQ_SCC2                (BSP_CPM_IRQ_LOWEST_OFFSET + 41)
     125#define BSP_CPM_IRQ_SCC3                (BSP_CPM_IRQ_LOWEST_OFFSET + 42)
     126#define BSP_CPM_IRQ_SCC4                (BSP_CPM_IRQ_LOWEST_OFFSET + 43)
    123127
    124   BSP_CPM_IRQ_SCC1              =       BSP_CPM_IRQ_LOWEST_OFFSET + 40,
    125   BSP_CPM_IRQ_SCC2              =       BSP_CPM_IRQ_LOWEST_OFFSET + 41,
    126   BSP_CPM_IRQ_SCC3              =       BSP_CPM_IRQ_LOWEST_OFFSET + 42,
    127   BSP_CPM_IRQ_SCC4              =       BSP_CPM_IRQ_LOWEST_OFFSET + 43,
    128 
    129   BSP_CPM_IRQ_PC15              =       BSP_CPM_IRQ_LOWEST_OFFSET + 48,
    130   BSP_CPM_IRQ_PC14              =       BSP_CPM_IRQ_LOWEST_OFFSET + 49,
    131   BSP_CPM_IRQ_PC13              =       BSP_CPM_IRQ_LOWEST_OFFSET + 50,
    132   BSP_CPM_IRQ_PC12              =       BSP_CPM_IRQ_LOWEST_OFFSET + 51,
    133   BSP_CPM_IRQ_PC11              =       BSP_CPM_IRQ_LOWEST_OFFSET + 52,
    134   BSP_CPM_IRQ_PC10              =       BSP_CPM_IRQ_LOWEST_OFFSET + 53,
    135   BSP_CPM_IRQ_PC9               =       BSP_CPM_IRQ_LOWEST_OFFSET + 54,
    136   BSP_CPM_IRQ_PC8               =       BSP_CPM_IRQ_LOWEST_OFFSET + 55,
    137   BSP_CPM_IRQ_PC7               =       BSP_CPM_IRQ_LOWEST_OFFSET + 56,
    138   BSP_CPM_IRQ_PC6               =       BSP_CPM_IRQ_LOWEST_OFFSET + 57,
    139   BSP_CPM_IRQ_PC5               =       BSP_CPM_IRQ_LOWEST_OFFSET + 58,
    140   BSP_CPM_IRQ_PC4               =       BSP_CPM_IRQ_LOWEST_OFFSET + 59,
    141   BSP_CPM_IRQ_PC3               =       BSP_CPM_IRQ_LOWEST_OFFSET + 60,
    142   BSP_CPM_IRQ_PC2               =       BSP_CPM_IRQ_LOWEST_OFFSET + 61,
    143   BSP_CPM_IRQ_PC1               =       BSP_CPM_IRQ_LOWEST_OFFSET + 62,
    144   BSP_CPM_IRQ_PC0               =       BSP_CPM_IRQ_LOWEST_OFFSET + 63,
     128#define BSP_CPM_IRQ_PC15                (BSP_CPM_IRQ_LOWEST_OFFSET + 48)
     129#define BSP_CPM_IRQ_PC14                (BSP_CPM_IRQ_LOWEST_OFFSET + 49)
     130#define BSP_CPM_IRQ_PC13                (BSP_CPM_IRQ_LOWEST_OFFSET + 50)
     131#define BSP_CPM_IRQ_PC12                (BSP_CPM_IRQ_LOWEST_OFFSET + 51)
     132#define BSP_CPM_IRQ_PC11                (BSP_CPM_IRQ_LOWEST_OFFSET + 52)
     133#define BSP_CPM_IRQ_PC10                (BSP_CPM_IRQ_LOWEST_OFFSET + 53)
     134#define BSP_CPM_IRQ_PC9                 (BSP_CPM_IRQ_LOWEST_OFFSET + 54)
     135#define BSP_CPM_IRQ_PC8                 (BSP_CPM_IRQ_LOWEST_OFFSET + 55)
     136#define BSP_CPM_IRQ_PC7                 (BSP_CPM_IRQ_LOWEST_OFFSET + 56)
     137#define BSP_CPM_IRQ_PC6                 (BSP_CPM_IRQ_LOWEST_OFFSET + 57)
     138#define BSP_CPM_IRQ_PC5                 (BSP_CPM_IRQ_LOWEST_OFFSET + 58)
     139#define BSP_CPM_IRQ_PC4                 (BSP_CPM_IRQ_LOWEST_OFFSET + 59)
     140#define BSP_CPM_IRQ_PC3                 (BSP_CPM_IRQ_LOWEST_OFFSET + 60)
     141#define BSP_CPM_IRQ_PC2                 (BSP_CPM_IRQ_LOWEST_OFFSET + 61)
     142#define BSP_CPM_IRQ_PC1                 (BSP_CPM_IRQ_LOWEST_OFFSET + 62)
     143#define BSP_CPM_IRQ_PC0                 (BSP_CPM_IRQ_LOWEST_OFFSET + 63)
    145144
    146145    /*
    147146     * Some Processor exception handled as rtems IRQ symbolic name definition
    148147     */
    149   BSP_DECREMENTER               =       BSP_PROCESSOR_IRQ_LOWEST_OFFSET,
    150   BSP_PERIODIC_TIMER            =       BSP_DECREMENTER
     148#define BSP_DECREMENTER                 (BSP_PROCESSOR_IRQ_LOWEST_OFFSET)
     149#define BSP_PERIODIC_TIMER              (BSP_DECREMENTER)
    151150
    152 }rtems_irq_symbolic_name;
    153151
    154152#define CPM_INTERRUPT
    155 
    156 /*
    157  * Type definition for RTEMS managed interrupts
    158  */
    159 typedef unsigned char  rtems_irq_prio;
    160 struct  __rtems_irq_connect_data__;     /* forward declaratiuon */
    161 
    162 typedef void *rtems_irq_hdl_param;
    163 typedef void (*rtems_irq_hdl)           (rtems_irq_hdl_param);
    164 typedef void (*rtems_irq_enable)        (const struct __rtems_irq_connect_data__*);
    165 typedef void (*rtems_irq_disable)       (const struct __rtems_irq_connect_data__*);
    166 typedef int  (*rtems_irq_is_enabled)    (const struct __rtems_irq_connect_data__*);
    167 
    168 typedef struct __rtems_irq_connect_data__ {
    169   /*
    170    * IRQ line
    171    */
    172   rtems_irq_symbolic_name       name;
    173   /*
    174    * handler. See comment on handler properties below in function prototype.
    175    */
    176   rtems_irq_hdl                 hdl;
    177   /*
    178    * Handler handle to store private data
    179    */
    180    rtems_irq_hdl_param          handle;
    181   /*
    182    * function for enabling interrupts at device level (ONLY!).
    183    * The BSP code will automatically enable it at SIU level and CPM level.
    184    * RATIONALE : anyway such code has to exist in current driver code.
    185    * It is usually called immediately AFTER connecting the interrupt handler.
    186    * RTEMS may well need such a function when restoring normal interrupt
    187    * processing after a debug session.
    188    *
    189    */
    190     rtems_irq_enable            on;
    191   /*
    192    * function for disabling interrupts at device level (ONLY!).
    193    * The code will disable it at SIU and CPM level. RATIONALE : anyway
    194    * such code has to exist for clean shutdown. It is usually called
    195    * BEFORE disconnecting the interrupt. RTEMS may well need such
    196    * a function when disabling normal interrupt processing for
    197    * a debug session. May well be a NOP function.
    198    */
    199   rtems_irq_disable             off;
    200   /*
    201    * function enabling to know what interrupt may currently occur
    202    * if someone manipulates the i8259s interrupt mask without care...
    203    */
    204     rtems_irq_is_enabled        isOn;
    205 } rtems_irq_connect_data;
    206 
    207 typedef struct {
    208   /*
    209    * size of all the table fields (*Tbl) described below.
    210    */
    211   unsigned int                  irqNb;
    212   /*
    213    * Default handler used when disconnecting interrupts.
    214    */
    215   rtems_irq_connect_data        defaultEntry;
    216   /*
    217    * Table containing initials/current value.
    218    */
    219   rtems_irq_connect_data*       irqHdlTbl;
    220   /*
    221    * actual value of BSP_SIU_IRQ_VECTOR_BASE...
    222    */
    223   rtems_irq_symbolic_name       irqBase;
    224   /*
    225    * software priorities associated with interrupts.
    226    * if irqPrio  [i]  >  intrPrio  [j]  it  means  that
    227    * interrupt handler hdl connected for interrupt name i
    228    * will  not be interrupted by the handler connected for interrupt j
    229    * The interrupt source  will be physically masked at i8259 level.
    230    */
    231     rtems_irq_prio*             irqPrioTbl;
    232 }rtems_irq_global_settings;
    233153
    234154/*-------------------------------------------------------------------------+
     
    244164 * not be propagated further to the processor
    245165 */
    246 int BSP_irq_disable_at_cpm        (const rtems_irq_symbolic_name irqLine);
     166int BSP_irq_disable_at_cpm        (const rtems_irq_number irqLine);
    247167/*
    248168 * function to enable a particular irq. After calling
     
    250170 * be propagated further to the processor
    251171 */
    252 int BSP_irq_enable_at_cpm               (const rtems_irq_symbolic_name irqLine);
     172int BSP_irq_enable_at_cpm               (const rtems_irq_number irqLine);
    253173/*
    254174 * function to acknoledge a particular irq. After calling
     
    258178 * handlers.
    259179 */
    260 int BSP_irq_ack_at_cpm                  (const rtems_irq_symbolic_name irqLine);
     180int BSP_irq_ack_at_cpm                  (const rtems_irq_number irqLine);
    261181/*
    262182 * function to check if a particular irq is enabled. After calling
    263183 */
    264 int BSP_irq_enabled_at_cpm      (const rtems_irq_symbolic_name irqLine);
    265 
    266 /*
    267  * ------------------------ RTEMS Single Irq Handler Mngt Routines ----------------
    268  */
    269 /*
    270  * function to connect a particular irq handler. This hanlder will NOT be called
    271  * directly as the result of the corresponding interrupt. Instead, a RTEMS
    272  * irq prologue will be called that will :
    273  *
    274  *      1) save the C scratch registers,
    275  *      2) switch to a interrupt stack if the interrupt is not nested,
    276  *      4) modify them to disable the current interrupt at  SIU level (and may
    277  *      be others depending on software priorities)
    278  *      5) aknowledge the SIU',
    279  *      6) demask the processor,
    280  *      7) call the application handler
    281  *
    282  * As a result the hdl function provided
    283  *
    284  *      a) can perfectly be written is C,
    285  *      b) may also well directly call the part of the RTEMS API that can be used
    286  *      from interrupt level,
    287  *      c) It only responsible for handling the jobs that need to be done at
    288  *      the device level including (aknowledging/re-enabling the interrupt at device,
    289  *      level, getting the data,...)
    290  *
    291  *      When returning from the function, the following will be performed by
    292  *      the RTEMS irq epilogue :
    293  *
    294  *      1) masks the interrupts again,
    295  *      2) restore the original SIU interrupt masks
    296  *      3) switch back on the orinal stack if needed,
    297  *      4) perform rescheduling when necessary,
    298  *      5) restore the C scratch registers...
    299  *      6) restore initial execution flow
    300  *
    301  */
    302 int BSP_install_rtems_irq_handler       (const rtems_irq_connect_data*);
    303 /*
    304  * function to get the current RTEMS irq handler for ptr->name. It enables to
    305  * define hanlder chain...
    306  */
    307 int BSP_get_current_rtems_irq_handler   (rtems_irq_connect_data* ptr);
    308 /*
    309  * function to get disconnect the RTEMS irq handler for ptr->name.
    310  * This function checks that the value given is the current one for safety reason.
    311  * The user can use the previous function to get it.
    312  */
    313 int BSP_remove_rtems_irq_handler        (const rtems_irq_connect_data*);
    314 
    315 /*
    316  * ------------------------ RTEMS Global Irq Handler Mngt Routines ----------------
    317  */
    318 /*
    319  * (Re) Initialize the RTEMS interrupt management.
    320  *
    321  * The result of calling this function will be the same as if each individual
    322  * handler (config->irqHdlTbl[i].hdl)  different from "config->defaultEntry.hdl"
    323  * has been individualy connected via
    324  *      BSP_install_rtems_irq_handler(&config->irqHdlTbl[i])
    325  * And each handler currently equal to config->defaultEntry.hdl
    326  * has been previously disconnected via
    327  *       BSP_remove_rtems_irq_handler (&config->irqHdlTbl[i])
    328  *
    329  * This is to say that all information given will be used and not just
    330  * only the space.
    331  *
    332  * CAUTION : the various table address contained in config will be used
    333  *           directly by the interrupt mangement code in order to save
    334  *           data size so they must stay valid after the call => they should
    335  *           not be modified or declared on a stack.
    336  */
    337 
    338 int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config);
    339 /*
    340  * (Re) get info on current RTEMS interrupt management.
    341  */
    342 int BSP_rtems_irq_mngt_get(rtems_irq_global_settings**);
     184int BSP_irq_enabled_at_cpm      (const rtems_irq_number irqLine);
    343185
    344186extern void BSP_rtems_irq_mng_init(unsigned cpuId);
  • c/src/lib/libbsp/powerpc/psim/ChangeLog

    r490fd4a r7068d7ac  
     12005-05-17      Jennifer Averett <jennifer.averett@oarcorp.com>
     2
     3        * irq/irq.c, irq/irq.h: Modified to use rtems/irq.h.
     4
    152005-05-11      Ralf Corsepius <ralf.corsepius@rtems.org>
    26
  • c/src/lib/libbsp/powerpc/psim/irq/irq.c

    r490fd4a r7068d7ac  
    5454 * Check if IRQ is an ISA IRQ
    5555 */
    56 static inline int is_isa_irq(const rtems_irq_symbolic_name irqLine)
     56static inline int is_isa_irq(const rtems_irq_number irqLine)
    5757{
    5858  return (((int) irqLine <= BSP_ISA_IRQ_MAX_OFFSET) &
     
    6464 * Check if IRQ is an OPENPIC IRQ
    6565 */
    66 static inline int is_pci_irq(const rtems_irq_symbolic_name irqLine)
     66static inline int is_pci_irq(const rtems_irq_number irqLine)
    6767{
    6868  return (((int) irqLine <= BSP_PCI_IRQ_MAX_OFFSET) &
     
    7474 * Check if IRQ is a Porcessor IRQ
    7575 */
    76 static inline int is_processor_irq(const rtems_irq_symbolic_name irqLine)
     76static inline int is_processor_irq(const rtems_irq_number irqLine)
    7777{
    7878  return (((int) irqLine <= BSP_PROCESSOR_IRQ_MAX_OFFSET) &
  • c/src/lib/libbsp/powerpc/psim/irq/irq.h

    r490fd4a r7068d7ac  
    1919 */
    2020
    21 #ifndef LIBBSP_POWERPC_MCP750_IRQ_IRQ_H
    22 #define LIBBSP_POWERPC_MCP750_IRQ_IRQ_H
     21#ifndef LIBBSP_POWERPC_IRQ_H
     22#define LIBBSP_POWERPC_IRQ_H
    2323
     24#define BSP_SHARED_HANDLER_SUPPORT      1
     25#include <rtems/irq.h>
    2426
    2527/*
     
    6062#ifndef ASM
    6163
    62 
    6364/*
    6465 * Symblolic IRQ names and related definitions.
    6566 */
    6667
    67 typedef enum {
    6868  /* Base vector for our ISA IRQ handlers. */
    69   BSP_ISA_IRQ_VECTOR_BASE       =       BSP_ASM_IRQ_VECTOR_BASE,
     69#define BSP_ISA_IRQ_VECTOR_BASE         (BSP_ASM_IRQ_VECTOR_BASE)
    7070  /*
    7171   * ISA IRQ handler related definitions
    7272   */
    73   BSP_ISA_IRQ_NUMBER            =       16,
    74   BSP_ISA_IRQ_LOWEST_OFFSET     =       0,
    75   BSP_ISA_IRQ_MAX_OFFSET        =       BSP_ISA_IRQ_LOWEST_OFFSET + BSP_ISA_IRQ_NUMBER - 1,
     73#define BSP_ISA_IRQ_NUMBER              (16)
     74#define BSP_ISA_IRQ_LOWEST_OFFSET       (0)
     75#define BSP_ISA_IRQ_MAX_OFFSET          (BSP_ISA_IRQ_LOWEST_OFFSET + BSP_ISA_IRQ_NUMBER-1)
    7676  /*
    7777   * PCI IRQ handlers related definitions
    7878   * CAUTION : BSP_PCI_IRQ_LOWEST_OFFSET should be equal to OPENPIC_VEC_SOURCE
    7979   */
    80   BSP_PCI_IRQ_NUMBER            =       16,
    81   BSP_PCI_IRQ_LOWEST_OFFSET     =       BSP_ISA_IRQ_NUMBER,
    82   BSP_PCI_IRQ_MAX_OFFSET        =       BSP_PCI_IRQ_LOWEST_OFFSET + BSP_PCI_IRQ_NUMBER - 1,
     80#define BSP_PCI_IRQ_NUMBER              (16)
     81#define BSP_PCI_IRQ_LOWEST_OFFSET       (BSP_ISA_IRQ_NUMBER)
     82#define BSP_PCI_IRQ_MAX_OFFSET          (BSP_PCI_IRQ_LOWEST_OFFSET+BSP_PCI_IRQ_NUMBER-1)
    8383  /*
    8484   * PowerPc exceptions handled as interrupt where a rtems managed interrupt
    8585   * handler might be connected
    8686   */
    87   BSP_PROCESSOR_IRQ_NUMBER      =       1,
    88   BSP_PROCESSOR_IRQ_LOWEST_OFFSET =     BSP_PCI_IRQ_MAX_OFFSET + 1,
    89   BSP_PROCESSOR_IRQ_MAX_OFFSET  =       BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER - 1,
     87#define BSP_PROCESSOR_IRQ_NUMBER        (1)
     88#define BSP_PROCESSOR_IRQ_LOWEST_OFFSET (BSP_PCI_IRQ_MAX_OFFSET + 1)
     89#define BSP_PROCESSOR_IRQ_MAX_OFFSET    (BSP_PROCESSOR_IRQ_LOWEST_OFFSET+BSP_PROCESSOR_IRQ_NUMBER-1)
    9090  /* Misc vectors for OPENPIC irqs (IPI, timers)
    9191   */
    92   BSP_MISC_IRQ_NUMBER           =       8,
    93   BSP_MISC_IRQ_LOWEST_OFFSET    =       BSP_PROCESSOR_IRQ_MAX_OFFSET + 1,
    94   BSP_MISC_IRQ_MAX_OFFSET       =       BSP_MISC_IRQ_LOWEST_OFFSET + BSP_MISC_IRQ_NUMBER - 1,
     92#define BSP_MISC_IRQ_NUMBER             (8)
     93#define BSP_MISC_IRQ_LOWEST_OFFSET      (BSP_PROCESSOR_IRQ_MAX_OFFSET + 1)
     94#define BSP_MISC_IRQ_MAX_OFFSET         (BSP_MISC_IRQ_LOWEST_OFFSET+BSP_MISC_IRQ_NUMBER-1)
    9595  /*
    9696   * Summary
    9797   */
    98   BSP_IRQ_NUMBER                =       BSP_MISC_IRQ_MAX_OFFSET + 1,
    99   BSP_LOWEST_OFFSET             =       BSP_ISA_IRQ_LOWEST_OFFSET,
    100   BSP_MAX_OFFSET                =       BSP_MISC_IRQ_MAX_OFFSET,
     98#define BSP_IRQ_NUMBER                  (BSP_MISC_IRQ_MAX_OFFSET + 1)
     99#define BSP_LOWEST_OFFSET               (BSP_ISA_IRQ_LOWEST_OFFSET)
     100#define BSP_MAX_OFFSET                  (BSP_MISC_IRQ_MAX_OFFSET)
    101101    /*
    102102     * Some ISA IRQ symbolic name definition
    103103     */       
    104   BSP_ISA_PERIODIC_TIMER        =       0,
     104#define BSP_ISA_PERIODIC_TIMER          (0)
    105105
    106   BSP_ISA_KEYBOARD              =       1,
     106#define BSP_ISA_KEYBOARD                (1)
    107107
    108   BSP_ISA_UART_COM2_IRQ         =       3,
     108#define BSP_ISA_UART_COM2_IRQ           (3)
    109109
    110   BSP_ISA_UART_COM1_IRQ         =       4,
     110#define BSP_ISA_UART_COM1_IRQ           (4)
    111111
    112   BSP_ISA_RT_TIMER1             =       8,
     112#define BSP_ISA_RT_TIMER1               (8)
    113113 
    114   BSP_ISA_RT_TIMER3             =       10,
     114#define BSP_ISA_RT_TIMER3               (10)
    115115    /*
    116116     * Some PCI IRQ symbolic name definition
    117117     */
    118   BSP_PCI_IRQ0                  =       BSP_PCI_IRQ_LOWEST_OFFSET,
    119   BSP_PCI_ISA_BRIDGE_IRQ        =       BSP_PCI_IRQ0,
     118#define BSP_PCI_IRQ0                    (BSP_PCI_IRQ_LOWEST_OFFSET)
     119#define BSP_PCI_ISA_BRIDGE_IRQ          (BSP_PCI_IRQ0)
    120120    /*
    121121     * Some Processor execption handled as rtems IRQ symbolic name definition
    122122     */
    123   BSP_DECREMENTER               =       BSP_PROCESSOR_IRQ_LOWEST_OFFSET
    124  
    125 }rtems_irq_symbolic_name;
     123#define BSP_DECREMENTER                 (BSP_PROCESSOR_IRQ_LOWEST_OFFSET)
    126124
    127    
     125typedef unsigned short rtems_i8259_masks;
     126extern  volatile rtems_i8259_masks i8259s_cache;
    128127
    129128
    130 /*
    131  * Type definition for RTEMS managed interrupts
    132  */
    133 typedef unsigned char  rtems_irq_prio;
    134 typedef unsigned short rtems_i8259_masks;
    135 
    136 extern  volatile rtems_i8259_masks i8259s_cache;
    137 
    138 struct  __rtems_irq_connect_data__;     /* forward declaratiuon */
    139 
    140 typedef void *rtems_irq_hdl_param;
    141 typedef void (*rtems_irq_hdl)           (rtems_irq_hdl_param);
    142 typedef void (*rtems_irq_enable)        (const struct __rtems_irq_connect_data__*);
    143 typedef void (*rtems_irq_disable)       (const struct __rtems_irq_connect_data__*);
    144 typedef int  (*rtems_irq_is_enabled)    (const struct __rtems_irq_connect_data__*);
    145 
    146 typedef struct __rtems_irq_connect_data__ {
    147       /*
    148        * IRQ line
    149        */
    150       rtems_irq_symbolic_name   name;
    151       /*
    152        * handler. See comment on handler properties below in function prototype.
    153        */
    154       rtems_irq_hdl                     hdl;
    155      /*
    156       * Handler handle to store private data
    157       */
    158       rtems_irq_hdl_param               handle;
    159       /*
    160        * function for enabling interrupts at device level (ONLY!).
    161        * The BSP code will automatically enable it at i8259s level and openpic level.
    162        * RATIONALE : anyway such code has to exist in current driver code.
    163        * It is usually called immediately AFTER connecting the interrupt handler.
    164        * RTEMS may well need such a function when restoring normal interrupt
    165        * processing after a debug session.
    166        *
    167        */
    168       rtems_irq_enable          on;     
    169       /*
    170        * function for disabling interrupts at device level (ONLY!).
    171        * The code will disable it at i8259s level. RATIONALE : anyway
    172        * such code has to exist for clean shutdown. It is usually called
    173        * BEFORE disconnecting the interrupt. RTEMS may well need such
    174        * a function when disabling normal interrupt processing for
    175        * a debug session. May well be a NOP function.
    176        */
    177       rtems_irq_disable         off;
    178       /*
    179        * function enabling to know what interrupt may currently occur
    180        * if someone manipulates the i8259s interrupt mask without care...
    181        */
    182       rtems_irq_is_enabled      isOn;
    183       /*
    184        *  Set to -1 for vectors forced to have only 1 handler
    185        */
    186       void *next_handler;
    187 
    188 }rtems_irq_connect_data;
    189 
    190 typedef struct {
    191   /*
    192    * size of all the table fields (*Tbl) described below.
    193    */
    194   unsigned int                  irqNb;
    195   /*
    196    * Default handler used when disconnecting interrupts.
    197    */
    198   rtems_irq_connect_data        defaultEntry;
    199   /*
    200    * Table containing initials/current value.
    201    */
    202   rtems_irq_connect_data*       irqHdlTbl;
    203   /*
    204    * actual value of BSP_ISA_IRQ_VECTOR_BASE...
    205    */
    206   rtems_irq_symbolic_name       irqBase;
    207   /*
    208    * software priorities associated with interrupts.
    209    * if irqPrio  [i]  >  intrPrio  [j]  it  means  that 
    210    * interrupt handler hdl connected for interrupt name i
    211    * will  not be interrupted by the handler connected for interrupt j
    212    * The interrupt source  will be physically masked at i8259 level.
    213    */
    214     rtems_irq_prio*             irqPrioTbl;
    215 }rtems_irq_global_settings;
    216 
    217 
    218 
    219 
    220 /*-------------------------------------------------------------------------+
    221 | Function Prototypes.
    222 +--------------------------------------------------------------------------*/
    223 /*
    224  * ------------------------ Intel 8259 (or emulation) Mngt Routines -------
    225  */
    226 
    227 /*
    228  * function to disable a particular irq at 8259 level. After calling
    229  * this function, even if the device asserts the interrupt line it will
    230  * not be propagated further to the processor
    231  */
    232 int BSP_irq_disable_at_i8259s        (const rtems_irq_symbolic_name irqLine);
    233 /*
    234  * function to enable a particular irq at 8259 level. After calling
    235  * this function, if the device asserts the interrupt line it will
    236  * be propagated further to the processor
    237  */
    238 int BSP_irq_enable_at_i8259s            (const rtems_irq_symbolic_name irqLine);
    239 /*
    240  * function to acknoledge a particular irq at 8259 level. After calling
    241  * this function, if a device asserts an enabled interrupt line it will
    242  * be propagated further to the processor. Mainly usefull for people
    243  * writting raw handlers as this is automagically done for rtems managed
    244  * handlers.
    245  */
    246 int BSP_irq_ack_at_i8259s               (const rtems_irq_symbolic_name irqLine);
    247 /*
    248  * function to check if a particular irq is enabled at 8259 level. After calling
    249  */
    250 int BSP_irq_enabled_at_i8259s           (const rtems_irq_symbolic_name irqLine);
    251 /*
    252  * ------------------------ RTEMS Single Irq Handler Mngt Routines ----------------
    253  */
    254 /*
    255  * function to connect a particular irq handler. This hanlder will NOT be called
    256  * directly as the result of the corresponding interrupt. Instead, a RTEMS
    257  * irq prologue will be called that will :
    258  *
    259  *      1) save the C scratch registers,
    260  *      2) switch to a interrupt stack if the interrupt is not nested,
    261  *      3) store the current i8259s' interrupt masks
    262  *      4) modify them to disable the current interrupt at 8259 level (and may
    263  *      be others depending on software priorities)
    264  *      5) aknowledge the i8259s',
    265  *      6) demask the processor,
    266  *      7) call the application handler
    267  *
    268  * As a result the hdl function provided
    269  *
    270  *      a) can perfectly be written is C,
    271  *      b) may also well directly call the part of the RTEMS API that can be used
    272  *      from interrupt level,
    273  *      c) It only responsible for handling the jobs that need to be done at
    274  *      the device level including (aknowledging/re-enabling the interrupt at device,
    275  *      level, getting the data,...)
    276  *
    277  *      When returning from the function, the following will be performed by
    278  *      the RTEMS irq epilogue :
    279  *
    280  *      1) masks the interrupts again,
    281  *      2) restore the original i8259s' interrupt masks
    282  *      3) switch back on the orinal stack if needed,
    283  *      4) perform rescheduling when necessary,
    284  *      5) restore the C scratch registers...
    285  *      6) restore initial execution flow
    286  *
    287  */
    288 int BSP_install_rtems_irq_handler       (const rtems_irq_connect_data*);
    289 int BSP_install_rtems_shared_irq_handler  (const rtems_irq_connect_data*);
    290 
    291 #define BSP_SHARED_HANDLER_SUPPORT      1
    292 
    293 /*
    294  * function to get the current RTEMS irq handler for ptr->name. It enables to
    295  * define hanlder chain...
    296  */
    297 int BSP_get_current_rtems_irq_handler   (rtems_irq_connect_data* ptr);
    298 /*
    299  * function to get disconnect the RTEMS irq handler for ptr->name.
    300  * This function checks that the value given is the current one for safety reason.
    301  * The user can use the previous function to get it.
    302  */
    303 int BSP_remove_rtems_irq_handler        (const rtems_irq_connect_data*);
    304 
    305 /*
    306  * ------------------------ RTEMS Global Irq Handler Mngt Routines ----------------
    307  */
    308 /*
    309  * (Re) Initialize the RTEMS interrupt management.
    310  *
    311  * The result of calling this function will be the same as if each individual
    312  * handler (config->irqHdlTbl[i].hdl)  different from "config->defaultEntry.hdl"
    313  * has been individualy connected via
    314  *      BSP_install_rtems_irq_handler(&config->irqHdlTbl[i])
    315  * And each handler currently equal to config->defaultEntry.hdl
    316  * has been previously disconnected via
    317  *       BSP_remove_rtems_irq_handler (&config->irqHdlTbl[i])
    318  *
    319  * This is to say that all information given will be used and not just
    320  * only the space.
    321  *
    322  * CAUTION : the various table address contained in config will be used
    323  *           directly by the interrupt mangement code in order to save
    324  *           data size so they must stay valid after the call => they should
    325  *           not be modified or declared on a stack.
    326  */
    327 
    328 int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config);
    329 /*
    330  * (Re) get info on current RTEMS interrupt management.
    331  */
    332 int BSP_rtems_irq_mngt_get(rtems_irq_global_settings**);
    333  
    334 extern void BSP_rtems_irq_mng_init(unsigned cpuId);
    335 extern void BSP_i8259s_init(void);
    336129#endif
    337130
  • c/src/lib/libbsp/powerpc/score603e/ChangeLog

    r490fd4a r7068d7ac  
     12005-05-17      Jennifer Averett <jennifer.averett@oarcorp.com>
     2
     3        * irq/irq.c, irq/irq.h: Modified to use rtems/irq.h.
     4
    152005-05-11      Joel Sherrill <joel@OARcorp.com>
    26
  • c/src/lib/libbsp/powerpc/score603e/irq/irq.c

    r490fd4a r7068d7ac  
    3939 * Check if IRQ is an ISA IRQ
    4040 */
    41 static inline int is_isa_irq(const rtems_irq_symbolic_name irqLine)
     41static inline int is_isa_irq(const rtems_irq_number irqLine)
    4242{
    4343  return (((int) irqLine <= BSP_ISA_IRQ_MAX_OFFSET) &
     
    4949 * Check if IRQ is an pci IRQ
    5050 */
    51 static inline int is_pci_irq(const rtems_irq_symbolic_name irqLine)
     51static inline int is_pci_irq(const rtems_irq_number irqLine)
    5252{
    5353  return (((int) irqLine <= BSP_PCI_IRQ_MAX_OFFSET) &
     
    5959 * Check if IRQ is a Processor IRQ
    6060 */
    61 static inline int is_processor_irq(const rtems_irq_symbolic_name irqLine)
     61static inline int is_processor_irq(const rtems_irq_number irqLine)
    6262{
    6363  return (((int) irqLine <= BSP_PROCESSOR_IRQ_MAX_OFFSET) &
  • c/src/lib/libbsp/powerpc/score603e/irq/irq.h

    r490fd4a r7068d7ac  
    1919 */
    2020
    21 #ifndef LIBBSP_POWERPC_MCP750_IRQ_IRQ_H
    22 #define LIBBSP_POWERPC_MCP750_IRQ_IRQ_H
     21#ifndef LIBBSP_POWERPC_IRQ_H
     22#define LIBBSP_POWERPC_IRQ_H
     23
     24#define BSP_SHARED_HANDLER_SUPPORT      1
     25#include <rtems/irq.h>
    2326
    2427/*
     
    6770 */
    6871
    69 typedef enum {
    7072  /* Base vector for our ISA IRQ handlers. */
    71   BSP_ISA_IRQ_VECTOR_BASE       = BSP_ASM_IRQ_VECTOR_BASE,
     73#define BSP_ISA_IRQ_VECTOR_BASE         BSP_ASM_IRQ_VECTOR_BASE
    7274  /*
    7375   * ISA IRQ handler related definitions
    7476   */
    75   BSP_ISA_IRQ_NUMBER            = 16,
    76   BSP_ISA_IRQ_LOWEST_OFFSET     = 0,
    77   BSP_ISA_IRQ_MAX_OFFSET        = BSP_ISA_IRQ_LOWEST_OFFSET + BSP_ISA_IRQ_NUMBER - 1,
     77#define BSP_ISA_IRQ_NUMBER              (16)
     78#define BSP_ISA_IRQ_LOWEST_OFFSET       (0)
     79#define BSP_ISA_IRQ_MAX_OFFSET          (BSP_ISA_IRQ_LOWEST_OFFSET+BSP_ISA_IRQ_NUMBER-1)
    7880  /*
    7981   * PCI IRQ handlers related definitions
    8082   * CAUTION : BSP_PCI_IRQ_LOWEST_OFFSET should be equal to OPENPIC_VEC_SOURCE
    8183   */
    82   BSP_PCI_IRQ_NUMBER            = 16,
    83   BSP_PCI_IRQ_LOWEST_OFFSET     = BSP_ISA_IRQ_NUMBER,
    84   BSP_PCI_IRQ_MAX_OFFSET        = BSP_PCI_IRQ_LOWEST_OFFSET + BSP_PCI_IRQ_NUMBER - 1,
     84#define BSP_PCI_IRQ_NUMBER              (16)
     85#define BSP_PCI_IRQ_LOWEST_OFFSET       (BSP_ISA_IRQ_NUMBER)
     86#define BSP_PCI_IRQ_MAX_OFFSET          (BSP_PCI_IRQ_LOWEST_OFFSET+BSP_PCI_IRQ_NUMBER-1)
    8587  /*
    8688   * PowerPC exceptions handled as interrupt where an RTEMS managed interrupt
    8789   * handler might be connected
    8890   */
    89   BSP_PROCESSOR_IRQ_NUMBER      = 1,
    90   BSP_PROCESSOR_IRQ_LOWEST_OFFSET = BSP_PCI_IRQ_MAX_OFFSET + 1,
    91   BSP_PROCESSOR_IRQ_MAX_OFFSET  = BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER - 1,
     91#define BSP_PROCESSOR_IRQ_NUMBER        (1)
     92#define BSP_PROCESSOR_IRQ_LOWEST_OFFSET (BSP_PCI_IRQ_MAX_OFFSET + 1)
     93#define BSP_PROCESSOR_IRQ_MAX_OFFSET    (BSP_PROCESSOR_IRQ_LOWEST_OFFSET+BSP_PROCESSOR_IRQ_NUMBER-1)
    9294  /* Misc vectors for OPENPIC irqs (IPI, timers)
    9395   */
    94   BSP_MISC_IRQ_NUMBER           = 8,
    95   BSP_MISC_IRQ_LOWEST_OFFSET    = BSP_PROCESSOR_IRQ_MAX_OFFSET + 1,
    96   BSP_MISC_IRQ_MAX_OFFSET       = BSP_MISC_IRQ_LOWEST_OFFSET + BSP_MISC_IRQ_NUMBER - 1,
     96#define BSP_MISC_IRQ_NUMBER             (8)
     97#define BSP_MISC_IRQ_LOWEST_OFFSET      (BSP_PROCESSOR_IRQ_MAX_OFFSET + 1)
     98#define BSP_MISC_IRQ_MAX_OFFSET         (BSP_MISC_IRQ_LOWEST_OFFSET+BSP_MISC_IRQ_NUMBER-1)
    9799  /*
    98100   * Summary
    99101   */
    100   BSP_IRQ_NUMBER                = BSP_MISC_IRQ_MAX_OFFSET + 1,
    101   BSP_LOWEST_OFFSET             = BSP_ISA_IRQ_LOWEST_OFFSET,
    102   BSP_MAX_OFFSET                = BSP_MISC_IRQ_MAX_OFFSET,
    103     /*
    104      * Some ISA IRQ symbolic name definition
    105      */
    106   BSP_ISA_PERIODIC_TIMER        = 0,
    107   BSP_ISA_KEYBOARD              = 1,
    108   BSP_ISA_UART_COM2_IRQ         = 3,
    109   BSP_ISA_UART_COM1_IRQ         = 4,
    110   BSP_ISA_RT_TIMER1             = 8,
    111   BSP_ISA_RT_TIMER3             = 10,
     102#define BSP_IRQ_NUMBER                  (BSP_MISC_IRQ_MAX_OFFSET + 1)
     103#define BSP_LOWEST_OFFSET               (BSP_ISA_IRQ_LOWEST_OFFSET)
     104#define BSP_MAX_OFFSET                  (BSP_MISC_IRQ_MAX_OFFSET)
    112105    /*
    113106     * Some PCI IRQ symbolic name definition
    114107     */
    115   BSP_PCI_IRQ0                  = BSP_PCI_IRQ_LOWEST_OFFSET,
    116   BSP_PCI_ISA_BRIDGE_IRQ        = BSP_PCI_IRQ0,
    117 
    118 #if defined(mvme2100)
    119   BSP_DEC21143_IRQ                = BSP_PCI_IRQ_LOWEST_OFFSET + 1,
    120   BSP_PMC_PCMIP_TYPE1_SLOT0_IRQ   = BSP_PCI_IRQ_LOWEST_OFFSET + 2,
    121   BSP_PCMIP_TYPE1_SLOT1_IRQ       = BSP_PCI_IRQ_LOWEST_OFFSET + 3,
    122   BSP_PCMIP_TYPE2_SLOT0_IRQ       = BSP_PCI_IRQ_LOWEST_OFFSET + 4,
    123   BSP_PCMIP_TYPE2_SLOT1_IRQ       = BSP_PCI_IRQ_LOWEST_OFFSET + 5,
    124   BSP_PCI_INTA_UNIVERSE_LINT0_IRQ = BSP_PCI_IRQ_LOWEST_OFFSET + 7,
    125   BSP_PCI_INTB_UNIVERSE_LINT1_IRQ = BSP_PCI_IRQ_LOWEST_OFFSET + 8,
    126   BSP_PCI_INTC_UNIVERSE_LINT2_IRQ = BSP_PCI_IRQ_LOWEST_OFFSET + 9,
    127   BSP_PCI_INTD_UNIVERSE_LINT3_IRQ = BSP_PCI_IRQ_LOWEST_OFFSET + 10,
    128   BSP_UART_COM1_IRQ               = BSP_PCI_IRQ_LOWEST_OFFSET + 13,
    129   BSP_FRONT_PANEL_ABORT_IRQ       = BSP_PCI_IRQ_LOWEST_OFFSET + 14,
    130   BSP_RTC_IRQ                     = BSP_PCI_IRQ_LOWEST_OFFSET + 15,
    131 #endif
     108#define BSP_PCI_IRQ0                    (BSP_PCI_IRQ_LOWEST_OFFSET)
    132109
    133110    /*
    134111     * Some Processor execption handled as RTEMS IRQ symbolic name definition
    135112     */
    136   BSP_DECREMENTER               = BSP_PROCESSOR_IRQ_LOWEST_OFFSET
    137 
    138 } rtems_irq_symbolic_name;
    139 
    140 /*
    141  * Type definition for RTEMS managed interrupts
    142  */
    143 typedef unsigned char  rtems_irq_prio;
    144 typedef unsigned short rtems_i8259_masks;
    145 
    146 extern  volatile rtems_i8259_masks i8259s_cache;
    147 
    148 struct  __rtems_irq_connect_data__;     /* forward declaratiuon */
    149 
    150 typedef void *rtems_irq_hdl_param;
    151 typedef void (*rtems_irq_hdl)           (rtems_irq_hdl_param);
    152 typedef void (*rtems_irq_enable)        (const struct __rtems_irq_connect_data__*);
    153 typedef void (*rtems_irq_disable)       (const struct __rtems_irq_connect_data__*);
    154 typedef int  (*rtems_irq_is_enabled)    (const struct __rtems_irq_connect_data__*);
    155 
    156 typedef struct __rtems_irq_connect_data__ {
    157       /*
    158        * IRQ line
    159        */
    160       rtems_irq_symbolic_name   name;
    161       /*
    162        * handler. See comment on handler properties below in function prototype.
    163        */
    164       rtems_irq_hdl                     hdl;
    165      /*
    166       * Handler handle to store private data
    167       */
    168       rtems_irq_hdl_param               handle;
    169       /*
    170        * function for enabling interrupts at device level (ONLY!).
    171        * The BSP code will automatically enable it at i8259s level and openpic level.
    172        * RATIONALE : anyway such code has to exist in current driver code.
    173        * It is usually called immediately AFTER connecting the interrupt handler.
    174        * RTEMS may well need such a function when restoring normal interrupt
    175        * processing after a debug session.
    176        *
    177        */
    178       rtems_irq_enable          on;
    179       /*
    180        * function for disabling interrupts at device level (ONLY!).
    181        * The code will disable it at i8259s level. RATIONALE : anyway
    182        * such code has to exist for clean shutdown. It is usually called
    183        * BEFORE disconnecting the interrupt. RTEMS may well need such
    184        * a function when disabling normal interrupt processing for
    185        * a debug session. May well be a NOP function.
    186        */
    187       rtems_irq_disable         off;
    188       /*
    189        * function enabling to know what interrupt may currently occur
    190        * if someone manipulates the i8259s interrupt mask without care...
    191        */
    192       rtems_irq_is_enabled      isOn;
    193       /*
    194        *  Set to -1 for vectors forced to have only 1 handler
    195        */
    196       void *next_handler;
    197 
    198 }rtems_irq_connect_data;
    199 
    200 typedef struct {
    201   /*
    202    * size of all the table fields (*Tbl) described below.
    203    */
    204   unsigned int                  irqNb;
    205   /*
    206    * Default handler used when disconnecting interrupts.
    207    */
    208   rtems_irq_connect_data        defaultEntry;
    209   /*
    210    * Table containing initials/current value.
    211    */
    212   rtems_irq_connect_data*       irqHdlTbl;
    213   /*
    214    * actual value of BSP_ISA_IRQ_VECTOR_BASE...
    215    */
    216   rtems_irq_symbolic_name       irqBase;
    217   /*
    218    * software priorities associated with interrupts.
    219    * if (*irqPrio  [i]  >  intrPrio  [j]  it  means  that
    220    * interrupt handler hdl connected for interrupt name i
    221    * will  not be interrupted by the handler connected for interrupt j
    222    * The interrupt source  will be physically masked at i8259 level.
    223    */
    224     rtems_irq_prio*             irqPrioTbl;
    225 }rtems_irq_global_settings;
    226 
    227 /*-------------------------------------------------------------------------+
    228 | Function Prototypes.
    229 +--------------------------------------------------------------------------*/
    230 /*
    231  * ------------------------ Intel 8259 (or emulation) Mngt Routines -------
    232  */
    233 
    234 /*
    235  * function to disable a particular irq at 8259 level. After calling
    236  * this function, even if the device asserts the interrupt line it will
    237  * not be propagated further to the processor
    238  */
    239 int BSP_irq_disable_at_i8259s        (const rtems_irq_symbolic_name irqLine);
    240 /*
    241  * function to enable a particular irq at 8259 level. After calling
    242  * this function, if the device asserts the interrupt line it will
    243  * be propagated further to the processor
    244  */
    245 int BSP_irq_enable_at_i8259s            (const rtems_irq_symbolic_name irqLine);
    246 /*
    247  * function to acknowledge a particular irq at 8259 level. After calling
    248  * this function, if a device asserts an enabled interrupt line it will
    249  * be propagated further to the processor. Mainly usefull for people
    250  * writing raw handlers as this is automagically done for RTEMS managed
    251  * handlers.
    252  */
    253 int BSP_irq_ack_at_i8259s               (const rtems_irq_symbolic_name irqLine);
    254 /*
    255  * function to check if a particular irq is enabled at 8259 level. After calling
    256  */
    257 int BSP_irq_enabled_at_i8259s           (const rtems_irq_symbolic_name irqLine);
    258 /*
    259  * ------------------------ RTEMS Single Irq Handler Mngt Routines ----------------
    260  */
    261 /*
    262  * function to connect a particular irq handler. This hanlder will NOT be called
    263  * directly as the result of the corresponding interrupt. Instead, a RTEMS
    264  * irq prologue will be called that will :
    265  *
    266  *      1) save the C scratch registers,
    267  *      2) switch to a interrupt stack if the interrupt is not nested,
    268  *      3) store the current i8259s' interrupt masks
    269  *      4) modify them to disable the current interrupt at 8259 level (and may
    270  *      be others depending on software priorities)
    271  *      5) acknowledge the i8259s',
    272  *      6) demask the processor,
    273  *      7) call the application handler
    274  *
    275  * As a result the hdl function provided
    276  *
    277  *      a) can perfectly be written is C,
    278  *      b) may also well directly call the part of the RTEMS API that can be
    279  *      used from interrupt level,
    280  *      c) It only responsible for handling the jobs that need to be done at
    281  *      the device level including (aknowledging/re-enabling the interrupt
    282  *      at device, level, getting the data,...)
    283  *
    284  *      When returning from the function, the following will be performed by
    285  *      the RTEMS irq epilogue:
    286  *
    287  *      1) masks the interrupts again,
    288  *      2) restore the original i8259s' interrupt masks
    289  *      3) switch back on the orinal stack if needed,
    290  *      4) perform rescheduling when necessary,
    291  *      5) restore the C scratch registers...
    292  *      6) restore initial execution flow
    293  */
    294 int BSP_install_rtems_irq_handler       (const rtems_irq_connect_data*);
    295 int BSP_install_rtems_shared_irq_handler  (const rtems_irq_connect_data*);
    296 
    297 #define BSP_SHARED_HANDLER_SUPPORT      1
    298 
    299 /*
    300  * function to get the current RTEMS irq handler for ptr->name. It enables to
    301  * define hanlder chain...
    302  */
    303 int BSP_get_current_rtems_irq_handler   (rtems_irq_connect_data* ptr);
    304 /*
    305  * function to get disconnect the RTEMS irq handler for ptr->name.
    306  * This function checks that the value given is the current one for safety
    307  * reasons.
    308  * The user can use the previous function to get it.
    309  */
    310 int BSP_remove_rtems_irq_handler        (const rtems_irq_connect_data*);
    311 
    312 /*
    313  * ------------------------ RTEMS Global Irq Handler Mngt Routines ----------------
    314  */
    315 /*
    316  * (Re) Initialize the RTEMS interrupt management.
    317  *
    318  * The result of calling this function will be the same as if each individual
    319  * handler (config->irqHdlTbl[i].hdl)  different from "config->defaultEntry.hdl"
    320  * has been individualy connected via
    321  *      BSP_install_rtems_irq_handler(&config->irqHdlTbl[i])
    322  * And each handler currently equal to config->defaultEntry.hdl
    323  * has been previously disconnected via
    324  *       BSP_remove_rtems_irq_handler (&config->irqHdlTbl[i])
    325  *
    326  * This is to say that all information given will be used and not just
    327  * only the space.
    328  *
    329  * CAUTION : the various table address contained in config will be used
    330  *           directly by the interrupt mangement code in order to save
    331  *           data size so they must stay valid after the call => they should
    332  *           not be modified or declared on a stack.
    333  */
    334 
    335 int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config);
    336 /*
    337  * (Re) get info on current RTEMS interrupt management.
    338  */
    339 int BSP_rtems_irq_mngt_get(rtems_irq_global_settings**);
    340 
    341 extern void BSP_rtems_irq_mng_init(unsigned cpuId);
    342 extern void BSP_i8259s_init(void);
     113#define BSP_DECREMENTER                 (BSP_PROCESSOR_IRQ_LOWEST_OFFSET)
    343114
    344115#ifdef __cplusplus
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