Changeset 6ec438e in rtems


Ignore:
Timestamp:
Oct 7, 2014, 6:29:16 AM (6 years ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
4.11, master
Children:
2fd3e65f
Parents:
d5cc923f
git-author:
Sebastian Huber <sebastian.huber@…> (10/07/14 06:29:16)
git-committer:
Sebastian Huber <sebastian.huber@…> (10/07/14 14:35:20)
Message:

libchip/serial: Add alternative NS16550 driver

Use the Termios device API.

Location:
c/src
Files:
2 added
27 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/arm/altera-cyclone-v/Makefile.am

    rd5cc923f r6ec438e  
    191191
    192192# Console
    193 libbsp_a_SOURCES += ../../shared/console.c
    194 libbsp_a_SOURCES += ../../shared/console_control.c
    195 libbsp_a_SOURCES += ../../shared/console_read.c
    196 libbsp_a_SOURCES += ../../shared/console_select_simple.c
    197 libbsp_a_SOURCES += ../../shared/console_write.c
     193libbsp_a_SOURCES += ../../shared/console-termios-init.c
     194libbsp_a_SOURCES += ../../shared/console-termios.c
    198195libbsp_a_SOURCES += console/console-config.c
    199196
  • c/src/lib/libbsp/arm/altera-cyclone-v/console/console-config.c

    rd5cc923f r6ec438e  
    11/*
    2  * Copyright (c) 2013 embedded brains GmbH.  All rights reserved.
     2 * Copyright (c) 2013-2014 embedded brains GmbH.  All rights reserved.
    33 *
    44 *  embedded brains GmbH
     
    1313 */
    1414
    15 #include <assert.h>
    16 #include <stdint.h>
    17 #include <stdbool.h>
    18 #include <libchip/serial.h>
    1915#include <libchip/ns16550.h>
    2016
     
    2218#include <bsp/irq.h>
    2319#include <bsp/alt_clock_manager.h>
     20#include <bsp/console-termios.h>
    2421#include "socal/alt_rstmgr.h"
    2522#include "socal/socal.h"
     
    2825
    2926#ifdef BSP_USE_UART_INTERRUPTS
    30   #define DEVICE_FNS &ns16550_fns
     27  #define DEVICE_FNS &ns16550_handler_interrupt
    3128#else
    32   #define DEVICE_FNS &ns16550_fns_polled
     29  #define DEVICE_FNS &ns16550_handler_polled
    3330#endif
    34 
    35 static bool altera_cyclone_v_uart_probe( int minor );
    3631
    3732static uint8_t altera_cyclone_v_uart_get_register(uintptr_t addr, uint8_t i)
     
    4944}
    5045
    51 console_tbl Console_Configuration_Ports[] = {
    52 #ifdef CYCLONE_V_CONFIG_CONSOLE
    53   {
    54     .sDeviceName   = "/dev/ttyS0",
    55     .deviceType    = SERIAL_NS16550,
    56     .pDeviceFns    = DEVICE_FNS,
    57     .deviceProbe   = altera_cyclone_v_uart_probe,
    58     .pDeviceFlow   = NULL,
    59     .ulMargin      = 16,
    60     .ulHysteresis  = 8,
    61     .pDeviceParams = (void *)CYCLONE_V_UART_BAUD,
    62     .ulCtrlPort1   = (uint32_t)ALT_UART0_ADDR,
    63     .ulCtrlPort2   = 0,
    64     .ulDataPort    = (uint32_t)ALT_UART0_ADDR,
    65     .getRegister   = altera_cyclone_v_uart_get_register,
    66     .setRegister   = altera_cyclone_v_uart_set_register,
    67     .getData       = NULL,
    68     .setData       = NULL,
    69     .ulClock       = 0,
    70     .ulIntVector   = ALT_INT_INTERRUPT_UART0
    71   },
    72 #endif
    73 #ifdef CYCLONE_V_CONFIG_UART_1
    74   {
    75     .sDeviceName   = "/dev/ttyS1",
    76     .deviceType    = SERIAL_NS16550,
    77     .pDeviceFns    = DEVICE_FNS,
    78     .deviceProbe   = altera_cyclone_v_uart_probe,
    79     .pDeviceFlow   = NULL,
    80     .ulMargin      = 16,
    81     .ulHysteresis  = 8,
    82     .pDeviceParams = (void *)CYCLONE_V_UART_BAUD,
    83     .ulCtrlPort1   = (uint32_t)ALT_UART1_ADDR,
    84     .ulCtrlPort2   = 0,
    85     .ulDataPort    = (uint32_t)ALT_UART1_ADDR,
    86     .getRegister   = altera_cyclone_v_uart_get_register,
    87     .setRegister   = altera_cyclone_v_uart_set_register,
    88     .getData       = NULL,
    89     .setData       = NULL,
    90     .ulClock       = 0,
    91     .ulIntVector   = ALT_INT_INTERRUPT_UART1
    92   }
    93 #endif
    94 };
    95 
    96 unsigned long Console_Configuration_Count =
    97   RTEMS_ARRAY_SIZE(Console_Configuration_Ports);
    98 
    99 bool altera_cyclone_v_uart_probe(int minor)
     46static bool altera_cyclone_v_uart_probe(
     47  rtems_termios_device_context *base,
     48  uint32_t uart_set_mask
     49)
    10050{
     51  ns16550_context *ctx = (ns16550_context *) base;
    10152  bool            ret           = true;
    102   uint32_t        uart_set_mask;
    10353  uint32_t        ucr;
    10454  ALT_STATUS_CODE sc;
    105   void*           location;
     55  void*           location = (void *) ctx->port;
    10656
    10757  /* The ALT_CLK_L4_SP is required for all SoCFPGA UARTs.
    10858   * Check that it's enabled. */
    109   assert( alt_clk_is_enabled(ALT_CLK_L4_SP) == ALT_E_TRUE );
    11059  if ( alt_clk_is_enabled(ALT_CLK_L4_SP) != ALT_E_TRUE ) {
    11160    ret = false;
     
    11362
    11463  if ( ret ) {
    115     switch(minor)
    116     {
    117       case(0):
    118         /* UART 0 */
    119         uart_set_mask = ALT_RSTMGR_PERMODRST_UART0_SET_MSK;
    120         location      = ALT_UART0_ADDR;
    121       break;
    122       case(1):
    123         /* UART 1 */
    124         uart_set_mask = ALT_RSTMGR_PERMODRST_UART1_SET_MSK;
    125         location      = ALT_UART1_ADDR;
    126       break;
    127       default:
    128         /* Unknown case */
    129         assert( minor == 0 || minor == 1 );
    130         ret = false;
    131       break;
    132     }
    133   }
    134   if ( ret ) {
    135     sc = alt_clk_freq_get(ALT_CLK_L4_SP, &Console_Configuration_Ports[minor].ulClock);
    136     assert( sc == ALT_E_SUCCESS );
     64    sc = alt_clk_freq_get(ALT_CLK_L4_SP, &ctx->clock);
    13765    if ( sc != ALT_E_SUCCESS ) {
    13866      ret = false;
     
    14674    // Verify the UCR (UART Component Version)
    14775    ucr = alt_read_word( ALT_UART_UCV_ADDR( location ) );
    148 
    149     assert( ucr == ALT_UART_UCV_UART_COMPONENT_VER_RESET );
    15076    if ( ucr != ALT_UART_UCV_UART_COMPONENT_VER_RESET ) {
    15177      ret = false;
     
    15985    // Read the MSR to work around case:119085.
    16086    (void)alt_read_word( ALT_UART_MSR_ADDR( location ) );
     87
     88    ret = ns16550_probe( base );
    16189  }
    16290
     
    16492}
    16593
     94#ifdef CYCLONE_V_CONFIG_CONSOLE
     95static bool altera_cyclone_v_uart_probe_0(rtems_termios_device_context *base)
     96{
     97  return altera_cyclone_v_uart_probe(base, ALT_RSTMGR_PERMODRST_UART0_SET_MSK);
     98}
     99
     100static ns16550_context altera_cyclone_v_uart_context_0 = {
     101  .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("UART 0"),
     102  .get_reg = altera_cyclone_v_uart_get_register,
     103  .set_reg = altera_cyclone_v_uart_set_register,
     104  .port = (uintptr_t) ALT_UART0_ADDR,
     105  .irq = ALT_INT_INTERRUPT_UART0,
     106  .initial_baud = CYCLONE_V_UART_BAUD
     107};
     108#endif
     109
     110#ifdef CYCLONE_V_CONFIG_CONSOLE
     111static bool altera_cyclone_v_uart_probe_1(rtems_termios_device_context *base)
     112{
     113  return altera_cyclone_v_uart_probe(base, ALT_RSTMGR_PERMODRST_UART1_SET_MSK);
     114}
     115
     116static ns16550_context altera_cyclone_v_uart_context_1 = {
     117  .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("UART 1"),
     118  .get_reg = altera_cyclone_v_uart_get_register,
     119  .set_reg = altera_cyclone_v_uart_set_register,
     120  .port = (uintptr_t) ALT_UART1_ADDR,
     121  .irq = ALT_INT_INTERRUPT_UART1,
     122  .initial_baud = CYCLONE_V_UART_BAUD
     123};
     124#endif
     125
     126const console_device console_device_table[] = {
     127  #ifdef CYCLONE_V_CONFIG_CONSOLE
     128    {
     129      .device_file = "/dev/ttyS0",
     130      .probe = altera_cyclone_v_uart_probe_0,
     131      .handler = DEVICE_FNS,
     132      .context = &altera_cyclone_v_uart_context_0.base
     133    },
     134  #endif
     135  #ifdef CYCLONE_V_CONFIG_UART_1
     136    {
     137      .device_file = "/dev/ttyS1",
     138      .probe = altera_cyclone_v_uart_probe_1,
     139      .handler = DEVICE_FNS,
     140      .context = &altera_cyclone_v_uart_context_1.base
     141    },
     142  #endif
     143};
     144
     145const size_t console_device_count = RTEMS_ARRAY_SIZE(console_device_table);
     146
    166147static void output_char(char c)
    167148{
    168   int minor = (int) Console_Port_Minor;
    169   console_tbl *ct = Console_Port_Tbl != NULL ?
    170     Console_Port_Tbl[minor] : &Console_Configuration_Ports[minor];
     149  rtems_termios_device_context *ctx = console_device_table[0].context;
    171150
    172151  if (c == '\n') {
    173     ns16550_outch_polled( ct, '\r' );
     152    ns16550_polled_putchar( ctx, '\r' );
    174153  }
    175154
    176   ns16550_outch_polled( ct, c );
     155  ns16550_polled_putchar( ctx, c );
    177156}
    178157
  • c/src/lib/libbsp/arm/lpc176x/Makefile.am

    rd5cc923f r6ec438e  
    111111
    112112# Console
    113 libbsp_a_SOURCES += ../../shared/console.c
    114 libbsp_a_SOURCES += ../../shared/console_control.c
    115 libbsp_a_SOURCES += ../../shared/console_read.c
    116 libbsp_a_SOURCES += ../../shared/console_select.c
    117 libbsp_a_SOURCES += ../../shared/console_write.c
     113libbsp_a_SOURCES += ../../shared/console-termios-init.c
     114libbsp_a_SOURCES += ../../shared/console-termios.c
    118115libbsp_a_SOURCES += console/console-config.c
    119116
  • c/src/lib/libbsp/arm/lpc176x/console/console-config.c

    rd5cc923f r6ec438e  
    88
    99/*
    10  * Copyright (c) 2008-2011 embedded brains GmbH.  All rights reserved.
     10 * Copyright (c) 2008-2014 embedded brains GmbH.  All rights reserved.
    1111 *
    1212 *  embedded brains GmbH
    13  *  Obere Lagerstr. 30
     13 *  Dornierstr. 4
    1414 *  82178 Puchheim
    1515 *  Germany
     
    2121 */
    2222
    23 #include <libchip/serial.h>
    2423#include <libchip/ns16550.h>
    2524
     
    2726#include <bsp/io.h>
    2827#include <bsp/irq.h>
     28#include <bsp/console-termios.h>
    2929
    3030/**
     
    6363}
    6464
    65 /**
    66  * @brief Represents the uart configuration ports.
    67  */
    68 console_tbl Console_Configuration_Ports[] = {
    6965#ifdef LPC176X_CONFIG_CONSOLE
    70   {
    71     .sDeviceName = "/dev/ttyS0",
    72     .deviceType = SERIAL_NS16550_WITH_FDR,
    73     .pDeviceFns = &ns16550_fns,
    74     .deviceProbe = NULL,
    75     .pDeviceFlow = NULL,
    76     .ulMargin = 16,
    77     .ulHysteresis = 8,
    78     .pDeviceParams = (void *) LPC176X_UART_BAUD,
    79     .ulCtrlPort1 = UART0_BASE_ADDR,
    80     .ulCtrlPort2 = 0,
    81     .ulDataPort = UART0_BASE_ADDR,
    82     .getRegister = lpc176x_uart_get_register,
    83     .setRegister = lpc176x_uart_set_register,
    84     .getData = NULL,
    85     .setData = NULL,
    86     .ulClock = LPC176X_PCLK,
    87     .ulIntVector = LPC176X_IRQ_UART_0
    88   },
     66static ns16550_context lpc176x_uart_context_0 = {
     67  .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("UART 0"),
     68  .get_reg = lpc176x_uart_get_register,
     69  .set_reg = lpc176x_uart_set_register,
     70  .port = UART0_BASE_ADDR,
     71  .irq = LPC176X_IRQ_UART_0,
     72  .clock = LPC176X_PCLK,
     73  .initial_baud = LPC176X_UART_BAUD,
     74  .has_fractional_divider_register = true
     75};
    8976#endif
     77
    9078#ifdef LPC176X_CONFIG_UART_1
    91   {
    92     .sDeviceName = "/dev/ttyS1",
    93     .deviceType = SERIAL_NS16550_WITH_FDR,
    94     .pDeviceFns = &ns16550_fns,
    95     .deviceProbe = lpc176x_uart_probe_1,
    96     .pDeviceFlow = NULL,
    97     .ulMargin = 16,
    98     .ulHysteresis = 8,
    99     .pDeviceParams = (void *) LPC176X_UART_BAUD,
    100     .ulCtrlPort1 = UART1_BASE_ADDR,
    101     .ulCtrlPort2 = 0,
    102     .ulDataPort = UART1_BASE_ADDR,
    103     .getRegister = lpc176x_uart_get_register,
    104     .setRegister = lpc176x_uart_set_register,
    105     .getData = NULL,
    106     .setData = NULL,
    107     .ulClock = LPC176X_PCLK,
    108     .ulIntVector = LPC176X_IRQ_UART_1
    109   },
     79static ns16550_context lpc176x_uart_context_1 = {
     80  .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("UART 1"),
     81  .get_reg = lpc176x_uart_get_register,
     82  .set_reg = lpc176x_uart_set_register,
     83  .port = UART1_BASE_ADDR,
     84  .irq = LPC176X_IRQ_UART_1,
     85  .clock = LPC176X_PCLK,
     86  .initial_baud = LPC176X_UART_BAUD,
     87  .has_fractional_divider_register = true
     88};
    11089#endif
     90
    11191#ifdef LPC176X_CONFIG_UART_2
    112   {
    113     .sDeviceName = "/dev/ttyS2",
    114     .deviceType = SERIAL_NS16550_WITH_FDR,
    115     .pDeviceFns = &ns16550_fns,
    116     .deviceProbe = lpc176x_uart_probe_2,
    117     .pDeviceFlow = NULL,
    118     .ulMargin = 16,
    119     .ulHysteresis = 8,
    120     .pDeviceParams = (void *) LPC176X_UART_BAUD,
    121     .ulCtrlPort1 = UART2_BASE_ADDR,
    122     .ulCtrlPort2 = 0,
    123     .ulDataPort = UART2_BASE_ADDR,
    124     .getRegister = lpc176x_uart_get_register,
    125     .setRegister = lpc176x_uart_set_register,
    126     .getData = NULL,
    127     .setData = NULL,
    128     .ulClock = LPC176X_PCLK,
    129     .ulIntVector = LPC176X_IRQ_UART_2
    130   },
     92static ns16550_context lpc176x_uart_context_2 = {
     93  .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("UART 2"),
     94  .get_reg = lpc176x_uart_get_register,
     95  .set_reg = lpc176x_uart_set_register,
     96  .port = UART2_BASE_ADDR,
     97  .irq = LPC176X_IRQ_UART_2,
     98  .clock = LPC176X_PCLK,
     99  .initial_baud = LPC176X_UART_BAUD,
     100  .has_fractional_divider_register = true
     101};
    131102#endif
     103
    132104#ifdef LPC176X_CONFIG_UART_3
    133   {
    134     .sDeviceName = "/dev/ttyS3",
    135     .deviceType = SERIAL_NS16550_WITH_FDR,
    136     .pDeviceFns = &ns16550_fns,
    137     .deviceProbe = lpc176x_uart_probe_3,
    138     .pDeviceFlow = NULL,
    139     .ulMargin = 16,
    140     .ulHysteresis = 8,
    141     .pDeviceParams = (void *) LPC176X_UART_BAUD,
    142     .ulCtrlPort1 = UART3_BASE_ADDR,
    143     .ulCtrlPort2 = 0,
    144     .ulDataPort = UART3_BASE_ADDR,
    145     .getRegister = lpc176x_uart_get_register,
    146     .setRegister = lpc176x_uart_set_register,
    147     .getData = NULL,
    148     .setData = NULL,
    149     .ulClock = LPC176X_PCLK,
    150     .ulIntVector = LPC176X_IRQ_UART_3
    151   },
     105static ns16550_context lpc176x_uart_context_3 = {
     106  .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("UART 3"),
     107  .get_reg = lpc176x_uart_get_register,
     108  .set_reg = lpc176x_uart_set_register,
     109  .port = UART3_BASE_ADDR,
     110  .irq = LPC176X_IRQ_UART_3,
     111  .clock = LPC176X_PCLK,
     112  .initial_baud = LPC176X_UART_BAUD,
     113  .has_fractional_divider_register = true
     114};
    152115#endif
     116
     117const console_device console_device_table[] = {
     118  #ifdef LPC176X_CONFIG_CONSOLE
     119    {
     120      .device_file = "/dev/ttyS0",
     121      .probe = console_device_probe_default,
     122      .handler = &ns16550_handler_interrupt,
     123      .context = &lpc176x_uart_context_0.base
     124    },
     125  #endif
     126  #ifdef LPC176X_CONFIG_UART_1
     127    {
     128      .device_file = "/dev/ttyS1",
     129      .probe = ns16550_probe,
     130      .handler = &ns16550_handler_interrupt,
     131      .context = &lpc176x_uart_context_1.base
     132    },
     133  #endif
     134  #ifdef LPC176X_CONFIG_UART_2
     135    {
     136      .device_file = "/dev/ttyS2",
     137      .probe = ns16550_probe,
     138      .handler = &ns16550_handler_interrupt,
     139      .context = &lpc176x_uart_context_2.base
     140    },
     141  #endif
     142  #ifdef LPC176X_CONFIG_UART_3
     143    {
     144      .device_file = "/dev/ttyS3",
     145      .probe = ns16550_probe,
     146      .handler = &ns16550_handler_interrupt,
     147      .context = &lpc176x_uart_context_3.base
     148    },
     149  #endif
    153150};
    154151
    155 #define LPC176X_UART_COUNT ( sizeof( Console_Configuration_Ports ) \
    156                              / sizeof( Console_Configuration_Ports[ 0 ] ) )
    157 
    158 unsigned long Console_Configuration_Count = LPC176X_UART_COUNT;
     152const size_t console_device_count = RTEMS_ARRAY_SIZE(console_device_table);
  • c/src/lib/libbsp/arm/lpc24xx/Makefile.am

    rd5cc923f r6ec438e  
    122122
    123123# Console
    124 libbsp_a_SOURCES += ../../shared/console.c
    125 libbsp_a_SOURCES += ../../shared/console_control.c
    126 libbsp_a_SOURCES += ../../shared/console_read.c
    127 libbsp_a_SOURCES += ../../shared/console_select.c
    128 libbsp_a_SOURCES += ../../shared/console_write.c
     124libbsp_a_SOURCES += ../../shared/console-termios-init.c
     125libbsp_a_SOURCES += ../../shared/console-termios.c
    129126libbsp_a_SOURCES += console/console-config.c
    130127libbsp_a_SOURCES += console/uart-probe-1.c
  • c/src/lib/libbsp/arm/lpc24xx/console/console-config.c

    rd5cc923f r6ec438e  
    88
    99/*
    10  * Copyright (c) 2008-2011 embedded brains GmbH.  All rights reserved.
     10 * Copyright (c) 2008-2014 embedded brains GmbH.  All rights reserved.
    1111 *
    1212 *  embedded brains GmbH
    13  *  Obere Lagerstr. 30
     13 *  Dornierstr. 4
    1414 *  82178 Puchheim
    1515 *  Germany
     
    2121 */
    2222
    23 #include <libchip/serial.h>
     23#include <rtems/console.h>
     24
    2425#include <libchip/ns16550.h>
    2526
     
    2829#include <bsp/irq.h>
    2930#include <bsp/io.h>
     31#include <bsp/console-termios.h>
    3032
    3133static uint8_t lpc24xx_uart_get_register(uintptr_t addr, uint8_t i)
     
    4345}
    4446
    45 console_tbl Console_Configuration_Ports [] = {
     47#ifdef LPC24XX_CONFIG_CONSOLE
     48static ns16550_context lpc24xx_uart_context_0 = {
     49  .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("UART 0"),
     50  .get_reg = lpc24xx_uart_get_register,
     51  .set_reg = lpc24xx_uart_set_register,
     52  .port = UART0_BASE_ADDR,
     53  .irq = LPC24XX_IRQ_UART_0,
     54  .clock = LPC24XX_PCLK,
     55  .initial_baud = LPC24XX_UART_BAUD,
     56  .has_fractional_divider_register = true
     57};
     58#endif
     59
     60#ifdef LPC24XX_CONFIG_UART_1
     61static ns16550_context lpc24xx_uart_context_1 = {
     62  .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("UART 1"),
     63  .get_reg = lpc24xx_uart_get_register,
     64  .set_reg = lpc24xx_uart_set_register,
     65  .port = UART1_BASE_ADDR,
     66  .irq = LPC24XX_IRQ_UART_1,
     67  .clock = LPC24XX_PCLK,
     68  .initial_baud = LPC24XX_UART_BAUD,
     69  .has_fractional_divider_register = true
     70};
     71#endif
     72
     73#ifdef LPC24XX_CONFIG_UART_2
     74static ns16550_context lpc24xx_uart_context_2 = {
     75  .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("UART 2"),
     76  .get_reg = lpc24xx_uart_get_register,
     77  .set_reg = lpc24xx_uart_set_register,
     78  .port = UART2_BASE_ADDR,
     79  .irq = LPC24XX_IRQ_UART_2,
     80  .clock = LPC24XX_PCLK,
     81  .initial_baud = LPC24XX_UART_BAUD,
     82  .has_fractional_divider_register = true
     83};
     84#endif
     85
     86#ifdef LPC24XX_CONFIG_UART_3
     87static ns16550_context lpc24xx_uart_context_3 = {
     88  .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("UART 3"),
     89  .get_reg = lpc24xx_uart_get_register,
     90  .set_reg = lpc24xx_uart_set_register,
     91  .port = UART3_BASE_ADDR,
     92  .irq = LPC24XX_IRQ_UART_3,
     93  .clock = LPC24XX_PCLK,
     94  .initial_baud = LPC24XX_UART_BAUD,
     95  .has_fractional_divider_register = true
     96};
     97#endif
     98
     99const console_device console_device_table[] = {
    46100  #ifdef LPC24XX_CONFIG_CONSOLE
    47101    {
    48       .sDeviceName = "/dev/ttyS0",
    49       .deviceType = SERIAL_NS16550_WITH_FDR,
    50       .pDeviceFns = &ns16550_fns,
    51       .deviceProbe = NULL,
    52       .pDeviceFlow = NULL,
    53       .ulMargin = 16,
    54       .ulHysteresis = 8,
    55       .pDeviceParams = (void *) LPC24XX_UART_BAUD,
    56       .ulCtrlPort1 = UART0_BASE_ADDR,
    57       .ulCtrlPort2 = 0,
    58       .ulDataPort = UART0_BASE_ADDR,
    59       .getRegister = lpc24xx_uart_get_register,
    60       .setRegister = lpc24xx_uart_set_register,
    61       .getData = NULL,
    62       .setData = NULL,
    63       .ulClock = LPC24XX_PCLK,
    64       .ulIntVector = LPC24XX_IRQ_UART_0
     102      .device_file = "/dev/ttyS0",
     103      .probe = console_device_probe_default,
     104      .handler = &ns16550_handler_interrupt,
     105      .context = &lpc24xx_uart_context_0.base
    65106    },
    66107  #endif
    67108  #ifdef LPC24XX_CONFIG_UART_1
    68109    {
    69       .sDeviceName = "/dev/ttyS1",
    70       .deviceType = SERIAL_NS16550_WITH_FDR,
    71       .pDeviceFns = &ns16550_fns,
    72       .deviceProbe = lpc24xx_uart_probe_1,
    73       .pDeviceFlow = NULL,
    74       .ulMargin = 16,
    75       .ulHysteresis = 8,
    76       .pDeviceParams = (void *) LPC24XX_UART_BAUD,
    77       .ulCtrlPort1 = UART1_BASE_ADDR,
    78       .ulCtrlPort2 = 0,
    79       .ulDataPort = UART1_BASE_ADDR,
    80       .getRegister = lpc24xx_uart_get_register,
    81       .setRegister = lpc24xx_uart_set_register,
    82       .getData = NULL,
    83       .setData = NULL,
    84       .ulClock = LPC24XX_PCLK,
    85       .ulIntVector = LPC24XX_IRQ_UART_1
     110      .device_file = "/dev/ttyS1",
     111      .probe = lpc24xx_uart_probe_1,
     112      .handler = &ns16550_handler_interrupt,
     113      .context = &lpc24xx_uart_context_1.base
    86114    },
    87115  #endif
    88116  #ifdef LPC24XX_CONFIG_UART_2
    89117    {
    90       .sDeviceName = "/dev/ttyS2",
    91       .deviceType = SERIAL_NS16550_WITH_FDR,
    92       .pDeviceFns = &ns16550_fns,
    93       .deviceProbe = lpc24xx_uart_probe_2,
    94       .pDeviceFlow = NULL,
    95       .ulMargin = 16,
    96       .ulHysteresis = 8,
    97       .pDeviceParams = (void *) LPC24XX_UART_BAUD,
    98       .ulCtrlPort1 = UART2_BASE_ADDR,
    99       .ulCtrlPort2 = 0,
    100       .ulDataPort = UART2_BASE_ADDR,
    101       .getRegister = lpc24xx_uart_get_register,
    102       .setRegister = lpc24xx_uart_set_register,
    103       .getData = NULL,
    104       .setData = NULL,
    105       .ulClock = LPC24XX_PCLK,
    106       .ulIntVector = LPC24XX_IRQ_UART_2
     118      .device_file = "/dev/ttyS2",
     119      .probe = lpc24xx_uart_probe_2,
     120      .handler = &ns16550_handler_interrupt,
     121      .context = &lpc24xx_uart_context_2.base
    107122    },
    108123  #endif
    109124  #ifdef LPC24XX_CONFIG_UART_3
    110125    {
    111       .sDeviceName = "/dev/ttyS3",
    112       .deviceType = SERIAL_NS16550_WITH_FDR,
    113       .pDeviceFns = &ns16550_fns,
    114       .deviceProbe = lpc24xx_uart_probe_3,
    115       .pDeviceFlow = NULL,
    116       .ulMargin = 16,
    117       .ulHysteresis = 8,
    118       .pDeviceParams = (void *) LPC24XX_UART_BAUD,
    119       .ulCtrlPort1 = UART3_BASE_ADDR,
    120       .ulCtrlPort2 = 0,
    121       .ulDataPort = UART3_BASE_ADDR,
    122       .getRegister = lpc24xx_uart_get_register,
    123       .setRegister = lpc24xx_uart_set_register,
    124       .getData = NULL,
    125       .setData = NULL,
    126       .ulClock = LPC24XX_PCLK,
    127       .ulIntVector = LPC24XX_IRQ_UART_3
     126      .device_file = "/dev/ttyS3",
     127      .probe = lpc24xx_uart_probe_3,
     128      .handler = &ns16550_handler_interrupt,
     129      .context = &lpc24xx_uart_context_3.base
    128130    },
    129131  #endif
    130132};
    131133
    132 #define LPC24XX_UART_COUNT \
    133   (sizeof(Console_Configuration_Ports) \
    134     / sizeof(Console_Configuration_Ports [0]))
    135 unsigned long Console_Configuration_Count = LPC24XX_UART_COUNT;
     134const size_t console_device_count = RTEMS_ARRAY_SIZE(console_device_table);
  • c/src/lib/libbsp/arm/lpc24xx/console/uart-probe-1.c

    rd5cc923f r6ec438e  
    88
    99/*
    10  * Copyright (c) 2011-2013 embedded brains GmbH.  All rights reserved.
     10 * Copyright (c) 2011-2014 embedded brains GmbH.  All rights reserved.
    1111 *
    1212 *  embedded brains GmbH
    13  *  Obere Lagerstr. 30
     13 *  Dornierstr. 4
    1414 *  82178 Puchheim
    1515 *  Germany
     
    2121 */
    2222
     23#include <libchip/ns16550.h>
     24
    2325#include <bsp.h>
    2426#include <bsp/io.h>
    2527
    26 bool lpc24xx_uart_probe_1(int minor)
     28bool lpc24xx_uart_probe_1(rtems_termios_device_context *context)
    2729{
    2830  static const lpc24xx_pin_range pins [] = {
     
    3537  lpc24xx_pin_config(&pins [0], LPC24XX_PIN_SET_FUNCTION);
    3638
    37   return true;
     39  return ns16550_probe(context);
    3840}
  • c/src/lib/libbsp/arm/lpc24xx/console/uart-probe-2.c

    rd5cc923f r6ec438e  
    88
    99/*
    10  * Copyright (c) 2011-2013 embedded brains GmbH.  All rights reserved.
     10 * Copyright (c) 2011-2014 embedded brains GmbH.  All rights reserved.
    1111 *
    1212 *  embedded brains GmbH
    13  *  Obere Lagerstr. 30
     13 *  Dornierstr. 4
    1414 *  82178 Puchheim
    1515 *  Germany
     
    2121 */
    2222
     23#include <libchip/ns16550.h>
     24
    2325#include <bsp.h>
    2426#include <bsp/io.h>
    2527
    26 bool lpc24xx_uart_probe_2(int minor)
     28bool lpc24xx_uart_probe_2(rtems_termios_device_context *context)
    2729{
    2830  static const lpc24xx_pin_range pins [] = {
     
    3537  lpc24xx_pin_config(&pins [0], LPC24XX_PIN_SET_FUNCTION);
    3638
    37   return true;
     39  return ns16550_probe(context);
    3840}
  • c/src/lib/libbsp/arm/lpc24xx/console/uart-probe-3.c

    rd5cc923f r6ec438e  
    88
    99/*
    10  * Copyright (c) 2011-2013 embedded brains GmbH.  All rights reserved.
     10 * Copyright (c) 2011-2014 embedded brains GmbH.  All rights reserved.
    1111 *
    1212 *  embedded brains GmbH
    13  *  Obere Lagerstr. 30
     13 *  Dornierstr. 4
    1414 *  82178 Puchheim
    1515 *  Germany
     
    2121 */
    2222
     23#include <libchip/ns16550.h>
     24
    2325#include <bsp.h>
    2426#include <bsp/io.h>
    2527
    26 bool lpc24xx_uart_probe_3(int minor)
     28bool lpc24xx_uart_probe_3(rtems_termios_device_context *context)
    2729{
    2830  static const lpc24xx_pin_range pins [] = {
     
    3537  lpc24xx_pin_config(&pins [0], LPC24XX_PIN_SET_FUNCTION);
    3638
    37   return true;
     39  return ns16550_probe(context);
    3840}
  • c/src/lib/libbsp/arm/lpc24xx/include/bsp.h

    rd5cc923f r6ec438e  
    88
    99/*
    10  * Copyright (c) 2008-2013 embedded brains GmbH.  All rights reserved.
     10 * Copyright (c) 2008-2014 embedded brains GmbH.  All rights reserved.
    1111 *
    1212 *  embedded brains GmbH
    13  *  Obere Lagerstr. 30
     13 *  Dornierstr. 4
    1414 *  82178 Puchheim
    1515 *  Germany
     
    5353
    5454struct rtems_bsdnet_ifconfig;
     55
     56struct rtems_termios_device_context;
    5557
    5658/**
     
    112114void bsp_restart(void *addr);
    113115
    114 bool lpc24xx_uart_probe_1(int minor);
     116bool lpc24xx_uart_probe_1(struct rtems_termios_device_context *context);
    115117
    116 bool lpc24xx_uart_probe_2(int minor);
     118bool lpc24xx_uart_probe_2(struct rtems_termios_device_context *context);
    117119
    118 bool lpc24xx_uart_probe_3(int minor);
     120bool lpc24xx_uart_probe_3(struct rtems_termios_device_context *context);
    119121
    120122/** @} */
  • c/src/lib/libbsp/arm/lpc32xx/Makefile.am

    rd5cc923f r6ec438e  
    4949include_bsp_HEADERS += include/nand-mlc.h
    5050include_bsp_HEADERS += include/boot.h
     51include_bsp_HEADERS += include/hsu.h
    5152include_bsp_HEADERS += include/i2c.h
    5253include_bsp_HEADERS += include/emc.h
     
    112113
    113114# Console
    114 libbsp_a_SOURCES += ../../shared/console.c \
    115         ../../shared/console_select.c \
    116         console/console-config.c \
    117         console/hsu.c \
    118         ../../shared/console_read.c \
    119         ../../shared/console_write.c \
    120         ../../shared/console_control.c
     115libbsp_a_SOURCES += ../../shared/console-termios-init.c
     116libbsp_a_SOURCES += ../../shared/console-termios.c
     117libbsp_a_SOURCES += console/console-config.c
     118libbsp_a_SOURCES += console/hsu.c
    121119
    122120# Clock
  • c/src/lib/libbsp/arm/lpc32xx/console/console-config.c

    rd5cc923f r6ec438e  
    88
    99/*
    10  * Copyright (c) 2009
    11  * embedded brains GmbH
    12  * Obere Lagerstr. 30
    13  * D-82178 Puchheim
    14  * Germany
    15  * <rtems@embedded-brains.de>
     10 * Copyright (c) 2009-2014 embedded brains GmbH.  All rights reserved.
     11 *
     12 *  embedded brains GmbH
     13 *  Dornierstr. 4
     14 *  82178 Puchheim
     15 *  Germany
     16 *  <rtems@embedded-brains.de>
    1617 *
    1718 * The license and distribution terms for this file may be
     
    2021 */
    2122
    22 #include <libchip/serial.h>
    2323#include <libchip/ns16550.h>
    2424
     
    2626#include <bsp/lpc32xx.h>
    2727#include <bsp/irq.h>
    28 
    29 extern const console_fns lpc32xx_hsu_fns;
     28#include <bsp/hsu.h>
     29#include <bsp/console-termios.h>
    3030
    3131static uint8_t lpc32xx_uart_get_register(uintptr_t addr, uint8_t i)
     
    4444
    4545#ifdef LPC32XX_UART_3_BAUD
    46   static bool lpc32xx_uart_probe_3(int minor)
     46  static bool lpc32xx_uart_probe_3(rtems_termios_device_context *context)
    4747  {
    4848    LPC32XX_UARTCLK_CTRL |= BSP_BIT32(0);
     
    5050    LPC32XX_UART_CLKMODE = BSP_FLD32SET(LPC32XX_UART_CLKMODE, 0x2, 4, 5);
    5151
    52     return true;
     52    return ns16550_probe(context);
    5353  }
    5454#endif
    5555
    5656#ifdef LPC32XX_UART_4_BAUD
    57   static bool lpc32xx_uart_probe_4(int minor)
     57  static bool lpc32xx_uart_probe_4(rtems_termios_device_context *context)
    5858  {
    5959    volatile lpc32xx_gpio *gpio = &lpc32xx.gpio;
     
    6969    LPC32XX_UART_CLKMODE = BSP_FLD32SET(LPC32XX_UART_CLKMODE, 0x2, 6, 7);
    7070
    71     return true;
     71    return ns16550_probe(context);
    7272  }
    7373#endif
    7474
    7575#ifdef LPC32XX_UART_6_BAUD
    76   static bool lpc32xx_uart_probe_6(int minor)
     76  static bool lpc32xx_uart_probe_6(rtems_termios_device_context *context)
    7777  {
    7878    /* Bypass the IrDA modulator/demodulator */
     
    8383    LPC32XX_UART_CLKMODE = BSP_FLD32SET(LPC32XX_UART_CLKMODE, 0x2, 10, 11);
    8484
    85     return true;
     85    return ns16550_probe(context);
    8686  }
    8787#endif
     
    8989/* FIXME: Console selection */
    9090
    91 console_tbl Console_Configuration_Ports [] = {
     91#ifdef LPC32XX_UART_5_BAUD
     92static ns16550_context lpc32xx_uart_context_5 = {
     93  .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("UART 5"),
     94  .get_reg = lpc32xx_uart_get_register,
     95  .set_reg = lpc32xx_uart_set_register,
     96  .port = LPC32XX_BASE_UART_5,
     97  .irq = LPC32XX_IRQ_UART_5,
     98  .clock = 16 * LPC32XX_UART_5_BAUD,
     99  .initial_baud = LPC32XX_UART_5_BAUD
     100};
     101#endif
     102
     103#ifdef LPC32XX_UART_3_BAUD
     104static ns16550_context lpc32xx_uart_context_3 = {
     105  .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("UART 3"),
     106  .get_reg = lpc32xx_uart_get_register,
     107  .set_reg = lpc32xx_uart_set_register,
     108  .port = LPC32XX_BASE_UART_3,
     109  .irq = LPC32XX_IRQ_UART_3,
     110  .clock = 16 * LPC32XX_UART_3_BAUD,
     111  .initial_baud = LPC32XX_UART_3_BAUD
     112};
     113#endif
     114
     115#ifdef LPC32XX_UART_4_BAUD
     116static ns16550_context lpc32xx_uart_context_4 = {
     117  .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("UART 4"),
     118  .get_reg = lpc32xx_uart_get_register,
     119  .set_reg = lpc32xx_uart_set_register,
     120  .port = LPC32XX_BASE_UART_4,
     121  .irq = LPC32XX_IRQ_UART_4,
     122  .clock = 16 * LPC32XX_UART_4_BAUD,
     123  .initial_baud = LPC32XX_UART_4_BAUD
     124};
     125#endif
     126
     127#ifdef LPC32XX_UART_6_BAUD
     128static ns16550_context lpc32xx_uart_context_6 = {
     129  .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("UART 6"),
     130  .get_reg = lpc32xx_uart_get_register,
     131  .set_reg = lpc32xx_uart_set_register,
     132  .port = LPC32XX_BASE_UART_6,
     133  .irq = LPC32XX_IRQ_UART_6,
     134  .clock = 16 * LPC32XX_UART_6_BAUD,
     135  .initial_baud = LPC32XX_UART_6_BAUD
     136};
     137#endif
     138
     139#ifdef LPC32XX_UART_1_BAUD
     140static lpc32xx_hsu_context lpc32xx_uart_context_1 = {
     141  .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("UART 1"),
     142  .hsu = (volatile lpc32xx_hsu *) LPC32XX_BASE_UART_1,
     143  .irq = LPC32XX_IRQ_UART_1,
     144  .initial_baud = LPC32XX_UART_1_BAUD
     145};
     146#endif
     147
     148#ifdef LPC32XX_UART_2_BAUD
     149static lpc32xx_hsu_context lpc32xx_uart_context_2 = {
     150  .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("UART 2"),
     151  .hsu = (volatile lpc32xx_hsu *) LPC32XX_BASE_UART_2,
     152  .irq = LPC32XX_IRQ_UART_2,
     153  .initial_baud = LPC32XX_UART_2_BAUD
     154};
     155#endif
     156
     157#ifdef LPC32XX_UART_7_BAUD
     158static lpc32xx_hsu_context lpc32xx_uart_context_7 = {
     159  .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("UART 7"),
     160  .hsu = (volatile lpc32xx_hsu *) LPC32XX_BASE_UART_7,
     161  .irq = LPC32XX_IRQ_UART_7,
     162  .initial_baud = LPC32XX_UART_7_BAUD
     163};
     164#endif
     165
     166const console_device console_device_table[] = {
    92167  #ifdef LPC32XX_UART_5_BAUD
    93168    {
    94       .sDeviceName = "/dev/ttyS5",
    95       .deviceType = SERIAL_NS16550,
    96       .pDeviceFns = &ns16550_fns,
    97       .deviceProbe = NULL,
    98       .pDeviceFlow = NULL,
    99       .ulMargin = 16,
    100       .ulHysteresis = 8,
    101       .pDeviceParams = (void *) LPC32XX_UART_5_BAUD,
    102       .ulCtrlPort1 = LPC32XX_BASE_UART_5,
    103       .ulCtrlPort2 = 0,
    104       .ulDataPort = LPC32XX_BASE_UART_5,
    105       .getRegister = lpc32xx_uart_get_register,
    106       .setRegister = lpc32xx_uart_set_register,
    107       .getData = NULL,
    108       .setData = NULL,
    109       .ulClock = 16 * LPC32XX_UART_5_BAUD,
    110       .ulIntVector = LPC32XX_IRQ_UART_5
     169      .device_file = "/dev/ttyS5",
     170      .probe = console_device_probe_default,
     171      .handler = &ns16550_handler_interrupt,
     172      .context = &lpc32xx_uart_context_5.base
    111173    },
    112174  #endif
    113175  #ifdef LPC32XX_UART_3_BAUD
    114176    {
    115       .sDeviceName = "/dev/ttyS3",
    116       .deviceType = SERIAL_NS16550,
    117       .pDeviceFns = &ns16550_fns,
    118       .deviceProbe = lpc32xx_uart_probe_3,
    119       .pDeviceFlow = NULL,
    120       .ulMargin = 16,
    121       .ulHysteresis = 8,
    122       .pDeviceParams = (void *) LPC32XX_UART_3_BAUD,
    123       .ulCtrlPort1 = LPC32XX_BASE_UART_3,
    124       .ulCtrlPort2 = 0,
    125       .ulDataPort = LPC32XX_BASE_UART_3,
    126       .getRegister = lpc32xx_uart_get_register,
    127       .setRegister = lpc32xx_uart_set_register,
    128       .getData = NULL,
    129       .setData = NULL,
    130       .ulClock = 16 * LPC32XX_UART_3_BAUD,
    131       .ulIntVector = LPC32XX_IRQ_UART_3
     177      .device_file = "/dev/ttyS3",
     178      .probe = lpc32xx_uart_probe_3,
     179      .handler = &ns16550_handler_interrupt,
     180      .context = &lpc32xx_uart_context_3.base
    132181    },
    133182  #endif
    134183  #ifdef LPC32XX_UART_4_BAUD
    135184    {
    136       .sDeviceName = "/dev/ttyS4",
    137       .deviceType = SERIAL_NS16550,
    138       .pDeviceFns = &ns16550_fns,
    139       .deviceProbe = lpc32xx_uart_probe_4,
    140       .pDeviceFlow = NULL,
    141       .ulMargin = 16,
    142       .ulHysteresis = 8,
    143       .pDeviceParams = (void *) LPC32XX_UART_4_BAUD,
    144       .ulCtrlPort1 = LPC32XX_BASE_UART_4,
    145       .ulCtrlPort2 = 0,
    146       .ulDataPort = LPC32XX_BASE_UART_4,
    147       .getRegister = lpc32xx_uart_get_register,
    148       .setRegister = lpc32xx_uart_set_register,
    149       .getData = NULL,
    150       .setData = NULL,
    151       .ulClock = 16 * LPC32XX_UART_4_BAUD,
    152       .ulIntVector = LPC32XX_IRQ_UART_4
     185      .device_file = "/dev/ttyS4",
     186      .probe = lpc32xx_uart_probe_4,
     187      .handler = &ns16550_handler_interrupt,
     188      .context = &lpc32xx_uart_context_4.base
    153189    },
    154190  #endif
    155191  #ifdef LPC32XX_UART_6_BAUD
    156192    {
    157       .sDeviceName = "/dev/ttyS6",
    158       .deviceType = SERIAL_NS16550,
    159       .pDeviceFns = &ns16550_fns,
    160       .deviceProbe = lpc32xx_uart_probe_6,
    161       .pDeviceFlow = NULL,
    162       .ulMargin = 16,
    163       .ulHysteresis = 8,
    164       .pDeviceParams = (void *) LPC32XX_UART_6_BAUD,
    165       .ulCtrlPort1 = LPC32XX_BASE_UART_6,
    166       .ulCtrlPort2 = 0,
    167       .ulDataPort = LPC32XX_BASE_UART_6,
    168       .getRegister = lpc32xx_uart_get_register,
    169       .setRegister = lpc32xx_uart_set_register,
    170       .getData = NULL,
    171       .setData = NULL,
    172       .ulClock = 16 * LPC32XX_UART_6_BAUD,
    173       .ulIntVector = LPC32XX_IRQ_UART_6
     193      .device_file = "/dev/ttyS6",
     194      .probe = lpc32xx_uart_probe_6,
     195      .handler = &ns16550_handler_interrupt,
     196      .context = &lpc32xx_uart_context_6.base
    174197    },
    175198  #endif
    176199  #ifdef LPC32XX_UART_1_BAUD
    177200    {
    178       .sDeviceName = "/dev/ttyS1",
    179       .deviceType = SERIAL_CUSTOM,
    180       .pDeviceFns = &lpc32xx_hsu_fns,
    181       .deviceProbe = NULL,
    182       .pDeviceFlow = NULL,
    183       .ulMargin = 16,
    184       .ulHysteresis = 8,
    185       .pDeviceParams = (void *) LPC32XX_UART_1_BAUD,
    186       .ulCtrlPort1 = LPC32XX_BASE_UART_1,
    187       .ulCtrlPort2 = 0,
    188       .ulDataPort = 0,
    189       .getRegister = NULL,
    190       .setRegister = NULL,
    191       .getData = NULL,
    192       .setData = NULL,
    193       .ulClock = 16,
    194       .ulIntVector = LPC32XX_IRQ_UART_1
     201      .device_file = "/dev/ttyS1",
     202      .probe = lpc32xx_hsu_probe,
     203      .handler = &lpc32xx_hsu_fns,
     204      .context = &lpc32xx_uart_context_1.base
    195205    },
    196206  #endif
    197207  #ifdef LPC32XX_UART_2_BAUD
    198208    {
    199       .sDeviceName = "/dev/ttyS2",
    200       .deviceType = SERIAL_CUSTOM,
    201       .pDeviceFns = &lpc32xx_hsu_fns,
    202       .deviceProbe = NULL,
    203       .pDeviceFlow = NULL,
    204       .ulMargin = 16,
    205       .ulHysteresis = 8,
    206       .pDeviceParams = (void *) LPC32XX_UART_2_BAUD,
    207       .ulCtrlPort1 = LPC32XX_BASE_UART_2,
    208       .ulCtrlPort2 = 0,
    209       .ulDataPort = 0,
    210       .getRegister = NULL,
    211       .setRegister = NULL,
    212       .getData = NULL,
    213       .setData = NULL,
    214       .ulClock = 16,
    215       .ulIntVector = LPC32XX_IRQ_UART_2
     209      .device_file = "/dev/ttyS2",
     210      .probe = lpc32xx_hsu_probe,
     211      .handler = &lpc32xx_hsu_fns,
     212      .context = &lpc32xx_uart_context_2.base
    216213    },
    217214  #endif
    218215  #ifdef LPC32XX_UART_7_BAUD
    219216    {
    220       .sDeviceName = "/dev/ttyS7",
    221       .deviceType = SERIAL_CUSTOM,
    222       .pDeviceFns = &lpc32xx_hsu_fns,
    223       .deviceProbe = NULL,
    224       .pDeviceFlow = NULL,
    225       .ulMargin = 16,
    226       .ulHysteresis = 8,
    227       .pDeviceParams = (void *) LPC32XX_UART_7_BAUD,
    228       .ulCtrlPort1 = LPC32XX_BASE_UART_7,
    229       .ulCtrlPort2 = 0,
    230       .ulDataPort = 0,
    231       .getRegister = NULL,
    232       .setRegister = NULL,
    233       .getData = NULL,
    234       .setData = NULL,
    235       .ulClock = 16,
    236       .ulIntVector = LPC32XX_IRQ_UART_7
    237     },
    238   #endif
    239 };
    240 
    241 #define LPC32XX_UART_COUNT \
    242   (sizeof(Console_Configuration_Ports) / sizeof(Console_Configuration_Ports [0]))
    243 
    244 unsigned long Console_Configuration_Count = LPC32XX_UART_COUNT;
     217      .device_file = "/dev/ttyS7",
     218      .probe = lpc32xx_hsu_probe,
     219      .handler = &lpc32xx_hsu_fns,
     220      .context = &lpc32xx_uart_context_7.base
     221    },
     222  #endif
     223};
     224
     225const size_t console_device_count = RTEMS_ARRAY_SIZE(console_device_table);
  • c/src/lib/libbsp/arm/lpc32xx/console/hsu.c

    rd5cc923f r6ec438e  
    88
    99/*
    10  * Copyright (c) 2010
    11  * embedded brains GmbH
    12  * Obere Lagerstr. 30
    13  * D-82178 Puchheim
    14  * Germany
    15  * <rtems@embedded-brains.de>
     10 * Copyright (c) 2010-2014 embedded brains GmbH.  All rights reserved.
     11 *
     12 *  embedded brains GmbH
     13 *  Dornierstr. 4
     14 *  82178 Puchheim
     15 *  Germany
     16 *  <rtems@embedded-brains.de>
    1617 *
    1718 * The license and distribution terms for this file may be
     
    2021 */
    2122
    22 #include <rtems.h>
    23 #include <rtems/libio.h>
    24 #include <rtems/termiostypes.h>
    25 
    26 #include <libchip/serial.h>
    27 #include <libchip/sersupp.h>
    28 
    2923#include <bsp.h>
    3024#include <bsp/lpc32xx.h>
    3125#include <bsp/irq.h>
    32 
    33 typedef struct {
    34   uint32_t fifo;
    35   uint32_t level;
    36   uint32_t iir;
    37   uint32_t ctrl;
    38   uint32_t rate;
    39 } lpc32xx_hsu;
     26#include <bsp/hsu.h>
    4027
    4128#define HSU_FIFO_SIZE 64
     
    6148#define HSU_IIR_MASK 0x7U
    6249
    63 static int lpc32xx_hsu_first_open(int major, int minor, void *arg)
    64 {
    65   rtems_libio_open_close_args_t *oca = arg;
    66   struct rtems_termios_tty *tty = oca->iop->data1;
    67   console_tbl *ct = Console_Port_Tbl [minor];
    68   console_data *cd = &Console_Port_Data [minor];
    69   volatile lpc32xx_hsu *hsu = (volatile lpc32xx_hsu *) ct->ulCtrlPort1;
    70 
    71   cd->termios_data = tty;
    72   rtems_termios_set_initial_baud(tty, (int32_t) ct->pDeviceParams);
    73   hsu->ctrl = HSU_CTRL_RX_INTR_ENABLED;
    74 
    75   return 0;
    76 }
    77 
    78 static ssize_t lpc32xx_hsu_write(int minor, const char *buf, size_t len)
    79 {
    80   console_tbl *ct = Console_Port_Tbl [minor];
    81   console_data *cd = &Console_Port_Data [minor];
    82   volatile lpc32xx_hsu *hsu = (volatile lpc32xx_hsu *) ct->ulCtrlPort1;
    83   size_t tx_level = (hsu->level & HSU_LEVEL_TX_MASK) >> HSU_LEVEL_TX_SHIFT;
    84   size_t tx_free = HSU_FIFO_SIZE - tx_level;
    85   size_t i = 0;
    86   size_t out = len > tx_free ? tx_free : len;
    87 
    88   for (i = 0; i < out; ++i) {
    89     hsu->fifo = buf [i];
    90   }
    91 
    92   if (len > 0) {
    93     cd->pDeviceContext = (void *) out;
    94     cd->bActive = true;
    95     hsu->ctrl = HSU_CTRL_RX_AND_TX_INTR_ENABLED;
    96   }
    97 
    98   return 0;
     50bool lpc32xx_hsu_probe(rtems_termios_device_context *base)
     51{
     52  lpc32xx_hsu_context *ctx = (lpc32xx_hsu_context *) base;
     53  volatile lpc32xx_hsu *hsu = ctx->hsu;
     54
     55  hsu->ctrl = HSU_CTRL_INTR_DISABLED;
     56
     57  /* Drain FIFOs */
     58  while (hsu->level != 0) {
     59    hsu->fifo;
     60  }
     61
     62  return true;
    9963}
    10064
    10165static void lpc32xx_hsu_interrupt_handler(void *arg)
    10266{
    103   int minor = (int) arg;
    104   console_tbl *ct = Console_Port_Tbl [minor];
    105   console_data *cd = &Console_Port_Data [minor];
    106   volatile lpc32xx_hsu *hsu = (volatile lpc32xx_hsu *) ct->ulCtrlPort1;
     67  rtems_termios_tty *tty = arg;
     68  lpc32xx_hsu_context *ctx = rtems_termios_get_device_context(tty);
     69  volatile lpc32xx_hsu *hsu = ctx->hsu;
    10770
    10871  /* Iterate until no more interrupts are pending */
    10972  do {
    110     int chars_to_dequeue = (int) cd->pDeviceContext;
    11173    int rv = 0;
    11274    int i = 0;
     
    12688      }
    12789    }
    128     rtems_termios_enqueue_raw_characters(cd->termios_data, buf, i);
     90    rtems_termios_enqueue_raw_characters(tty, buf, i);
    12991
    13092    /* Dequeue transmitted characters */
    131     cd->pDeviceContext = 0;
    132     rv = rtems_termios_dequeue_characters(cd->termios_data, chars_to_dequeue);
     93    rv = rtems_termios_dequeue_characters(tty, (int) ctx->chars_in_transmission);
    13394    if (rv == 0) {
    13495      /* Nothing to transmit */
    135       cd->bActive = false;
    136       hsu->ctrl = HSU_CTRL_RX_INTR_ENABLED;
    137       hsu->iir = HSU_IIR_TX;
    13896    }
    13997  } while ((hsu->iir & HSU_IIR_MASK) != 0);
    14098}
    14199
    142 static void lpc32xx_hsu_initialize(int minor)
    143 {
    144   console_tbl *ct = Console_Port_Tbl [minor];
    145   console_data *cd = &Console_Port_Data [minor];
    146   volatile lpc32xx_hsu *hsu = (volatile lpc32xx_hsu *) ct->ulCtrlPort1;
    147 
    148   hsu->ctrl = HSU_CTRL_INTR_DISABLED;
    149 
    150   cd->bActive = false;
    151   cd->pDeviceContext = 0;
    152 
    153   /* Drain FIFOs */
    154   while (hsu->level != 0) {
    155     hsu->fifo;
    156   }
    157 
    158   rtems_interrupt_handler_install(
    159     ct->ulIntVector,
     100static bool lpc32xx_hsu_first_open(
     101  struct rtems_termios_tty *tty,
     102  rtems_termios_device_context *base,
     103  struct termios *term,
     104  rtems_libio_open_close_args_t *args
     105)
     106{
     107  lpc32xx_hsu_context *ctx = (lpc32xx_hsu_context *) base;
     108  volatile lpc32xx_hsu *hsu = ctx->hsu;
     109  rtems_status_code sc;
     110  bool ok;
     111
     112  sc = rtems_interrupt_handler_install(
     113    ctx->irq,
    160114    "HSU",
    161115    RTEMS_INTERRUPT_UNIQUE,
    162116    lpc32xx_hsu_interrupt_handler,
    163     (void *) minor
     117    tty
    164118  );
    165 }
    166 
    167 static int lpc32xx_hsu_set_attributes(int minor, const struct termios *term)
    168 {
    169   console_tbl *ct = Console_Port_Tbl [minor];
    170   volatile lpc32xx_hsu *hsu = (volatile lpc32xx_hsu *) ct->ulCtrlPort1;
     119  ok = sc == RTEMS_SUCCESSFUL;
     120
     121  if (ok) {
     122    rtems_termios_set_initial_baud(tty, ctx->initial_baud);
     123    hsu->ctrl = HSU_CTRL_RX_INTR_ENABLED;
     124  }
     125
     126  return ok;
     127}
     128
     129static void lpc32xx_hsu_last_close(
     130  struct rtems_termios_tty *tty,
     131  rtems_termios_device_context *base,
     132  rtems_libio_open_close_args_t *args
     133)
     134{
     135  lpc32xx_hsu_context *ctx = (lpc32xx_hsu_context *) base;
     136  volatile lpc32xx_hsu *hsu = ctx->hsu;
     137
     138  hsu->ctrl = HSU_CTRL_INTR_DISABLED;
     139
     140  rtems_interrupt_handler_remove(
     141    ctx->irq,
     142    lpc32xx_hsu_interrupt_handler,
     143    tty
     144  );
     145}
     146
     147static void lpc32xx_hsu_write(
     148  rtems_termios_device_context *base,
     149  const char *buf,
     150  size_t len
     151)
     152{
     153  lpc32xx_hsu_context *ctx = (lpc32xx_hsu_context *) base;
     154  volatile lpc32xx_hsu *hsu = ctx->hsu;
     155  size_t tx_level = (hsu->level & HSU_LEVEL_TX_MASK) >> HSU_LEVEL_TX_SHIFT;
     156  size_t tx_free = HSU_FIFO_SIZE - tx_level;
     157  size_t i = 0;
     158  size_t out = len > tx_free ? tx_free : len;
     159
     160  for (i = 0; i < out; ++i) {
     161    hsu->fifo = buf [i];
     162  }
     163
     164  ctx->chars_in_transmission = out;
     165
     166  if (len > 0) {
     167    hsu->ctrl = HSU_CTRL_RX_AND_TX_INTR_ENABLED;
     168  } else {
     169    hsu->ctrl = HSU_CTRL_RX_INTR_ENABLED;
     170    hsu->iir = HSU_IIR_TX;
     171  }
     172}
     173
     174static bool lpc32xx_hsu_set_attributes(
     175  rtems_termios_device_context *base,
     176  const struct termios *term
     177)
     178{
     179  lpc32xx_hsu_context *ctx = (lpc32xx_hsu_context *) base;
     180  volatile lpc32xx_hsu *hsu = ctx->hsu;
    171181  int baud_flags = term->c_cflag & CBAUD;
    172182
     
    187197  }
    188198
    189   return 0;
    190 }
    191 
    192 const console_fns lpc32xx_hsu_fns = {
    193   .deviceProbe = libchip_serial_default_probe,
    194   .deviceFirstOpen = lpc32xx_hsu_first_open,
    195   .deviceLastClose = NULL,
    196   .deviceRead = NULL,
    197   .deviceWrite = lpc32xx_hsu_write,
    198   .deviceInitialize = lpc32xx_hsu_initialize,
    199   .deviceWritePolled = NULL,
    200   .deviceSetAttributes = lpc32xx_hsu_set_attributes,
    201   .deviceOutputUsesInterrupts = true
     199  return true;
     200}
     201
     202const rtems_termios_device_handler lpc32xx_hsu_fns = {
     203  .first_open = lpc32xx_hsu_first_open,
     204  .last_close = lpc32xx_hsu_last_close,
     205  .write = lpc32xx_hsu_write,
     206  .set_attributes = lpc32xx_hsu_set_attributes,
     207  .mode = TERMIOS_IRQ_DRIVEN
    202208};
  • c/src/lib/libbsp/arm/lpc32xx/preinstall.am

    rd5cc923f r6ec438e  
    147147PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/boot.h
    148148
     149$(PROJECT_INCLUDE)/bsp/hsu.h: include/hsu.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
     150        $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/hsu.h
     151PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/hsu.h
     152
    149153$(PROJECT_INCLUDE)/bsp/i2c.h: include/i2c.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
    150154        $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/i2c.h
  • c/src/lib/libbsp/powerpc/gen83xx/Makefile.am

    rd5cc923f r6ec438e  
    8383
    8484# console
    85 libbsp_a_SOURCES += ../../shared/console.c \
    86         ../../shared/console_select.c \
    87         console/console-config.c \
    88         ../../shared/console_read.c \
    89         ../../shared/console_write.c \
    90         ../../shared/console_control.c
     85libbsp_a_SOURCES += ../../shared/console-termios-init.c
     86libbsp_a_SOURCES += ../../shared/console-termios.c
     87libbsp_a_SOURCES += console/console-config.c
     88
    9189# bsp_i2c
    9290libbsp_a_SOURCES += i2c/i2c_init.c
  • c/src/lib/libbsp/powerpc/gen83xx/console/console-config.c

    rd5cc923f r6ec438e  
    66
    77/*
    8  * Copyright (c) 2008, 2010 embedded brains GmbH.  All rights reserved.
     8 * Copyright (c) 2008-2014 embedded brains GmbH.  All rights reserved.
    99 *
    1010 *  embedded brains GmbH
    11  *  Obere Lagerstr. 30
     11 *  Dornierstr. 4
    1212 *  82178 Puchheim
    1313 *  Germany
     
    2121#include <rtems/bspIo.h>
    2222
    23 #include <libchip/serial.h>
    2423#include <libchip/ns16550.h>
    25 #include "../../../shared/console_private.h"
    2624
    2725#include <mpc83xx/mpc83xx.h>
    2826
    29 #include <bspopts.h>
     27#include <bsp.h>
    3028#include <bsp/irq.h>
     29#include <bsp/console-termios.h>
    3130
    32 #ifdef BSP_USE_UART2
    33   #define PORT_COUNT 2
     31#ifdef BSP_USE_UART_INTERRUPTS
     32  #define DEVICE_FNS &ns16550_handler_interrupt
    3433#else
    35   #define PORT_COUNT 1
     34  #define DEVICE_FNS &ns16550_handler_polled
    3635#endif
    3736
    38 #ifdef BSP_USE_UART_INTERRUPTS
    39   #define DEVICE_FNS &ns16550_fns
    40 #else
    41   #define DEVICE_FNS &ns16550_fns_polled
    42 #endif
    43 
    44 static uint8_t gen83xx_console_get_register(uint32_t addr, uint8_t i)
     37static uint8_t gen83xx_console_get_register(uintptr_t addr, uint8_t i)
    4538{
    4639  volatile uint8_t *reg = (volatile uint8_t *) addr;
     
    4942}
    5043
    51 static void gen83xx_console_set_register(uint32_t addr, uint8_t i, uint8_t val)
     44static void gen83xx_console_set_register(uintptr_t addr, uint8_t i, uint8_t val)
    5245{
    5346  volatile uint8_t *reg = (volatile uint8_t *) addr;
    5447
    55   reg [i] = val; 
     48  reg [i] = val;
    5649}
    5750
    58 unsigned long Console_Configuration_Count = PORT_COUNT;
     51static ns16550_context gen83xx_uart_context_0 = {
     52  .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("UART 0"),
     53  .get_reg = gen83xx_console_get_register,
     54  .set_reg = gen83xx_console_set_register,
     55  .port = (uintptr_t) &mpc83xx.duart[0],
     56#if MPC83XX_CHIP_TYPE / 10 == 830
     57   .irq = BSP_IPIC_IRQ_UART,
     58#else
     59   .irq = BSP_IPIC_IRQ_UART1,
     60#endif
     61  .initial_baud = BSP_CONSOLE_BAUD
     62};
    5963
    60 console_tbl Console_Configuration_Ports [PORT_COUNT] = {
     64#ifdef BSP_USE_UART2
     65static ns16550_context gen83xx_uart_context_1 = {
     66  .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("UART 1"),
     67  .get_reg = gen83xx_console_get_register,
     68  .set_reg = gen83xx_console_set_register,
     69  .port = (uintptr_t) &mpc83xx.duart[1],
     70#if MPC83XX_CHIP_TYPE / 10 == 830
     71  .irq = BSP_IPIC_IRQ_UART,
     72#else
     73  .irq = BSP_IPIC_IRQ_UART2,
     74#endif
     75  .initial_baud = BSP_CONSOLE_BAUD
     76};
     77#endif
     78
     79const console_device console_device_table[] = {
    6180  {
    62     .sDeviceName = "/dev/ttyS0",
    63     .deviceType = SERIAL_NS16550,
    64     .pDeviceFns = DEVICE_FNS,
    65     .deviceProbe = NULL,
    66     .pDeviceFlow = NULL,
    67     .ulMargin = 16,
    68     .ulHysteresis = 8,
    69     .pDeviceParams = (void *) BSP_CONSOLE_BAUD,
    70     .ulCtrlPort1 = (uint32_t) &mpc83xx.duart [0],
    71     .ulCtrlPort2 = 0,
    72     .ulDataPort =  (uint32_t) &mpc83xx.duart [0],
    73     .getRegister = gen83xx_console_get_register,
    74     .setRegister = gen83xx_console_set_register,
    75     .getData = NULL,
    76     .setData = NULL,
    77     .ulClock = 0,
    78 #if MPC83XX_CHIP_TYPE / 10 == 830
    79     .ulIntVector = BSP_IPIC_IRQ_UART
    80 #else
    81     .ulIntVector = BSP_IPIC_IRQ_UART1
    82 #endif
     81    .device_file = "/dev/ttyS0",
     82    .probe = ns16550_probe,
     83    .handler = DEVICE_FNS,
     84    .context = &gen83xx_uart_context_0.base
    8385  }
    8486#ifdef BSP_USE_UART2
    8587  , {
    86     .sDeviceName = "/dev/ttyS1",
    87     .deviceType = SERIAL_NS16550,
    88     .pDeviceFns = DEVICE_FNS,
    89     .deviceProbe = NULL,
    90     .pDeviceFlow = NULL,
    91     .ulMargin = 16,
    92     .ulHysteresis = 8,
    93     .pDeviceParams = (void *) BSP_CONSOLE_BAUD,
    94     .ulCtrlPort1 = (uint32_t) &mpc83xx.duart [1],
    95     .ulCtrlPort2 = 0,
    96     .ulDataPort =  (uint32_t) &mpc83xx.duart [1],
    97     .getRegister = gen83xx_console_get_register,
    98     .setRegister = gen83xx_console_set_register,
    99     .getData = NULL,
    100     .setData = NULL,
    101     .ulClock = 0,
    102 #if MPC83XX_CHIP_TYPE / 10 == 830
    103     .ulIntVector = BSP_IPIC_IRQ_UART
    104 #else
    105     .ulIntVector = BSP_IPIC_IRQ_UART2
    106 #endif
     88    .device_file = "/dev/ttyS1",
     89    .probe = ns16550_probe,
     90    .handler = DEVICE_FNS,
     91    .context = &gen83xx_uart_context_1.base
    10792  }
    10893#endif
    10994};
    11095
     96const size_t console_device_count = RTEMS_ARRAY_SIZE(console_device_table);
     97
    11198static void gen83xx_output_char(char c)
    11299{
    113   const console_fns *console = Console_Port_Tbl [Console_Port_Minor]->pDeviceFns;
    114  
     100  rtems_termios_device_context *ctx = console_device_table[0].context;
     101
    115102  if (c == '\n') {
    116     console->deviceWritePolled((int) Console_Port_Minor, '\r');
     103    ns16550_polled_putchar(ctx, '\r');
    117104  }
    118   console->deviceWritePolled((int) Console_Port_Minor, c);
     105
     106  ns16550_polled_putchar(ctx, c);
    119107}
    120108
    121 BSP_output_char_function_type  BSP_output_char = gen83xx_output_char;
     109BSP_output_char_function_type BSP_output_char = gen83xx_output_char;
    122110
    123111BSP_polling_getchar_function_type BSP_poll_char = NULL;
  • c/src/lib/libbsp/powerpc/gen83xx/startup/bspstart.c

    rd5cc923f r6ec438e  
    88
    99/*
    10  * Copyright (c) 2008
    11  * Embedded Brains GmbH
    12  * Obere Lagerstr. 30
    13  * D-82178 Puchheim
    14  * Germany
    15  * rtems@embedded-brains.de
     10 * Copyright (c) 2008-2014 embedded brains GmbH.  All rights reserved.
     11 *
     12 *  embedded brains GmbH
     13 *  Dornierstr. 4
     14 *  82178 Puchheim
     15 *  Germany
     16 *  <info@embedded-brains.de>
    1617 *
    1718 * The license and distribution terms for this file may be
     
    2223#include <rtems/counter.h>
    2324
    24 #include <libchip/serial.h>
     25#include <libchip/ns16550.h>
    2526
    2627#include <libcpu/powerpc-utility.h>
     
    3233#include <bsp/linker-symbols.h>
    3334#include <bsp/u-boot.h>
     35#include <bsp/console-termios.h>
    3436
    3537/* Configuration parameters for console driver, ... */
     
    5557
    5658  rtems_interrupt_disable(level);
     59  (void) level;
    5760
    5861  printk("%s PANIC %s\n", rtems_get_version_string(), s);
     
    6871
    6972  rtems_interrupt_disable( level);
     73  (void) level;
    7074
    7175  printk( "%s PANIC ERROR %u\n", rtems_get_version_string(), n);
     
    8185  unsigned long i = 0;
    8286
    83   ppc_cpu_id_t myCpu;
    84   ppc_cpu_revision_t myCpuRevision;
    85 
    8687  /*
    8788   * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
    8889   * store the result in global variables so that it can be used latter...
    8990   */
    90   myCpu = get_ppc_cpu_type();
    91   myCpuRevision = get_ppc_cpu_revision();
     91  get_ppc_cpu_type();
     92  get_ppc_cpu_revision();
    9293
    9394  /* Basic CPU initialization */
     
    123124
    124125  /* Initialize some console parameters */
    125   for (i = 0; i < Console_Configuration_Count; ++i) {
    126     Console_Configuration_Ports [i].ulClock = BSP_bus_frequency;
     126  for (i = 0; i < console_device_count; ++i) {
     127    ns16550_context *ctx = (ns16550_context *) console_device_table[i].context;
     128
     129    ctx->clock = BSP_bus_frequency;
    127130
    128131    #ifdef HAS_UBOOT
    129       Console_Configuration_Ports [i].pDeviceParams =
    130         (void *) bsp_uboot_board_info.bi_baudrate;
     132      ctx->initial_baud = bsp_uboot_board_info.bi_baudrate;
    131133    #endif
    132134  }
  • c/src/lib/libbsp/powerpc/qoriq/Makefile.am

    rd5cc923f r6ec438e  
    9393
    9494# Console
    95 libbsp_a_SOURCES += ../../shared/console.c \
    96         ../../shared/console_select.c \
    97         console/uart-bridge-master.c \
    98         console/uart-bridge-slave.c \
    99         console/console-config.c \
    100         ../../shared/console_read.c \
    101         ../../shared/console_write.c \
    102         ../../shared/console_control.c
    103 
     95libbsp_a_SOURCES += ../../shared/console-termios-init.c
     96libbsp_a_SOURCES += ../../shared/console-termios.c
     97libbsp_a_SOURCES += console/uart-bridge-master.c
     98libbsp_a_SOURCES += console/uart-bridge-slave.c
     99libbsp_a_SOURCES += console/console-config.c
    104100
    105101# RTC
  • c/src/lib/libbsp/powerpc/qoriq/console/console-config.c

    rd5cc923f r6ec438e  
    88
    99/*
    10  * Copyright (c) 2010 embedded brains GmbH.  All rights reserved.
     10 * Copyright (c) 2010-2014 embedded brains GmbH.  All rights reserved.
    1111 *
    1212 *  embedded brains GmbH
    13  *  Obere Lagerstr. 30
     13 *  Dornierstr. 4
    1414 *  82178 Puchheim
    1515 *  Germany
     
    2121 */
    2222
    23 #include <assert.h>
    24 
    2523#include <rtems/bspIo.h>
    2624
    27 #include <libchip/serial.h>
    2825#include <libchip/ns16550.h>
    29 #include "../../../shared/console_private.h"
    3026
    31 #include <bspopts.h>
     27#include <bsp.h>
    3228#include <bsp/irq.h>
    3329#include <bsp/qoriq.h>
    3430#include <bsp/intercom.h>
    3531#include <bsp/uart-bridge.h>
    36 
    37 #define CONSOLE_COUNT \
    38   (QORIQ_UART_0_ENABLE \
    39     + QORIQ_UART_1_ENABLE \
    40     + QORIQ_UART_BRIDGE_0_ENABLE \
    41     + QORIQ_UART_BRIDGE_1_ENABLE)
     32#include <bsp/console-termios.h>
    4233
    4334#if (QORIQ_UART_0_ENABLE + QORIQ_UART_BRIDGE_0_ENABLE == 2) \
     
    4839#endif
    4940
    50 #ifdef BRIDGE_MASTER
    51   #define BRIDGE_FNS &qoriq_uart_bridge_master
    52   #if QORIQ_UART_BRIDGE_0_ENABLE
    53     static uart_bridge_master_control bridge_0_control = {
    54       .device_path = "/dev/ttyS0",
    55       .type = INTERCOM_TYPE_UART_0,
    56       .transmit_fifo = RTEMS_CHAIN_INITIALIZER_EMPTY(
    57         bridge_0_control.transmit_fifo
    58       )
    59     };
    60     #define BRIDGE_0_CONTROL &bridge_0_control
    61   #endif
    62   #if QORIQ_UART_BRIDGE_1_ENABLE
    63     static uart_bridge_master_control bridge_1_control = {
    64       .device_path = "/dev/ttyS1",
    65       .type = INTERCOM_TYPE_UART_1,
    66       .transmit_fifo = RTEMS_CHAIN_INITIALIZER_EMPTY(
    67         bridge_1_control.transmit_fifo
    68       )
    69     };
    70     #define BRIDGE_1_CONTROL &bridge_1_control
    71   #endif
    72 #endif
    73 
    74 #ifdef BRIDGE_SLAVE
    75   #define BRIDGE_FNS &qoriq_uart_bridge_slave
    76   #if QORIQ_UART_BRIDGE_0_ENABLE
    77     static uart_bridge_slave_control bridge_0_control = {
    78       .type = INTERCOM_TYPE_UART_0,
    79       .transmit_fifo = RTEMS_CHAIN_INITIALIZER_EMPTY(
    80         bridge_0_control.transmit_fifo
    81       )
    82     };
    83     #define BRIDGE_0_CONTROL &bridge_0_control
    84   #endif
    85   #if QORIQ_UART_BRIDGE_1_ENABLE
    86     static uart_bridge_slave_control bridge_1_control = {
    87       .type = INTERCOM_TYPE_UART_1,
    88       .transmit_fifo = RTEMS_CHAIN_INITIALIZER_EMPTY(
    89         bridge_1_control.transmit_fifo
    90       )
    91     };
    92     #define BRIDGE_1_CONTROL &bridge_1_control
    93   #endif
    94 #endif
    95 
    9641#ifdef BSP_USE_UART_INTERRUPTS
    97   #define DEVICE_FNS &ns16550_fns
     42  #define DEVICE_FNS &ns16550_handler_interrupt
    9843#else
    99   #define DEVICE_FNS &ns16550_fns_polled
     44  #define DEVICE_FNS &ns16550_handler_polled
    10045#endif
    10146
     
    11257    volatile uint8_t *reg = (uint8_t *) addr;
    11358
    114     reg [i] = val; 
     59    reg [i] = val;
    11560  }
    11661#endif
    11762
    118 unsigned long Console_Configuration_Count = CONSOLE_COUNT;
    119 console_tbl Console_Configuration_Ports [CONSOLE_COUNT] = {
     63#if QORIQ_UART_0_ENABLE
     64static ns16550_context qoriq_uart_context_0 = {
     65  .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("UART 0"),
     66  .get_reg = get_register,
     67  .set_reg = set_register,
     68  .port = (uintptr_t) &qoriq.uart_0,
     69  .irq = QORIQ_IRQ_DUART,
     70  .initial_baud = BSP_CONSOLE_BAUD
     71};
     72#endif
     73
     74#if QORIQ_UART_1_ENABLE
     75static ns16550_context qoriq_uart_context_1 = {
     76  .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("UART 1"),
     77  .get_reg = get_register,
     78  .set_reg = set_register,
     79  .port = (uintptr_t) &qoriq.uart_1,
     80  .irq = QORIQ_IRQ_DUART,
     81  .initial_baud = BSP_CONSOLE_BAUD
     82};
     83#endif
     84
     85#ifdef BRIDGE_MASTER
     86  #define BRIDGE_PROBE qoriq_uart_bridge_master_probe
     87  #define BRIDGE_FNS &qoriq_uart_bridge_master
     88  #if QORIQ_UART_BRIDGE_0_ENABLE
     89    static uart_bridge_master_context bridge_0_context = {
     90      .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("UART Bridge 0"),
     91      .device_path = "/dev/ttyS0",
     92      .type = INTERCOM_TYPE_UART_0,
     93      .transmit_fifo = RTEMS_CHAIN_INITIALIZER_EMPTY(
     94        bridge_0_context.transmit_fifo
     95      )
     96    };
     97    #define BRIDGE_0_CONTEXT &bridge_0_context
     98  #endif
     99  #if QORIQ_UART_BRIDGE_1_ENABLE
     100    static uart_bridge_master_context bridge_1_context = {
     101      .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("UART Bridge 1"),
     102      .device_path = "/dev/ttyS1",
     103      .type = INTERCOM_TYPE_UART_1,
     104      .transmit_fifo = RTEMS_CHAIN_INITIALIZER_EMPTY(
     105        bridge_1_context.transmit_fifo
     106      )
     107    };
     108    #define BRIDGE_1_CONTEXT &bridge_1_context
     109  #endif
     110#endif
     111
     112#ifdef BRIDGE_SLAVE
     113  #define BRIDGE_PROBE console_device_probe_default
     114  #define BRIDGE_FNS &qoriq_uart_bridge_slave
     115  #if QORIQ_UART_BRIDGE_0_ENABLE
     116    static uart_bridge_slave_context bridge_0_context = {
     117      .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("UART Bridge 0"),
     118      .type = INTERCOM_TYPE_UART_0,
     119      .transmit_fifo = RTEMS_CHAIN_INITIALIZER_EMPTY(
     120        bridge_0_context.transmit_fifo
     121      )
     122    };
     123    #define BRIDGE_0_CONTEXT &bridge_0_context
     124  #endif
     125  #if QORIQ_UART_BRIDGE_1_ENABLE
     126    static uart_bridge_slave_context bridge_1_context = {
     127      .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("UART Bridge 1"),
     128      .type = INTERCOM_TYPE_UART_1,
     129      .transmit_fifo = RTEMS_CHAIN_INITIALIZER_EMPTY(
     130        bridge_1_context.transmit_fifo
     131      )
     132    };
     133    #define BRIDGE_1_CONTEXT &bridge_1_context
     134  #endif
     135#endif
     136
     137const console_device console_device_table[] = {
    120138  #if QORIQ_UART_0_ENABLE
    121139    {
    122       .sDeviceName = "/dev/ttyS0",
    123       .deviceType = SERIAL_NS16550,
    124       .pDeviceFns = DEVICE_FNS,
    125       .deviceProbe = NULL,
    126       .pDeviceFlow = NULL,
    127       .ulMargin = 16,
    128       .ulHysteresis = 8,
    129       .pDeviceParams = (void *) BSP_CONSOLE_BAUD,
    130       .ulCtrlPort1 = (uintptr_t) &qoriq.uart_0,
    131       .ulCtrlPort2 = 0,
    132       .ulDataPort =  (uintptr_t) &qoriq.uart_0,
    133       .getRegister = get_register,
    134       .setRegister = set_register,
    135       .getData = NULL,
    136       .setData = NULL,
    137       .ulClock = 0,
    138       .ulIntVector = QORIQ_IRQ_DUART
     140      .device_file = "/dev/ttyS0",
     141      .probe = ns16550_probe,
     142      .handler = DEVICE_FNS,
     143      .context = &qoriq_uart_context_0.base
    139144    },
    140145  #endif
    141146  #if QORIQ_UART_1_ENABLE
    142147    {
    143       .sDeviceName = "/dev/ttyS1",
    144       .deviceType = SERIAL_NS16550,
    145       .pDeviceFns = DEVICE_FNS,
    146       .deviceProbe = NULL,
    147       .pDeviceFlow = NULL,
    148       .ulMargin = 16,
    149       .ulHysteresis = 8,
    150       .pDeviceParams = (void *) BSP_CONSOLE_BAUD,
    151       .ulCtrlPort1 = (uintptr_t) &qoriq.uart_1,
    152       .ulCtrlPort2 = 0,
    153       .ulDataPort =  (uintptr_t) &qoriq.uart_1,
    154       .getRegister = get_register,
    155       .setRegister = set_register,
    156       .getData = NULL,
    157       .setData = NULL,
    158       .ulClock = 0,
    159       .ulIntVector = QORIQ_IRQ_DUART
     148      .device_file = "/dev/ttyS1",
     149      .probe = ns16550_probe,
     150      .handler = DEVICE_FNS,
     151      .context = &qoriq_uart_context_1.base
    160152    },
    161153  #endif
     
    163155    {
    164156      #if QORIQ_UART_1_ENABLE
    165         .sDeviceName = "/dev/ttyB0",
     157        .device_file = "/dev/ttyB0",
    166158      #else
    167         .sDeviceName = "/dev/ttyS0",
     159        .device_file = "/dev/ttyS0",
    168160      #endif
    169       .deviceType = SERIAL_CUSTOM,
    170       .pDeviceFns = BRIDGE_FNS,
    171       .pDeviceParams = BRIDGE_0_CONTROL
     161      .probe = BRIDGE_PROBE,
     162      .handler = BRIDGE_FNS,
     163      .context = BRIDGE_0_CONTEXT
    172164    },
    173165  #endif
     
    175167    {
    176168      #if QORIQ_UART_1_ENABLE
    177         .sDeviceName = "/dev/ttyB1",
     169        .device_file = "/dev/ttyB1",
    178170      #else
    179         .sDeviceName = "/dev/ttyS1",
     171        .device_file = "/dev/ttyS1",
    180172      #endif
    181       .deviceType = SERIAL_CUSTOM,
    182       .pDeviceFns = BRIDGE_FNS,
    183       .pDeviceParams = BRIDGE_1_CONTROL
     173      .probe = BRIDGE_PROBE,
     174      .handler = BRIDGE_FNS,
     175      .context = BRIDGE_1_CONTEXT
    184176    }
    185177  #endif
    186178};
    187179
     180const size_t console_device_count = RTEMS_ARRAY_SIZE(console_device_table);
     181
    188182static void output_char(char c)
    189183{
    190   int minor = (int) Console_Port_Minor;
    191   const console_tbl **ct_tbl = Console_Port_Tbl;
     184  rtems_termios_device_context *ctx = console_device_table[0].context;
    192185
    193   if (ct_tbl != NULL) {
    194     const console_fns *cf = ct_tbl[minor]->pDeviceFns;
     186  if (c == '\n') {
     187    ns16550_polled_putchar(ctx, '\r');
     188  }
    195189
    196     if (c == '\n') {
    197       (*cf->deviceWritePolled)(minor, '\r');
    198     }
    199 
    200     (*cf->deviceWritePolled)(minor, c);
    201   }
     190  ns16550_polled_putchar(ctx, c);
    202191}
    203192
  • c/src/lib/libbsp/powerpc/qoriq/console/uart-bridge-master.c

    rd5cc923f r6ec438e  
    88
    99/*
    10  * Copyright (c) 2011 embedded brains GmbH.  All rights reserved.
     10 * Copyright (c) 2011-2014 embedded brains GmbH.  All rights reserved.
    1111 *
    1212 *  embedded brains GmbH
    13  *  Obere Lagerstr. 30
     13 *  Dornierstr. 4
    1414 *  82178 Puchheim
    1515 *  Germany
     
    2626#include <unistd.h>
    2727#include <termios.h>
    28 
    29 #include <libchip/sersupp.h>
    3028
    3129#include <bspopts.h>
     
    5654{
    5755  rtems_status_code sc = RTEMS_SUCCESSFUL;
    58   uart_bridge_master_control *control = arg;
     56  uart_bridge_master_context *ctx = arg;
    5957
    6058  sc = rtems_chain_append_with_notification(
    61     &control->transmit_fifo,
     59    &ctx->transmit_fifo,
    6260    &packet->glue.node,
    63     control->transmit_task,
     61    ctx->transmit_task,
    6462    TRANSMIT_EVENT
    6563  );
     
    6967static void receive_task(rtems_task_argument arg)
    7068{
    71   uart_bridge_master_control *control = (uart_bridge_master_control *) arg;
    72   intercom_type type = control->type;
     69  uart_bridge_master_context *ctx = (uart_bridge_master_context *) arg;
     70  intercom_type type = ctx->type;
    7371
    74   int fd = open(control->device_path, O_RDONLY);
     72  int fd = open(ctx->device_path, O_RDONLY);
    7573  assert(fd >= 0);
    7674
     
    9593{
    9694  rtems_status_code sc = RTEMS_SUCCESSFUL;
    97   uart_bridge_master_control *control = (uart_bridge_master_control *) arg;
    98   rtems_chain_control *fifo = &control->transmit_fifo;
     95  uart_bridge_master_context *ctx = (uart_bridge_master_context *) arg;
     96  rtems_chain_control *fifo = &ctx->transmit_fifo;
    9997
    100   int fd = open(control->device_path, O_WRONLY);
     98  int fd = open(ctx->device_path, O_WRONLY);
    10199  assert(fd >= 0);
    102100
     
    120118  char name,
    121119  rtems_task_entry entry,
    122   uart_bridge_master_control *control
     120  uart_bridge_master_context *ctx
    123121)
    124122{
    125123  rtems_status_code sc = RTEMS_SUCCESSFUL;
    126124  rtems_id task = RTEMS_ID_NONE;
    127   char index = (char) ('0' + control->type - INTERCOM_TYPE_UART_0);
     125  char index = (char) ('0' + ctx->type - INTERCOM_TYPE_UART_0);
    128126
    129127  sc = rtems_task_create(
     
    140138    task,
    141139    entry,
    142     (rtems_task_argument) control
     140    (rtems_task_argument) ctx
    143141  );
    144142  assert(sc == RTEMS_SUCCESSFUL);
     
    147145}
    148146
    149 static void initialize(int minor)
     147bool qoriq_uart_bridge_master_probe(rtems_termios_device_context *base)
    150148{
    151   console_tbl *ct = Console_Port_Tbl [minor];
    152   uart_bridge_master_control *control = ct->pDeviceParams;
    153   intercom_type type = control->type;
     149  uart_bridge_master_context *ctx = (uart_bridge_master_context *) base;
     150  intercom_type type = ctx->type;
    154151
    155   qoriq_intercom_service_install(type, uart_bridge_master_service, control);
    156   create_task('R', receive_task, control);
    157   control->transmit_task = create_task('T', transmit_task, control);
     152  qoriq_intercom_service_install(type, uart_bridge_master_service, ctx);
     153  create_task('R', receive_task, ctx);
     154  ctx->transmit_task = create_task('T', transmit_task, ctx);
     155
     156  return true;
    158157}
    159158
    160 static int first_open(int major, int minor, void *arg)
     159static bool first_open(
     160  struct rtems_termios_tty *tty,
     161  rtems_termios_device_context *base,
     162  struct termios *term,
     163  rtems_libio_open_close_args_t *args
     164)
    161165{
    162   return -1;
     166  return false;
    163167}
    164168
    165 static int last_close(int major, int minor, void *arg)
     169static bool set_attributes(
     170  rtems_termios_device_context *base,
     171  const struct termios *term
     172)
    166173{
    167   return -1;
     174  return false;
    168175}
    169176
    170 static int read_polled(int minor)
    171 {
    172   return -1;
    173 }
    174 
    175 static void write_polled(int minor, char c)
    176 {
    177   /* Do nothing */
    178 }
    179 
    180 static int set_attributes(int minor, const struct termios *term)
    181 {
    182   return -1;
    183 }
    184 
    185 const console_fns qoriq_uart_bridge_master = {
    186   .deviceProbe = libchip_serial_default_probe,
    187   .deviceFirstOpen = first_open,
    188   .deviceLastClose = last_close,
    189   .deviceRead = read_polled,
    190   .deviceWrite = NULL,
    191   .deviceInitialize = initialize,
    192   .deviceWritePolled = write_polled,
    193   .deviceSetAttributes = set_attributes,
    194   .deviceOutputUsesInterrupts = false
     177const rtems_termios_device_handler qoriq_uart_bridge_master = {
     178  .first_open = first_open,
     179  .set_attributes = set_attributes,
     180  .mode = TERMIOS_POLLED
    195181};
  • c/src/lib/libbsp/powerpc/qoriq/console/uart-bridge-slave.c

    rd5cc923f r6ec438e  
    5151static void uart_bridge_slave_service(intercom_packet *packet, void *arg)
    5252{
    53   uart_bridge_slave_control *control = arg;
    54   struct rtems_termios_tty *tty = control->tty;
     53  uart_bridge_slave_context *ctx = arg;
     54  struct rtems_termios_tty *tty = ctx->tty;
    5555
    5656  /* Workaround for https://www.rtems.org/bugzilla/show_bug.cgi?id=1736 */
     
    6666{
    6767  rtems_status_code sc = RTEMS_SUCCESSFUL;
    68   uart_bridge_slave_control *control = (uart_bridge_slave_control *) arg;
    69   rtems_chain_control *fifo = &control->transmit_fifo;
    70   struct rtems_termios_tty *tty = control->tty;
     68  uart_bridge_slave_context *ctx = (uart_bridge_slave_context *) arg;
     69  rtems_chain_control *fifo = &ctx->transmit_fifo;
     70  struct rtems_termios_tty *tty = ctx->tty;
    7171
    7272  while (true) {
     
    9292
    9393static void create_transmit_task(
    94   uart_bridge_slave_control *control
     94  uart_bridge_slave_context *ctx
    9595)
    9696{
    9797  rtems_status_code sc = RTEMS_SUCCESSFUL;
    9898  rtems_id task = RTEMS_ID_NONE;
    99   char index = (char) ('0' + control->type - INTERCOM_TYPE_UART_0);
     99  char index = (char) ('0' + ctx->type - INTERCOM_TYPE_UART_0);
    100100
    101101  sc = rtems_task_create(
     
    112112    task,
    113113    transmit_task,
    114     (rtems_task_argument) control
     114    (rtems_task_argument) ctx
    115115  );
    116116  assert(sc == RTEMS_SUCCESSFUL);
    117117
    118   control->transmit_task = task;
     118  ctx->transmit_task = task;
    119119}
    120120
    121 static void initialize(int minor)
     121static bool first_open(
     122  struct rtems_termios_tty *tty,
     123  rtems_termios_device_context *base,
     124  struct termios *term,
     125  rtems_libio_open_close_args_t *args
     126)
    122127{
    123   /* Do nothing */
     128  uart_bridge_slave_context *ctx = (uart_bridge_slave_context *) base;
     129  intercom_type type = ctx->type;
     130
     131  ctx->tty = tty;
     132  rtems_termios_set_initial_baud(tty, 115200);
     133  create_transmit_task(ctx);
     134  qoriq_intercom_service_install(type, uart_bridge_slave_service, ctx);
     135
     136  return true;
    124137}
    125138
    126 static int first_open(int major, int minor, void *arg)
     139static void last_close(
     140  struct rtems_termios_tty *tty,
     141  rtems_termios_device_context *base,
     142  rtems_libio_open_close_args_t *args
     143)
    127144{
    128   rtems_libio_open_close_args_t *oc = (rtems_libio_open_close_args_t *) arg;
    129   struct rtems_termios_tty *tty = (struct rtems_termios_tty *) oc->iop->data1;
    130   console_tbl *ct = Console_Port_Tbl[minor];
    131   console_data *cd = &Console_Port_Data [minor];
    132   uart_bridge_slave_control *control = ct->pDeviceParams;
    133   intercom_type type = control->type;
     145  uart_bridge_slave_context *ctx = (uart_bridge_slave_context *) base;
    134146
    135   control->tty = tty;
    136   cd->termios_data = tty;
    137   rtems_termios_set_initial_baud(tty, 115200);
    138   create_transmit_task(control);
    139   qoriq_intercom_service_install(type, uart_bridge_slave_service, control);
    140 
    141   return 0;
     147  qoriq_intercom_service_remove(ctx->type);
    142148}
    143149
    144 static int last_close(int major, int minor, void *arg)
    145 {
    146   console_tbl *ct = Console_Port_Tbl[minor];
    147   uart_bridge_slave_control *control = ct->pDeviceParams;
    148 
    149   qoriq_intercom_service_remove(control->type);
    150 
    151   return 0;
    152 }
    153 
    154 static ssize_t write_with_interrupts(int minor, const char *buf, size_t len)
     150static void write_with_interrupts(
     151  rtems_termios_device_context *base,
     152  const char *buf,
     153  size_t len
     154)
    155155{
    156156  if (len > 0) {
    157157    rtems_status_code sc = RTEMS_SUCCESSFUL;
    158     console_tbl *ct = Console_Port_Tbl[minor];
    159     uart_bridge_slave_control *control = ct->pDeviceParams;
     158    uart_bridge_slave_context *ctx = (uart_bridge_slave_context *) base;
    160159    intercom_packet *packet = qoriq_intercom_allocate_packet(
    161       control->type,
     160      ctx->type,
    162161      INTERCOM_SIZE_64
    163162    );
     
    171170     */
    172171    sc = rtems_chain_append_with_notification(
    173       &control->transmit_fifo,
     172      &ctx->transmit_fifo,
    174173      &packet->glue.node,
    175       control->transmit_task,
     174      ctx->transmit_task,
    176175      TRANSMIT_EVENT
    177176    );
    178177    assert(sc == RTEMS_SUCCESSFUL);
    179178  }
    180 
    181   return 0;
    182179}
    183180
    184 static void write_polled(int minor, char c)
     181static bool set_attributes(
     182  rtems_termios_device_context *base,
     183  const struct termios *term
     184)
    185185{
    186   console_tbl *ct = Console_Port_Tbl[minor];
    187   uart_bridge_slave_control *control = ct->pDeviceParams;
    188   intercom_packet *packet = qoriq_intercom_allocate_packet(
    189     control->type,
    190     INTERCOM_SIZE_64
    191   );
    192   char *data = packet->data;
    193   data [0] = c;
    194   packet->size = 1;
    195   qoriq_intercom_send_packet(QORIQ_UART_BRIDGE_MASTER_CORE, packet);
     186  return false;
    196187}
    197188
    198 static int set_attribues(int minor, const struct termios *term)
    199 {
    200   return -1;
    201 }
    202 
    203 const console_fns qoriq_uart_bridge_slave = {
    204   .deviceProbe = libchip_serial_default_probe,
    205   .deviceFirstOpen = first_open,
    206   .deviceLastClose = last_close,
    207   .deviceRead = NULL,
    208   .deviceWrite = write_with_interrupts,
    209   .deviceInitialize = initialize,
    210   .deviceWritePolled = write_polled,
    211   .deviceSetAttributes = set_attribues,
    212   .deviceOutputUsesInterrupts = true
     189const rtems_termios_device_handler qoriq_uart_bridge_slave = {
     190  .first_open = first_open,
     191  .last_close = last_close,
     192  .write = write_with_interrupts,
     193  .set_attributes = set_attributes,
     194  .mode = TERMIOS_IRQ_DRIVEN
    213195};
  • c/src/lib/libbsp/powerpc/qoriq/include/uart-bridge.h

    rd5cc923f r6ec438e  
    88
    99/*
    10  * Copyright (c) 2011 embedded brains GmbH.  All rights reserved.
     10 * Copyright (c) 2011-2014 embedded brains GmbH.  All rights reserved.
    1111 *
    1212 *  embedded brains GmbH
    13  *  Obere Lagerstr. 30
     13 *  Dornierstr. 4
    1414 *  82178 Puchheim
    1515 *  Germany
     
    2424#define LIBBSP_POWERPC_QORIQ_UART_BRIDGE_H
    2525
    26 #include <libchip/serial.h>
     26#include <rtems/termiostypes.h>
    2727
    2828#include <bsp/intercom.h>
     
    4343
    4444typedef struct {
     45  rtems_termios_device_context base;
    4546  const char *device_path;
    4647  intercom_type type;
    4748  rtems_id transmit_task;
    4849  rtems_chain_control transmit_fifo;
    49 } uart_bridge_master_control;
     50} uart_bridge_master_context;
    5051
    5152typedef struct {
     53  rtems_termios_device_context base;
    5254  struct rtems_termios_tty *tty;
    5355  intercom_type type;
    5456  rtems_id transmit_task;
    5557  rtems_chain_control transmit_fifo;
    56 } uart_bridge_slave_control;
     58} uart_bridge_slave_context;
    5759
    58 extern const console_fns qoriq_uart_bridge_master;
     60bool qoriq_uart_bridge_master_probe(rtems_termios_device_context *base);
    5961
    60 extern const console_fns qoriq_uart_bridge_slave;
     62extern const rtems_termios_device_handler qoriq_uart_bridge_master;
     63
     64extern const rtems_termios_device_handler qoriq_uart_bridge_slave;
    6165
    6266/** @} */
  • c/src/lib/libbsp/powerpc/qoriq/startup/bspstart.c

    rd5cc923f r6ec438e  
    2525#include <rtems/counter.h>
    2626
    27 #include <libchip/serial.h>
     27#include <libchip/ns16550.h>
    2828
    2929#include <libcpu/powerpc-utility.h>
     
    3737#include <bsp/mmu.h>
    3838#include <bsp/qoriq.h>
     39#include <bsp/console-termios.h>
    3940
    4041LINKER_SYMBOL(bsp_exc_vector_base);
     
    5152
    5253  rtems_interrupt_disable(level);
     54  (void) level;
    5355
    5456  printk("%s PANIC %s\n", rtems_get_version_string(), s);
     
    6466
    6567  rtems_interrupt_disable(level);
     68  (void) level;
    6669
    6770  printk("%s PANIC ERROR %u\n", rtems_get_version_string(), n);
     
    7679  unsigned long i = 0;
    7780
    78   ppc_cpu_id_t myCpu;
    79   ppc_cpu_revision_t myCpuRevision;
    80 
    8181  /*
    8282   * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function
    8383   * store the result in global variables so that it can be used latter...
    8484   */
    85   myCpu = get_ppc_cpu_type();
    86   myCpuRevision = get_ppc_cpu_revision();
     85  get_ppc_cpu_type();
     86  get_ppc_cpu_revision();
    8787
    8888  /* Initialize some device driver parameters */
     
    9494
    9595  /* Initialize some console parameters */
    96   for (i = 0; i < Console_Configuration_Count; ++i) {
    97     console_tbl *ct = &Console_Configuration_Ports[i];
     96  for (i = 0; i < console_device_count; ++i) {
     97    const console_device *dev = &console_device_table[i];
     98    const rtems_termios_device_handler *ns16550 =
     99      #ifdef BSP_USE_UART_INTERRUPTS
     100        &ns16550_handler_interrupt;
     101      #else
     102        &ns16550_handler_polled;
     103      #endif
    98104
    99     ct->ulClock = BSP_bus_frequency;
     105    if (dev->handler == ns16550) {
     106      ns16550_context *ctx = (ns16550_context *) dev->context;
    100107
    101     #ifdef HAS_UBOOT
    102       if (ct->deviceType == SERIAL_NS16550) {
    103         ct->pDeviceParams = (void *) bsp_uboot_board_info.bi_baudrate;
    104       }
    105     #endif
     108      ctx->clock = BSP_bus_frequency;
     109
     110      #ifdef HAS_UBOOT
     111        ctx->initial_baud = bsp_uboot_board_info.bi_baudrate;
     112      #endif
     113    }
    106114  }
    107115
  • c/src/libchip/Makefile.am

    rd5cc923f r6ec438e  
    111111    serial/z85c30_reg.c serial/serprobe.c serial/mc68681_p.h \
    112112    serial/z85c30_p.h
     113libserialio_a_SOURCES += serial/ns16550-context.c
    113114
    114115EXTRA_DIST += serial/README.mc68681 serial/README.ns16550 \
  • c/src/libchip/serial/ns16550.c

    rd5cc923f r6ec438e  
    5959#endif
    6060
     61typedef struct {
     62  uint8_t ucModemCtrl;
     63  int transmitFifoChars;
     64} NS16550Context;
     65
     66/*
     67 * Driver functions
     68 */
     69
     70NS16550_STATIC void ns16550_init(int minor);
     71
     72NS16550_STATIC int ns16550_open(
     73  int major,
     74  int minor,
     75  void  * arg
     76);
     77
     78NS16550_STATIC int ns16550_close(
     79  int major,
     80  int minor,
     81  void  * arg
     82);
     83
     84NS16550_STATIC void ns16550_write_polled(
     85  int   minor,
     86  char  cChar
     87);
     88
     89NS16550_STATIC int ns16550_assert_RTS(
     90  int minor
     91);
     92
     93NS16550_STATIC int ns16550_negate_RTS(
     94  int minor
     95);
     96
     97NS16550_STATIC int ns16550_assert_DTR(
     98  int minor
     99);
     100
     101NS16550_STATIC int ns16550_negate_DTR(
     102  int minor
     103);
     104
     105NS16550_STATIC void ns16550_initialize_interrupts(int minor);
     106
     107NS16550_STATIC void ns16550_cleanup_interrupts(int minor);
     108
     109NS16550_STATIC ssize_t ns16550_write_support_int(
     110  int   minor,
     111  const char *buf,
     112  size_t len
     113);
     114
     115NS16550_STATIC ssize_t ns16550_write_support_polled(
     116  int   minor,
     117  const char *buf,
     118  size_t len
     119  );
     120
     121int ns16550_inbyte_nonblocking_polled(
     122  int minor
     123);
     124
     125NS16550_STATIC void ns16550_enable_interrupts(
     126  console_tbl *c,
     127  int         mask
     128);
     129
     130NS16550_STATIC int ns16550_set_attributes(
     131  int                   minor,
     132  const struct termios *t
     133);
     134
     135NS16550_STATIC void ns16550_isr(void *arg);
     136
    61137static rtems_interrupt_lock ns16550_lock =
    62138  RTEMS_INTERRUPT_LOCK_INITIALIZER("NS16550");
     
    143219  uint8_t                 ucDataByte;
    144220  uint32_t                ulBaudDivisor;
    145   ns16550_context        *pns16550Context;
     221  NS16550Context        *pns16550Context;
    146222  setRegister_f           setReg;
    147223  getRegister_f           getReg;
    148224  console_tbl             *c = Console_Port_Tbl [minor];
    149225
    150   pns16550Context=(ns16550_context *)malloc(sizeof(ns16550_context));
     226  pns16550Context=(NS16550Context *)malloc(sizeof(NS16550Context));
    151227
    152228  if (pns16550Context == NULL) {
     
    329405  uint32_t                pNS16550;
    330406  rtems_interrupt_lock_context lock_context;
    331   ns16550_context        *pns16550Context;
     407  NS16550Context        *pns16550Context;
    332408  setRegister_f           setReg;
    333409
    334   pns16550Context=(ns16550_context *) Console_Port_Data[minor].pDeviceContext;
     410  pns16550Context=(NS16550Context *) Console_Port_Data[minor].pDeviceContext;
    335411
    336412  pNS16550 = Console_Port_Tbl[minor]->ulCtrlPort1;
     
    355431  uint32_t                pNS16550;
    356432  rtems_interrupt_lock_context lock_context;
    357   ns16550_context        *pns16550Context;
     433  NS16550Context        *pns16550Context;
    358434  setRegister_f           setReg;
    359435
    360   pns16550Context=(ns16550_context *) Console_Port_Data[minor].pDeviceContext;
     436  pns16550Context=(NS16550Context *) Console_Port_Data[minor].pDeviceContext;
    361437
    362438  pNS16550 = Console_Port_Tbl[minor]->ulCtrlPort1;
     
    386462  uint32_t                pNS16550;
    387463  rtems_interrupt_lock_context lock_context;
    388   ns16550_context        *pns16550Context;
     464  NS16550Context        *pns16550Context;
    389465  setRegister_f           setReg;
    390466
    391   pns16550Context=(ns16550_context *) Console_Port_Data[minor].pDeviceContext;
     467  pns16550Context=(NS16550Context *) Console_Port_Data[minor].pDeviceContext;
    392468
    393469  pNS16550 = Console_Port_Tbl[minor]->ulCtrlPort1;
     
    412488  uint32_t                pNS16550;
    413489  rtems_interrupt_lock_context lock_context;
    414   ns16550_context        *pns16550Context;
     490  NS16550Context        *pns16550Context;
    415491  setRegister_f           setReg;
    416492
    417   pns16550Context=(ns16550_context *) Console_Port_Data[minor].pDeviceContext;
     493  pns16550Context=(NS16550Context *) Console_Port_Data[minor].pDeviceContext;
    418494
    419495  pNS16550 = Console_Port_Tbl[minor]->ulCtrlPort1;
     
    534610  console_tbl *c = Console_Port_Tbl [minor];
    535611  console_data *d = &Console_Port_Data [minor];
    536   ns16550_context *ctx = d->pDeviceContext;
     612  NS16550Context *ctx = d->pDeviceContext;
    537613  uint32_t port = c->ulCtrlPort1;
    538614  getRegister_f get = c->getRegister;
     
    585661  console_tbl *c = Console_Port_Tbl [minor];
    586662  console_data *d = &Console_Port_Data [minor];
    587   ns16550_context *ctx = d->pDeviceContext;
     663  NS16550Context *ctx = d->pDeviceContext;
    588664  uint32_t port = c->ulCtrlPort1;
    589665  setRegister_f set = c->setRegister;
  • c/src/libchip/serial/ns16550.h

    rd5cc923f r6ec438e  
    2828#define _NS16550_H_
    2929
     30#include <rtems/termiostypes.h>
    3031#include <libchip/serial.h>
    3132
     
    5455int ns16550_inch_polled(console_tbl *c);
    5556
     57/* Alternative NS16550 driver using the Termios device context */
     58
     59typedef uint8_t (*ns16550_get_reg)(uintptr_t port, uint8_t reg);
     60
     61typedef void (*ns16550_set_reg)(uintptr_t port, uint8_t reg, uint8_t value);
     62
     63typedef struct {
     64  rtems_termios_device_context base;
     65  ns16550_get_reg get_reg;
     66  ns16550_set_reg set_reg;
     67  uintptr_t port;
     68  rtems_vector_number irq;
     69  uint32_t clock;
     70  uint32_t initial_baud;
     71  bool has_fractional_divider_register;
     72  uint8_t modem_control;
     73  size_t transmit_fifo_chars;
     74} ns16550_context;
     75
     76extern const rtems_termios_device_handler ns16550_handler_interrupt;
     77extern const rtems_termios_device_handler ns16550_handler_polled;
     78
     79extern const rtems_termios_device_flow ns16550_flow_rtscts;
     80extern const rtems_termios_device_flow ns16550_flow_dtrcts;
     81
     82void ns16550_polled_putchar(rtems_termios_device_context *base, char out);
     83
     84int ns16550_polled_getchar(rtems_termios_device_context *base);
     85
     86bool ns16550_probe(rtems_termios_device_context *base);
     87
    5688#ifdef __cplusplus
    5789}
  • c/src/libchip/serial/ns16550_p.h

    rd5cc923f r6ec438e  
    132132#define SP_LSR_EFIFO  0x80
    133133
    134 typedef struct {
    135   uint8_t ucModemCtrl;
    136   int transmitFifoChars;
    137 } ns16550_context;
    138 
    139 /*
    140  * Driver functions
    141  */
    142 
    143 void ns16550_init(int minor);
    144 
    145 int ns16550_open(
    146   int major,
    147   int minor,
    148   void  * arg
    149 );
    150 
    151 int ns16550_close(
    152   int major,
    153   int minor,
    154   void  * arg
    155 );
    156 
    157 void ns16550_write_polled(
    158   int   minor,
    159   char  cChar
    160 );
    161 
    162 NS16550_STATIC int ns16550_assert_RTS(
    163   int minor
    164 );
    165 
    166 NS16550_STATIC int ns16550_negate_RTS(
    167   int minor
    168 );
    169 
    170 NS16550_STATIC int ns16550_assert_DTR(
    171   int minor
    172 );
    173 
    174 NS16550_STATIC int ns16550_negate_DTR(
    175   int minor
    176 );
    177 
    178 NS16550_STATIC void ns16550_initialize_interrupts(int minor);
    179 
    180 NS16550_STATIC void ns16550_cleanup_interrupts(int minor);
    181 
    182 ssize_t ns16550_write_support_int(
    183   int   minor,
    184   const char *buf,
    185   size_t len
    186 );
    187 
    188 ssize_t ns16550_write_support_polled(
    189   int   minor,
    190   const char *buf,
    191   size_t len
    192   );
    193 
    194 int ns16550_inbyte_nonblocking_polled(
    195   int minor
    196 );
    197 
    198 NS16550_STATIC void ns16550_enable_interrupts(
    199   console_tbl *c,
    200   int         mask
    201 );
    202 
    203 int ns16550_set_attributes(
    204   int                   minor,
    205   const struct termios *t
    206 );
    207 
    208 void ns16550_isr(void *arg);
    209 
    210134#ifdef __cplusplus
    211135}
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