Changeset 6e6815e in umon for main/cpu/arm/except_arm.c


Ignore:
Timestamp:
Jun 20, 2016, 3:24:20 PM (3 years ago)
Author:
Ben Gras <beng@…>
Branches:
master
Parents:
696ee75
git-author:
Ben Gras <beng@…> (06/20/16 15:24:20)
git-committer:
Ben Gras <beng@…> (06/20/16 15:45:45)
Message:

ARM: save and print exception context

Debugging aid. Prints nice exception context info like:

R0 = 0x00000000 R8 = 0x402fe8b0
R1 = 0x402ffd80 R9 = 0x40309b15
R2 = 0x00000800 R10 = 0x00000000
R3 = 0x402ffd40 R11 = 0x00000000
R4 = 0x402ffd40 R12 = 0x402fdd38
R5 = 0x402ffd80 SP = 0x40309694
R6 = 0x00000003 LR = 0x402fa348
R7 = 0x00000800 PC = 0x402f8614
VEC = 0x00000003

Data structures, definitions and code taken from RTEMS.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • main/cpu/arm/except_arm.c

    r696ee75 r6e6815e  
    3636int ExceptionType;
    3737
     38#define PRIx32 "lx"
     39#define PRIxPTR "lx"
     40
     41/* Taken from RTEMS cpukit/score/cpu/arm/arm-exception-frame-print.c */
     42static void _CPU_Exception_frame_print( const CPU_Exception_frame *frame )
     43{
     44  printf(
     45    "\n"
     46    "R0   = 0x%08" PRIx32 " R8  = 0x%08" PRIx32 "\n"
     47    "R1   = 0x%08" PRIx32 " R9  = 0x%08" PRIx32 "\n"
     48    "R2   = 0x%08" PRIx32 " R10 = 0x%08" PRIx32 "\n"
     49    "R3   = 0x%08" PRIx32 " R11 = 0x%08" PRIx32 "\n"
     50    "R4   = 0x%08" PRIx32 " R12 = 0x%08" PRIx32 "\n"
     51    "R5   = 0x%08" PRIx32 " SP  = 0x%08" PRIx32 "\n"
     52    "R6   = 0x%08" PRIx32 " LR  = 0x%08" PRIxPTR "\n"
     53    "R7   = 0x%08" PRIx32 " PC  = 0x%08" PRIxPTR "\n"
     54    "VEC = 0x%08" PRIxPTR "\n",
     55    frame->register_r0,
     56    frame->register_r8,
     57    frame->register_r1,
     58    frame->register_r9,
     59    frame->register_r2,
     60    frame->register_r10,
     61    frame->register_r3,
     62    frame->register_r11,
     63    frame->register_r4,
     64    frame->register_r12,
     65    frame->register_r5,
     66    frame->register_sp,
     67    frame->register_r6,
     68    (uint32_t) frame->register_lr,
     69    frame->register_r7,
     70    (uint32_t) frame->register_pc,
     71    (uint32_t) frame->vector
     72  );
     73}
     74
    3875/***********************************************************************
    3976 *
     
    4279 */
    4380void
    44 umon_exception(ulong addr, ulong type)
     81umon_exception(CPU_Exception_frame *frame)
    4582{
    46     ExceptionAddr = addr;
    47     ExceptionType = type;
     83    _CPU_Exception_frame_print(frame);
     84
     85    ExceptionAddr = (uint32_t) frame->register_pc;
     86    ExceptionType = frame->vector;
     87
    4888    monrestart(EXCEPTION);
    4989}
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