Changeset 6c454104 in rtems


Ignore:
Timestamp:
Nov 13, 2012, 10:50:38 AM (7 years ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
4.11, master
Children:
bd75e58
Parents:
353f0fa
git-author:
Sebastian Huber <sebastian.huber@…> (11/13/12 10:50:38)
git-committer:
Sebastian Huber <sebastian.huber@…> (12/03/12 12:17:09)
Message:

bsp/mpc55xx: Fix no-cache section load

Location:
c/src/lib/libbsp/powerpc/mpc55xxevb
Files:
7 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/powerpc/mpc55xxevb/configure.ac

    r353f0fa r6c454104  
    169169RTEMS_BSPOPTS_HELP([MPC55XX_BOARD_GWLCFM],[if defined, use custom settings for GWLCFM board])
    170170
    171 RTEMS_BSPOPTS_SET([MPC55XX_BOARD_MPC5674F_ECU508],[mpc5674f_ecu508_boot],[1])
     171RTEMS_BSPOPTS_SET([MPC55XX_BOARD_MPC5674F_ECU508],[mpc5674f_ecu508*],[1])
    172172RTEMS_BSPOPTS_HELP([MPC55XX_BOARD_MPC5674F_ECU508],[if defined, use custom settings for ECU508 board])
    173173
  • c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start-config-ebi-cs-cal.c

    r353f0fa r6c454104  
    7676    }
    7777  }
    78 #elif defined(MPC55XX_BOARD_MPC5674F_ECU508)
     78#elif defined(MPC55XX_BOARD_MPC5674F_ECU508) \
     79  && defined(MPC55XX_NEEDS_LOW_LEVEL_INIT)
    7980  /* D_CS0 for external SRAM */
    8081  {
  • c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start-config-mmu-early.c

    r353f0fa r6c454104  
    2626BSP_START_TEXT_SECTION const struct MMU_tag
    2727  mpc55xx_start_config_mmu_early [] = {
    28 #if MPC55XX_CHIP_FAMILY == 555
     28#if defined(MPC55XX_BOARD_MPC5674F_ECU508) \
     29  && !defined(MPC55XX_NEEDS_LOW_LEVEL_INIT)
     30  /* Used as cache-inhibited area later (ADC, DSPI queues) */
     31  MPC55XX_MMU_TAG_INITIALIZER(14, 0x4003c000, MPC55XX_MMU_16K, 0, 1, 1, 0)
     32#elif MPC55XX_CHIP_FAMILY == 555
    2933  /* Internal SRAM 96k */
    3034  MPC55XX_MMU_TAG_INITIALIZER(3, 0x40000000, MPC55XX_MMU_256K, 1, 1, 1, 0),
  • c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start-config-mmu.c

    r353f0fa r6c454104  
    7676  MPC55XX_MMU_TAG_INITIALIZER(15, 0x3fff8000, MPC55XX_MMU_64K, 0, 1, 1, 1)
    7777#elif defined(MPC55XX_BOARD_MPC5674F_ECU508)
    78   /* Arguments macro:       idx,  addr,                     size,             x, w, r, io */
    79   /* Internal flash 4M */
    80   MPC55XX_MMU_TAG_INITIALIZER(1,  0x00000000,               MPC55XX_MMU_64K,  1, 0, 1, 0),  /* first 64k unused, to detect null-pointer access */
    81   MPC55XX_MMU_TAG_INITIALIZER(5,  0x00010000,               MPC55XX_MMU_64K,  1, 0, 1, 0),
    82   MPC55XX_MMU_TAG_INITIALIZER(6,  0x00020000,               MPC55XX_MMU_128K, 1, 0, 1, 0),
    83   MPC55XX_MMU_TAG_INITIALIZER(7,  0x00040000,               MPC55XX_MMU_256K, 1, 0, 1, 0),
    84   MPC55XX_MMU_TAG_INITIALIZER(8,  0x00080000,               MPC55XX_MMU_512K, 1, 0, 1, 0),
    85   MPC55XX_MMU_TAG_INITIALIZER(9,  0x00100000,               MPC55XX_MMU_1M,   1, 0, 1, 0),
    86   MPC55XX_MMU_TAG_INITIALIZER(10, 0x00200000,               MPC55XX_MMU_2M,   1, 0, 1, 0),
    87   /* External SRAM 2M */
    88   MPC55XX_MMU_TAG_INITIALIZER(2,  0x20000000,               MPC55XX_MMU_2M,   0, 1, 1, 0),
    89   /* Internal SRAM 256k */
    90   MPC55XX_MMU_TAG_INITIALIZER(3,  0x40000000 +   0 * 1024,  MPC55XX_MMU_256K, 0, 1, 1, 0),
    91   MPC55XX_MMU_TAG_INITIALIZER(11, 0x40000000 + 128 * 1024,  MPC55XX_MMU_64K,  0, 1, 1, 0),
    92   MPC55XX_MMU_TAG_INITIALIZER(12, 0x40000000 + 192 * 1024,  MPC55XX_MMU_32K,  0, 1, 1, 0),
    93   MPC55XX_MMU_TAG_INITIALIZER(13, 0x40000000 + 224 * 1024,  MPC55XX_MMU_16K,  0, 1, 1, 0),
    94   MPC55XX_MMU_TAG_INITIALIZER(14, 0x40000000 + 240 * 1024,  MPC55XX_MMU_16K,  0, 1, 1, 1),  // used as cache-inhibited area (ADC, DSPI queues)
    95   /* External Ethernet controller */
    96   MPC55XX_MMU_TAG_INITIALIZER(15, 0x3fff8000,               MPC55XX_MMU_1K,   0, 1, 1, 1),
    97   /* External MRAM 128k */
    98   MPC55XX_MMU_TAG_INITIALIZER(16, 0x3ffa0000,               MPC55XX_MMU_128K, 0, 1, 1, 0),
    99   /* External ARCNET controller */
    100   MPC55XX_MMU_TAG_INITIALIZER(17, 0x3ffc0000,               MPC55XX_MMU_1K,   0, 1, 1, 1)
    101   /* Peripheral Bridge A-Registers on MMU-table pos 4 */
    102   /* Peripheral Bridge B-Registers on MMU-table pos 0 */
     78  #if defined(MPC55XX_NEEDS_LOW_LEVEL_INIT)
     79    /* Arguments macro:       idx,  addr,       size,             x, w, r, io */
     80
     81    /* Internal flash 4M */
     82    /* First 64k unused, to detect null-pointer access */
     83    MPC55XX_MMU_TAG_INITIALIZER(1,  0x00000000, MPC55XX_MMU_64K,  1, 0, 1, 0),
     84    MPC55XX_MMU_TAG_INITIALIZER(5,  0x00010000, MPC55XX_MMU_64K,  1, 0, 1, 0),
     85    MPC55XX_MMU_TAG_INITIALIZER(6,  0x00020000, MPC55XX_MMU_128K, 1, 0, 1, 0),
     86    MPC55XX_MMU_TAG_INITIALIZER(7,  0x00040000, MPC55XX_MMU_256K, 1, 0, 1, 0),
     87    MPC55XX_MMU_TAG_INITIALIZER(8,  0x00080000, MPC55XX_MMU_512K, 1, 0, 1, 0),
     88    MPC55XX_MMU_TAG_INITIALIZER(9,  0x00100000, MPC55XX_MMU_1M,   1, 0, 1, 0),
     89    MPC55XX_MMU_TAG_INITIALIZER(10, 0x00200000, MPC55XX_MMU_2M,   1, 0, 1, 0),
     90    /* External SRAM 2M */
     91    MPC55XX_MMU_TAG_INITIALIZER(2,  0x20000000, MPC55XX_MMU_2M,   0, 1, 1, 0),
     92    /* Internal SRAM 256k */
     93    MPC55XX_MMU_TAG_INITIALIZER(3,  0x40000000, MPC55XX_MMU_256K, 0, 1, 1, 0),
     94    MPC55XX_MMU_TAG_INITIALIZER(11, 0x40020000, MPC55XX_MMU_64K,  0, 1, 1, 0),
     95    MPC55XX_MMU_TAG_INITIALIZER(12, 0x40030000, MPC55XX_MMU_32K,  0, 1, 1, 0),
     96    MPC55XX_MMU_TAG_INITIALIZER(13, 0x40038000, MPC55XX_MMU_16K,  0, 1, 1, 0),
     97    /* Used as cache-inhibited area (ADC, DSPI queues) */
     98    MPC55XX_MMU_TAG_INITIALIZER(14, 0x4003c000, MPC55XX_MMU_16K,  0, 1, 1, 1),
     99    /* External Ethernet controller */
     100    MPC55XX_MMU_TAG_INITIALIZER(15, 0x3fff8000, MPC55XX_MMU_1K,   0, 1, 1, 1),
     101    /* External MRAM 128k */
     102    MPC55XX_MMU_TAG_INITIALIZER(16, 0x3ffa0000, MPC55XX_MMU_128K, 0, 1, 1, 0),
     103    /* External ARCNET controller */
     104    MPC55XX_MMU_TAG_INITIALIZER(17, 0x3ffc0000, MPC55XX_MMU_1K,   0, 1, 1, 1)
     105    /* Peripheral Bridge A-Registers on MMU-table pos 4 */
     106    /* Peripheral Bridge B-Registers on MMU-table pos 0 */
     107  #else
     108    /* Used as cache-inhibited area (ADC, DSPI queues) */
     109    MPC55XX_MMU_TAG_INITIALIZER(14, 0x4003c000, MPC55XX_MMU_16K,  0, 1, 1, 1),
     110  #endif
    103111#elif MPC55XX_CHIP_FAMILY == 564
    104112  /* Internal flash 1M */
  • c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start-config-siu-pcr.c

    r353f0fa r6c454104  
    113113  { 301,  1, 0, { .B = { .PA = 1, .DSC = 1 } } }, /* D_CS1 */
    114114  { 302,  6, 0, { .B = { .PA = 1, .DSC = 1 } } } /* D_BDIP, D_WE2, D_WE3, D_ADD9 .. D_ADD11 */
    115 #elif defined(MPC55XX_BOARD_MPC5674F_ECU508)
     115#elif defined(MPC55XX_BOARD_MPC5674F_ECU508) \
     116  && defined(MPC55XX_NEEDS_LOW_LEVEL_INIT)
    116117  { 196,  2, 0, { .B = { .PA = 0, .OBE = 1, .WPE = 0 } } }, /* EMIOS17 .. EMIOS18 (5VS_EN, 80V_EN) */
    117118  { 200,  4, 0, { .B = { .PA = 0, .OBE = 1, .WPE = 0 } } }, /* EMIOS21 .. EMIOS24 (\KS_RST, \LS_RST, \IGNINJ_RST, \INJDI_RST) */
  • c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start-early.c

    r353f0fa r6c454104  
    175175
    176176      SIU.ECCR.B.EBDF = 3;  /* use CLK/4 as bus clock */
    177     #elif defined(MPC55XX_BOARD_MPC5674FEVB) || defined(MPC55XX_BOARD_MPC5674F_ECU508)
     177    #elif defined(MPC55XX_BOARD_MPC5674FEVB) \
     178      || defined(MPC55XX_BOARD_MPC5674F_ECU508)
    178179      union EBI_MCR_tag mcr = {
    179180        .B = {
  • c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start.S

    r353f0fa r6c454104  
    175175        mtspr   FSL_EIS_BUCSR, r3
    176176
     177#endif /* MPC55XX_NEEDS_LOW_LEVEL_INIT */
     178
    177179        /* MMU early initialization */
    178180        LA      r3, mpc55xx_start_config_mmu_early
    179181        LW      r4, mpc55xx_start_config_mmu_early_count
    180182        bl      mpc55xx_start_mmu_apply_config
     183
     184#ifdef MPC55XX_NEEDS_LOW_LEVEL_INIT
    181185
    182186        /* Initialize intermediate stack (ECC) */
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