Changeset 6c28773e in rtems


Ignore:
Timestamp:
Dec 2, 2009, 1:24:52 AM (9 years ago)
Author:
Till Straumann <strauman@…>
Branches:
4.10, 4.11, master
Children:
fbee4ff
Parents:
c261d9c
Message:

2009-12-01 Till Straumann <strauman@…>

  • score/cpu/powerpc/rtems/score/cpu.h: Added space for non- volatile AltiVec? registers to context struct. Added declaration for AltiVec?-related routines to be implemented by CPU/BSP support.
Location:
cpukit/score/cpu/powerpc
Files:
2 edited

Legend:

Unmodified
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  • cpukit/score/cpu/powerpc/ChangeLog

    rc261d9c r6c28773e  
     12009-12-01      Till Straumann <strauman@slac.stanford.edu>
     2
     3        * score/cpu/powerpc/rtems/score/cpu.h: Added space for non-
     4        volatile AltiVec registers to context struct. Added declaration
     5        for AltiVec-related routines to be implemented by CPU/BSP
     6        support.
     7
    182009-10-21  Thomas Doerfler  <Thomas.Doerfler@embedded-brains.de>
    29
  • cpukit/score/cpu/powerpc/rtems/score/cpu.h

    rc261d9c r6c28773e  
    253253    uint32_t   pc;      /* Program counter/Link register */
    254254    uint32_t   msr;     /* Initial interrupt level */
     255#ifdef __ALTIVEC__
     256        /* 12 non-volatile vector registers, cache-aligned area for vscr/vrsave
     257         * and padding to ensure cache-alignment.
     258         * Unfortunately, we can't verify the cache line size here
     259         * in the cpukit but altivec support code will produce an
     260         * error if this is ever different from 32 bytes.
     261         *
     262         * Note: it is the BSP/CPU-support's responsibility to
     263         *       save/restore volatile vregs across interrupts
     264         *       and exceptions.
     265         */
     266        uint8_t    altivec[16*12 + 32 + 32];
     267#endif
    255268} Context_Control;
    256269
     
    647660);
    648661
     662/*
     663 * _CPU_Initialize_altivec()
     664 *
     665 * Global altivec-related initialization.
     666 */
     667void
     668_CPU_Initialize_altivec(void);
     669
     670/*
     671 * _CPU_Context_switch_altivec
     672 *
     673 * This routine switches the altivec contexts passed to it.
     674 */
     675
     676void
     677_CPU_Context_switch_altivec(
     678  Context_Control *from,
     679  Context_Control *to
     680);
     681
     682/*
     683 * _CPU_Context_restore_altivec
     684 *
     685 * This routine restores the altivec context passed to it.
     686 */
     687
     688void
     689_CPU_Context_restore_altivec(
     690  Context_Control *ctxt
     691);
     692
     693/*
     694 * _CPU_Context_initialize_altivec
     695 *
     696 * This routine initializes the altivec context passed to it.
     697 */
     698
     699void
     700_CPU_Context_initialize_altivec(
     701  Context_Control *ctxt
     702);
     703
    649704void _CPU_Fatal_error(
    650705  uint32_t   _error
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